L'acceptation et l'utilisation des services Web en industrie se développent de par leursupport au développement d'application distribuées comme compositions d'entitéslogicielles plus simples appelées services. En complément à la vérification, le testpermet de vérifier la correction d'une implémentation binaire (code source nondisponible) par rapport à une spécification. Dans cette thèse, nous proposons uneapproche boîte-noire du test de conformité de compositions de services centralisées(orchestrations). Par rapport à l'état de l'art, nous développons une approchesymbolique de façon à éviter des problèmes d'explosion d'espace d'état dus à la largeutilisation de données XML dans les services Web. Cette approche est basée sur desmodèles symboliques (STS), l'exécution symbolique de ces modèles et l'utilisationd'un solveur SMT. De plus, nous proposons une approche de bout en bout, quiva de la spécification à l'aide d'un langage normalisé d'orchestration (ABPEL) etde la possible description d'objectifs de tests à la concrétisation et l'exécution enligne de cas de tests symboliques. Un point important est notre transformation demodèle entre ABPEL et les STS qui prend en compte les spécifications sémantiquesd'ABPEL. L'automatisation de notre approche est supportée par un ensemble d'outilsque nous avons développés.

In order to make company work efficiently, managers often divide an enterprise into several functions or departments, such as sales, marketing, human resource, finance and manufacture. However, in this structure, managers would fail to see the wood for the trees. Because each department manager has to be responsible for his own performance, which may easily leads these managers to make decisions that are fit for their department instead of the whole company. Therefore, it¡¦s impossible for companies to make an optimized decision in a dynamic environment. As we enlarge space and time, we can find out that decisions may influence one by another, and the feedback of each decision has a long time delay which makes the manager try to see the wood for the trees even harder. For one manager who tries to show up his performance in a short time will leave the side effect which caused by time delay to other people. What even worse is they can¡¦t predict how much side effect is behind. In this research, we used system dynamics and systems thinking to develop our system dynamics model for the case study. And we developed a MFS(management flight simulator) as a learning tool. Students who manipulate this MFS can enrich their ability to see the wood for the trees. In this case study, we choose a factory which provide electronic product assemble services as a research object. The company was established since AD 1989 until now. After first five years hard working time, it started to grow up stably by keeping changing the product and service. In this industry, success is relied on product quality, price, service and delivery time. Only by making the optimized decision in this competition market can gain better performance. This thesis simulated the case company surface mount technology plant from 1995 to 2006 for 12 years. Students can make different decisions to obtain different equity and capital equipment to evaluate their performance. By different result, simulators can reconsider the structure which is behind the game and their own mental models. After learning from this virtual world, players will find out that their own mental models influencing the final result. From the result and experience, one simulator can accumulate their know-how for the next game. After experiencing this double loop learning process, player will finally learn how to make the best decisions by systems thinking for the real world. Keywords : System Dynamics¡BSystems Thinking¡BDynamic Complexity¡BEnterprise Modeling¡BManagement Flight Simulator¡BSurface Mount Technology(SMT)¡BElectronic Manufacturing Services(EMS)

Made available in DSpace on 2014-12-17T15:47:48Z (GMT). No. of bitstreams: 1 DiegoCBO.pdf: 564820 bytes, checksum: eedd81c1881d60fea03c3dcdd8556734 (MD5) Previous issue date: 2007-11-07 / O m?todo de combina??o de Nelson-Oppen permite que v?rios procedimentos de decis?o, cada um projetado para uma teoria espec?fica, possam ser combinados para inferir sobre teorias mais abrangentes, atrav?s do princ?pio de propaga??o de igualdades. Provadores de teorema baseados neste modelo s?o beneficiados por sua caracter?stica modular e podem evoluir mais facilmente, incrementalmente. Difference logic ? uma subteoria da aritm?tica linear. Ela ? formada por constraints do tipo x − y ≤ c, onde x e y s?o vari?veis e c ? uma constante. Difference logic ? muito comum em v?rios problemas, como circuitos digitais, agendamento, sistemas temporais, etc. e se apresenta predominante em v?rios outros casos. Difference logic ainda se caracteriza por ser modelada usando teoria dos grafos. Isto permite que v?rios algoritmos eficientes e conhecidos da teoria de grafos possam ser utilizados. Um procedimento de decis?o para difference logic ? capaz de induzir sobre milhares de constraints. Um procedimento de decis?o para a teoria de difference logic tem como objetivo principal informar se um conjunto de constraints de difference logic ? satisfat?vel (as vari?veis podem assumir valores que tornam o conjunto consistente) ou n?o. Al?m disso, para funcionar em um modelo de combina??o baseado em Nelson-Oppen, o procedimento de decis?o precisa ter outras funcionalidades, como gera??o de igualdade de vari?veis, prova de inconsist?ncia, premissas, etc. Este trabalho apresenta um procedimento de decis?o para a teoria de difference logic dentro de uma arquitetura baseada no m?todo de combina??o de Nelson-Oppen. O trabalho foi realizado integrando-se ao provador haRVey, de onde foi poss?vel observar o seu funcionamento. Detalhes de implementa??o e testes experimentais s?o relatados

Submitted by Automa??o e Estat?stica (sst@bczm.ufrn.br) on 2016-08-26T23:09:02Z No. of bitstreams: 1 VitorAlcantaraDeAlmeida_DISSERT.pdf: 2275305 bytes, checksum: 861287dd67240f715c731a69f2fa5aec (MD5) / Approved for entry into archive by Arlan Eloi Leite Silva (eloihistoriador@yahoo.com.br) on 2016-08-30T23:32:12Z (GMT) No. of bitstreams: 1 VitorAlcantaraDeAlmeida_DISSERT.pdf: 2275305 bytes, checksum: 861287dd67240f715c731a69f2fa5aec (MD5) / Made available in DSpace on 2016-08-30T23:32:12Z (GMT). No. of bitstreams: 1 VitorAlcantaraDeAlmeida_DISSERT.pdf: 2275305 bytes, checksum: 861287dd67240f715c731a69f2fa5aec (MD5) Previous issue date: 2016-04-29 / Coordena??o de Aperfei?oamento de Pessoal de N?vel Superior (CAPES) / A presente disserta??o descreve uma extens?o para a plataforma Frama-C e o plugin WP:o WPTrans. Essa extens?o permite a manipula??o, atrav?s de regras de infer?ncia, dasobriga??es de prova geradas pelo WP, com a possibilidade das mesmas serem enviadas,em qualquer etapa da modifica??o, a solucionadores SMT e assistentes de prova. Algumasobriga??es de prova podem ser validadas automaticamente, enquanto outras s?o muitocomplexas para os solucionadores SMT, exigindo uma prova manual pelo desenvolvedor,atrav?s dos assistentes de prova. Contudo, a segunda abordagem geralmente requer dousu?rio uma experi?ncia significativa em estrat?gias de prova. Alguns assistentes oferecemcomunica??o com provadores autom?ticos, entretanto, esta liga??o pode ser complexaou incompleta, restando ao usu?rio apenas a prova manual. O objetivo deste plugin ? interligaros dois tipos de ferramentas de modo preciso e completo, com uma linguagemsimples para a manipula??o. Assim, o usu?rio pode simplificar suficientemente as obriga??es deprova para que possam ser validadas por qualquer outro solucionador SMT.N?o obstante, a extens?o ? interligada diretamente ao WP, facilitando a instala??o doplugin no Frama-C. Esta extens?o tamb?m ? uma porta de entrada para outras poss?veisfuncionalidades, sendo as mesmas discutidas neste documento. / The platform Frama-C is a tool dedicated to analysis of source code of software written in C, with the possible types of analysis provided by plugins attached to the platform. One of its plugins is WP, used for deductive veri cation of C code with ACSL, a formal speci cation language. This dissertation describes the extension of this plugin, named WPTrans. This extension allows generated proof obligations from WP to be manipulated through inference rules and sent, at any stage of the proof, to automatic (mainly SMT solvers) and interactive theorem provers. Some proof obligations may be proved automatically, while others can be too complex to be solved by automatic theorem provers, requiring the users of Frama-C and WP to handle them manually. This approach usually requires a signi cant experience in proof strategies. Some interactive theorem provers provide communication with automatic provers. However, this connection can be complex and incomplete, leaving the user with the manual proof option only. The strength of WPTrans is to combine the features of automatic and interactive theorem provers in a precise and complete way, with a simple manipulation language. Thus, the user can simplify the proof obligations enough in order for its proof to be concluded with an SMT solver, letting the proof be partially manual and partially automatic. Nevertheless, the plugin is directly linked do WP, facilitating the installation of the extension in Frama-C. This tool is also a gateway to other possible features, which we discuss herein.

Submitted by Automa??o e Estat?stica (sst@bczm.ufrn.br) on 2016-02-22T21:43:01Z No. of bitstreams: 1 PauloEwertonGomesFragoso_DISSERT.pdf: 1631728 bytes, checksum: 56a10da50e4f607b55bac9c065912a21 (MD5) / Approved for entry into archive by Arlan Eloi Leite Silva (eloihistoriador@yahoo.com.br) on 2016-02-23T23:34:33Z (GMT) No. of bitstreams: 1 PauloEwertonGomesFragoso_DISSERT.pdf: 1631728 bytes, checksum: 56a10da50e4f607b55bac9c065912a21 (MD5) / Made available in DSpace on 2016-02-23T23:34:33Z (GMT). No. of bitstreams: 1 PauloEwertonGomesFragoso_DISSERT.pdf: 1631728 bytes, checksum: 56a10da50e4f607b55bac9c065912a21 (MD5) Previous issue date: 2015-03-09 / Event-B ? um m?todo formal de modelagem e verifica??o de sistemas de transi??o discretos. O desenvolvimento com Event-B produz obriga??es de prova que devem ser verificadas, isto ?, ter sua validade verificada para manter a consist?ncia dos modelos produzidos. Solucionadores de Satisfatibilidade M?dulo Teoria s?o provadores autom?ticos de teoremas usados para verificar a satisfatibilidade de f?rmulas l?gicas considerando uma teoria (ou combina??o de teorias) subjacente. Solucionadores SMT n?o apenas lidam com f?rmulas extensas em l?gica de primeira ordem, como tamb?m podem gerar modelos e provas, bem como identificar subconjuntos insatisfat?veis de hip?teses (n?cleos insatisfat?veis). O suporte ferramental para Event-B ? provido pela Plataforma Rodin: um IDE extens?vel, baseado no framework Eclipse, que combina funcionalidades de modelagem e prova. Um plug-in SMT para Rodin tem sido desenvolvido com o objetivo de integrar ? plataforma t?cnicas alternativas e eficientes de verifica??o. Neste trabalho foi implementada uma s?rie de complementos ao plug-in para solucionadores SMT em Rodin, a saber, melhorias na interface do usu?rio para quando obriga??es de prova s?o reportadas como inv?lidas pelo plug-in. Adicionalmente, algumas caracter?sticas do plug-in, tais como suporte ? gera??o de provas e extra??o de n?cleo insatisfat?vel, foram modificadas de modo a tornaremse compat?veis com o padr?o SMT-LIB para solucionadores SMT. Realizaram-se testes utilizando obriga??es de prova aplic?veis para demonstrar as novas funcionalidades. As contribui??es descritas podem, potencialmente, afetar a produtividade de forma positiva. / Event-B is a formal method for modeling and verification of discrete transition systems. Event-B development yields proof obligations that must be verified (i.e. proved valid) in order to keep the produced models consistent. Satisfiability Modulo Theory solvers are automated theorem provers used to verify the satisfiability of logic formulas considering a background theory (or combination of theories). SMT solvers not only handle large firstorder formulas, but can also generate models and proofs, as well as identify unsatisfiable subsets of hypotheses (unsat-cores). Tool support for Event-B is provided by the Rodin platform: an extensible Eclipse based IDE that combines modeling and proving features. A SMT plug-in for Rodin has been developed intending to integrate alternative, efficient verification techniques to the platform. We implemented a series of complements to the SMT solver plug-in for Rodin, namely improvements to the user interface for when proof obligations are reported as invalid by the plug-in. Additionally, we modified some of the plug-in features, such as support for proof generation and unsat-core extraction, to comply with the SMT-LIB standard for SMT solvers. We undertook tests using applicable proof obligations to demonstrate the new features. The contributions described can potentially affect productivity in a positive manner.

Submitted by Automa??o e Estat?stica (sst@bczm.ufrn.br) on 2017-11-01T21:17:46Z No. of bitstreams: 1 DalayIsraelDeAlmeidaPereira_DISSERT.pdf: 1298858 bytes, checksum: 8ff640d45df0332e0a20a3f4476198ce (MD5) / Approved for entry into archive by Arlan Eloi Leite Silva (eloihistoriador@yahoo.com.br) on 2017-11-07T19:51:30Z (GMT) No. of bitstreams: 1 DalayIsraelDeAlmeidaPereira_DISSERT.pdf: 1298858 bytes, checksum: 8ff640d45df0332e0a20a3f4476198ce (MD5) / Made available in DSpace on 2017-11-07T19:51:30Z (GMT). No. of bitstreams: 1 DalayIsraelDeAlmeidaPereira_DISSERT.pdf: 1298858 bytes, checksum: 8ff640d45df0332e0a20a3f4476198ce (MD5) Previous issue date: 2017-08-18 / Utilizando a abordagem de desenvolvimento baseado em componentes, a complexidade dos sistemas ? reduzida e a sua manuten??o ? facilitada, trazendo mais seguran?a e reuso dos componentes. Por?m, a composi??o dos componentes (e suas intera??es) ainda ? uma grande fonte de problemas e requer uma an?lise mais detalhada. Esse problema ? ainda mais relevante quando lidamos com aplica??es cr?ticas. Uma abordagem para especificar esse tipo de aplica??o ? o uso de M?todos Formais, uma metodologia precisa para a especifica??o de sistemas, que possui uma base matem?tica forte e que traz, entre outros benef?cios, mais seguran?a. Como exemplo, o m?todo formal CSP permite a especifica??o de sistemas concorrentes e a verifica??o de propriedades inerentes a esses sistemas. CSP disp?e de um conjunto de ferramentas para a sua verifica??o, como, por exemplo, FDR. Usando CSP ? poss?vel indentificar e resolver problemas como deadlock e livelock em um sistema, muito embora isso possa ser custoso em termos de tempo gasto em verifica??es. Nesse contexto, BRIC surge como uma abordagem baseada em CSP para o desenvolvimento de sistemas baseados em componentes, garantindo a aus?ncia de deadlock e livelock por constru??o. Essa abordagem usa CSP para especificar restri??es e intera??es entre componentes de maneira a permitir uma verifica??o formal do sistema. Uma extens?o de BRIC, BRICK , prop?e adicionar metadados aos componentes a fim de diminuir a complexidade e a quantidade das verifica??es feitas quando componentes s?o compostos. Por?m, a aplica??o pr?tica dessa abordagem pode se tornar muito complexa e cansativa se feita manualmente. Com o objetivo de automatizar o uso da abordagem BRICK , foi desenvolvida anteriormente uma ferramenta (BTS - BRICK Tool Support) que automatiza as verifica??es das composi??es dos componentes gerando e verificando automaticamente as condi??es impostas pela abordagem utilizando FDR. Por?m, devido ao n?mero e ? complexidade das verifica??es feitas em FDR, a ferramenta pode levar ainda muito tempo nesse processo. Esta disserta??o apresenta uma extens?o ? BTS que melhora o modo como s?o feitas as verifica??es, substituindo o FDR utilizado na ferramenta pela sua mais recente vers?o e adicionando um provador SMT que, concorrentemente, verifica algumas das propriedades da aplica??o. N?s tamb?m adaptamos a ferramenta para ser usada na especifica??o de um maior n?mero de sistemas e avaliamos a ferramenta estendida com dois estudos de caso, comparando as verifica??es feitas na vers?o anterior da ferramenta com a nossa nova abordagem de verifica??o. / Using the component-based development approach, the system complexity is reduced and its maintenance is facilitated, bringing more reliability and reuse of components. However, the composition of components (and their interactions) is still a significant source of problems and requires a more detailed analysis. This problem is even more relevant when dealing with safety-critical applications. An approach for specifying this kind of applications is using Formal Methods, which are a precise methodology for system specification that has strong mathematical background which brings, among other benefits, more safety. As an example, the formal method CSP allows the specification of concurrent systems and the verification of properties inherent to such systems. CSP has a set of tools for verification, like, for instance, FDR. Using CSP, one can detect and solve problems like deadlock and livelock in a system, although it can be costly in terms of the time spent in verifications. In this context, BRICK has emerged as a CSP based approach for developing componentbased systems, which guarantees deadlock and livelock freedom by construction. This approach uses CSP to specify the constraints and interactions between the components to allow a formal verification of the system. An extension to BRIC, BRICK , makes use of metadata as part of the components in order to decrease the complexity and the quantity of verifications made when composing components. However, the practical use of this approach can be too complex and cumbersome. In order to automate the use of the BRICK approach a tool has been previously developed (BTS - BRICK Tool Support), which automates the verifications of component compositions by automatically generating and checking the side conditions imposed by the approach using FDR. Nevertheless, due to the number and complexity of the verifications made in FDR, the tool can still take too much time in this process. In this dissertation, we present an extension to BTS that improves the way how it make verifications by replacing the FDR used inside the tool by its most recent version and adding a SMT-solver, that, concurrently, checks some properties of the specification. We also adapted the tool in order to be used for the specification of a greater number of systems and we evaluated the extended tool with two case studies, comparing the verifications made in the older version of the tool with this new approach of verification.

Submitted by Kamila Costa (kamilavasconceloscosta@gmail.com) on 2015-08-03T12:38:15Z No. of bitstreams: 2 Dissertação - Francisco de A P Januário.pdf: 1215702 bytes, checksum: 7f02a7976f19b94633a48b22a4990adf (MD5) ficha_catalografica.pdf: 1919 bytes, checksum: cbf0df9103c43df7202f18e8010435b9 (MD5) / Approved for entry into archive by Divisão de Documentação/BC Biblioteca Central (ddbc@ufam.edu.br) on 2015-08-04T15:34:24Z (GMT) No. of bitstreams: 2 Dissertação - Francisco de A P Januário.pdf: 1215702 bytes, checksum: 7f02a7976f19b94633a48b22a4990adf (MD5) ficha_catalografica.pdf: 1919 bytes, checksum: cbf0df9103c43df7202f18e8010435b9 (MD5) / Approved for entry into archive by Divisão de Documentação/BC Biblioteca Central (ddbc@ufam.edu.br) on 2015-08-04T15:38:25Z (GMT) No. of bitstreams: 2 Dissertação - Francisco de A P Januário.pdf: 1215702 bytes, checksum: 7f02a7976f19b94633a48b22a4990adf (MD5) ficha_catalografica.pdf: 1919 bytes, checksum: cbf0df9103c43df7202f18e8010435b9 (MD5) / Made available in DSpace on 2015-08-04T15:38:25Z (GMT). No. of bitstreams: 2 Dissertação - Francisco de A P Januário.pdf: 1215702 bytes, checksum: 7f02a7976f19b94633a48b22a4990adf (MD5) ficha_catalografica.pdf: 1919 bytes, checksum: cbf0df9103c43df7202f18e8010435b9 (MD5) Previous issue date: 2015-04-01 / CNPq - Conselho Nacional de Desenvolvimento Científico e Tecnológico / The development of programs written in Lua programming language, which is largely used in applications for digital TV and games, can cause errors, deadlocks, arithmetic overflow, and division by zero. This work aims to propose a methodology for checking programs written in Lua programming language using the Efficient SMT-Based Context-BoundedModel Checker (ESBMC) tool, which represents the state-of-the-art context-bounded model checker. It is used for ANSI-C/C++ programs and has the ability to verify array out-of-bounds, division by zero, and user-defined assertions. The proposed approach consists in translating programs written in Lua to an intermediate language, which are further verified by ESBMC. The translator is developed with the ANTLR (ANother Tool for Language Recognition) tool, which is used for developing the lexer and parser, based on the Lua language grammar. This work is motivated by the need for extending the benefits of bounded model checking, based on satisfiability modulotheories, to programs written in Lua programming language. The experimental results show that the proposed methodology can be very effective, regarding model checking (safety) of Luaprogramming language properties. / O desenvolvimento de programas escritos na linguagem de programação Lua, que é muito utilizada em aplicações para TV digital e jogos, pode gerar erros, deadlocks, estouro aritmético e divisão por zero. Este trabalho tem como objetivo propor uma metodologia de verificação para programas escritos na linguagem de programação Lua usando a ferramenta Efficient SMT-Based Context-Bounded Model Checker (ESBMC), que representa o estado da arte em verificação de modelos de contexto limitado. O ESBMC é aplicado a programas embarcados ANSI-C/C++ e possui a capacidade de verificar estouro de limites de vetores, divisão por zero e assertivas definidas pelo usuário. A abordagem proposta consiste na tradução de programas escritos em Lua para uma linguagem intermediária, que é posteriormente verificada pelo ESBMC. O tradutor foi desenvolvido com a ferramenta ANTLR (do inglês “ANother Tool for Language Recognition”), que é utilizada na construção de analisadores léxicos e sintáticos, a partir da gramática da linguagem Lua. Este trabalho é motivado pela necessidade de se estender os benefícios da verificação de modelos, baseada nas teorias de satisfatibilidade, a programas escritos na linguagem de programação Lua. Os resultados experimentais mostram que a metodologia proposta pode ser muito eficaz, no que diz respeito à verificação de propriedades (segurança) da linguagem de programação Lua.

Sabemos que em placas de circuito impresso montadas com tecnologia SMD Surface Mount Device podem ocorrer problemas com a migração eletroquímica. O fenômeno aparece principalmente porque os novos encapsulamentos possuem terminais com espaçamentos muito próximos. A migração eletroquímica pode tornar-se um potencial problema no processo de soldagem eletrônica quando é utilizado a tecnologia Lead Free na montagem das placas. O processo de migração eletroquímica ocorre quando temos metal, isolante e metal, em ambiente de alta umidade e sobre polarização elétrica, o metal deixa a posição inicial em forma de íon e se redeposita sobre o isolante. Em uma placa de circuito impresso, dois terminais adjacentes podem tornar-se eletrodos, dessa forma as dendritas crescem do cátodo para o ânodo. Podem aparecer diferentes morfologias com diferentes elementos envolvidos no processo de migração, dependendo da composição da pasta de solda ou acabamento da placa de circuito impresso. Uma estrutura do tipo pente comb feita sobre laminado FR4 foi utilizada nos experimentos. A distância entre as trilhas foram de 102 e 254 mícrons para simular uma distancia real dos terminais dos dispositivos. Os fatores considerados durante os experimentos foram: A distancia entre os terminais na estrutura (102 ou 254 mícrons), tensão aplicada (2 ou 3 V). Foi observado que a pasta de solda e o acabamento final não influenciam no processo de migração eletroquímica. O Estanho foi o principal metal que migrou. Todos os resultados obtidos nesse estudo concordam com a literatura. / It is well known that in printed circuits boards assembled by SMT technology may occur Electrochemical migration (ECM). This phenomenon appears mainly because the new packaging has the terminals very close. Also the Electrochemical migration may become a potential reliability problem in electronic soldering when lead free technology is used in soldering electronic devices. Electrochemical migration is an electrochemical process where metal on an insulating material, in a humid environment and under an applied electric field, leaves its initial location in ionic form and redeposit. In a PCB two adjacents terminal may behave as electrodes so the dendrites grow from cathode to anode. It can show different morphologies with the different migration elements involved depending on the solder paste composition or PCB surface finishing. A structure with a comb shape printed on FR4 substrate was used in the experiments. The distance between the fingers in the structure was 102 or 254 microns, in order to simulate a real distance between dispositive terminals. The factors considered during the experiments were surface finishing (ENIG or HASL), solder paste composition, distance between terminals (102 or 254 microns) and applied voltage (2 or 3 V). It was observed that the solder paste and the surface finishing dont influence the ECM process. Tin was the main metal that migrates. All the results obtained in these study agrees with the literature.

Organizational changes are inevitable, yet up to 70% fail. Technological development and competition in a volatile environment require more flexible organizations. As such, implementing self-managed teams (SMTs) has become a more common approach. The fact that SMTs ought to be self-managed has further raised a debate, since it is argued that some form of manager still is required. Therefore, the following research question was proposed; How does the interplay of influences unfold between the manager and the organizational context when implementing SMTs? The purpose of the study is to increase the understanding of how different activities, events and actions during a change process of implementing SMTs influence the manager, as well as how the manager influences the change process of implementing SMTs. The research was conducted by a qualitative, abductive approach based on a case study. The results show that managers influence perceived history of change, control and the SMTs. Managers are influenced by perceived history of change, employee commitment to change, control, and by the SMT. These influences determine how the manager is influenced by, and how the manager influences the organizational change towards the implementation of SMTs.

La traduction automatique de texte arabe a reçu beaucoup d'attention au cours de la dernière décennie. La langue arabe, langue officielle de plus de 25 pays, est parlée par plus de 290 millions de personnes. Les changements politiques engendrés par les révolutions arabes ont mis sur le devant de la scène cette langue et ses multiples dialectes. Ce travail s'inscrit dans le cadre du projet BOLT dont le but est d'améliorer les performances des systèmes de traduction arabe-anglais pour des domaines spécifiques (SMS, parole conversationnelle, etc.)Dans cette thèse, j'ai enrichi le système de traduction à base de segments du LIUM à maints égards. Les systèmes à base de segments fournissent actuellement les meilleures performances. Ces systèmes sont basés sur deux modèles statistiques : le modèle de traduction et le modèle de langage. Dans l'objectif d’améliorer la qualité de traduction de l'arabe, nous avons mis l'accent sur trois aspects. Le premier aspect est la réduction des mots inconnus dans la sortie de traduction. Le second aspect de mon travail de thèse est l'adaptation au domaine ou à la tâche de la table de traduction. Finalement, je me suis intéressé à l'amélioration de la modélisation linguistique avec des réseaux de neurones. Ces modèles sont utilisés pour re-évaluer les n-meilleures hypothèses de traduction.Toutes les techniques développées ont été minutieusement incorporées dans le système du LIUM et évaluées dans trois campagnes d’évaluation internationales dans le cadre du projet BOLT. / The Arabic language received a lot of attention in the machine translation community during the last decade. It is the official language of 25 countries and it is spoken by more than 380 million people. The interest in Arabic language and its dialects increased more after the Arab spring and the political change in the Arab countries. In this thesis, I worked on improving LIUM's machine translation system for Arabic-English in the frame-work of the BOLT project.In this thesis, I have extend LIUM's phrase-based statistical machine translation system in many ways. Phrase-based systems are considered to be one of the best performing approaches. Basically, two probabilistic models are used, a translation model and a language model.I have been working on improving the translation quality. This is done by focusing on three different aspects. The first aspect is reducing the number of unknown words in the translated output. Second, the entities like numbers or dates that can be translated efficiently by some transfer rules. Finally, I have been working on the transliteration of named entities. The second aspect of my work is the adaptation of the translation model to the domain or genre of the translation task.Finally, I have been working on improved language modeling, based on neural network language models, also called continuous space language models. They are used to rescore the n-best translation hypotheses.All the developed techniques have been thoroughly evaluated and I took part in three international evaluations of the BOLT project.