The DMA(direct memory access) controller is a special component in DSP processor used to offload the data transferring from CPU and improve the data access efficiency in the microprocessor. This paper describes the design and implementation of DMA(direct memory access) device for microprocessor developed using C++ Language and SystemC libraries. The main facts covered within this report are the structure of a microprocessor with embedded DMA, and some interesting points of SystemC and TLM library that are useful for the design and implementation of the system level design. This paper starts with an introduction of the theory of DMA , the structure of the microprocessor and the multicore microprocessor. Next it goes further into the DMA specification discussion. The next chapter is the implementation of DMA and the microsystem, later on in this chapter is an explanation of the SystemC methods I used in the system design. At last, the simulation results of the whole system is presented and analyzed. The utility of the DMA is discussed and calculated. With all these aspects covered in the paper, it is easy for the readers to understand the DMA theory , micro architecture as well as the fundamental knowledge of SystemC.

The production testing cost of modern wireless communication systems, especially basestation units, is estimated to be as high as 30-40 percent of their manufacturing cost and is increasing with system complexity, high levels of device integration and scaling of CMOS process technology and operating frequencies. The major production testing challenges for RF transceivers are: (a) the high cost of automated test development because of system-level simulation difficulties and the large simulation times involved, (b) the high cost of using high-end, communication protocol-aware RF test instrumentation, and (c) lack of external test access to RF circuits embedded inside integrated transceivers. Consequently, there exists a need for developing efficient design-for-test methodologies and non-invasive system-level test techniques for wireless transceivers to reduce their test cost. This dissertation is focused towards development of new system-level alternate test methodologies for RF transceiver architectures. The research proposes using non-invasive testing techniques for RF subsystems and digital-compatible built-in testing techniques for baseband and intermediate frequency (IF) analog circuits. The objectives of this research are: (a) to develop automatic test stimulus generation algorithms that allow accurate determination of targeted RF system-level test specification values using behavioral modeling and simulation techniques, (b) to develop RF transceiver test techniques that allow testing of embedded RF systems with limited test access, while reducing the test time for complex RF and baseband system-level performance metrics (b) to significantly reduce the test instrumentation overhead for testing complex frequency-domain and modulation-domain system specifications. The feasibility and the cost benefits of using the proposed alternate test approaches have been demonstrated using 900 MHz and 1575 MHz transceiver prototypes.

Modeliavimas aukštame abstrakcijos lygmenyje dažnai naudojamas išankstiniam kompromisų analizavimui vienlusčių sistemų projektavimo procese. Šiose magistro tezėse apžvelgiami du daugiausiai žadantys sisteminio lygmens specifikavimo metodai – vieninga modeliavimo kalba (UML) ir į aktorius orientuotas modeliavimas bei galimybės naudoti šiuos metodus kartu. Elgsenos projektavimo pavyzdžių abstrakcijos naudingos supaprastinant į duomenų perdavimą orientuotų sistemų projektavimą. Tradiciškai šie šablonai aprašomi naudojant UML diagramas, tačiau UML trūksta modelio vykdymą aprašančios sintaksės, dėl ko negalima atlikti UML šablonų modeliavimo kartu su šiuo metu vyraujančia vykdomųjų aprašymų technologija sisteminio lygmens projektavimui. Šiame dokumente pateikiamas metodas, kaip integruoti UML elgsenos šablonus kartu su vykdomaisiais sistemos modeliais. Šis metodas remiasi į aktorius orientuotu modeliavimu ir realizuotas kaip Ptolemy II papildymas. / Modeling at high levels of abstraction is often a need for early trade-off analysis within the Systems-on-Chip design flow. This master thesis overviews two the most promising approaches for system-level specification – Unified Modeling Language (UML) and actor oriented modeling. Also here is presented some possibilities of joint usage of those two approaches. Behavioral patterns are useful abstractions to simplify the design of the communication-centric systems. Such patterns are traditionally described using UML diagrams, but the lack of execution semantics in UML prevents the co-validation of the patterns together with simulation models and executable specifications which are the mainstream in today's system level design flows. In this paper there is described a method to validate UML-based behavioral patterns within executable system models. The method is based on actor orientation and was implemented as an extension of the Ptolemy II framework.

No description available.

Multithreading is a processor technique that can effectively hide long latencies that can occur due to memory accesses, coprocessor operations and similar. While this looks promising, there is an additional hardware cost that will vary with for example the number of contexts to switch to and what technique is used for it and this might limit the possible gain of multithreading. Network processors are, traditionally, multiprocessor systems that share a lot of common resources, such as memories and coprocessors, so the potential gain of multithreading could be high for these applications. On the other hand, the increased hardware required will be relatively high since the rest of the processor is fairly small. Instead of having a multithreaded processor, higher performance gains could be achieved by using more processors instead. As a solution, a simulator was built where a system can effectively be modelled and where the simulation results can give hints of the optimal solution for a system in the early design phase of a network processor system. A theoretical background to multithreading, network processors and more is also provided in the thesis.

Abstract The aim of this thesis is to devise novel co-primary spectrum sharing (CoPSS) methods for future fifth generation (5G) networks and beyond. The target is to improve data rates of small cell networks (SCNs) in which mobile network operators (MNOs) share their dedicated frequency spectrum (spectrum pooling) or a common spectrum (mutual renting). The performance of the proposed methods is assessed through extensive system-level simulations. MNOs typically acquire exclusive usage rights for certain frequency bands and have little incentive to share spectrums with other operators. However, due to higher cost and spectrum scarcity at lower frequencies it is expected that efficient use of the spectrum in 5G networks will rely more on spectrum sharing than exclusive licenses. This is especially true for new higher candidate frequencies (> 6 GHz) that do not have a pre-existing spectrum regulation framework. In the first part of the thesis, we tackle the challenge of providing higher data rates within limited spectral resources. Each SCN MNO has its own dedicated spectrum, and each MNO defines a percentage of how much its spectrum it is willing to share. The idea of the proposed CoPSS algorithms is that the spectrum is dynamically shared among MNOs based on their spectrum utilization, which is shared among MNOs in the network. This way interference can be avoided and spectrum utilization is maximized. Unused resources are shared equally between overloaded MNOs for a given time instant. Thus, only short-term fairness among overloaded SCNs can be guaranteed. In the second part, we consider a multi-operator small cell network where MNOs share a common pool of radio resources. The goal is to ensure the long term fairness of spectrum sharing without coordination among small cell base stations. We develop a decentralized control mechanism for base stations using the Gibbs sampling based learning tool, which allocates suitable amount of the spectrum for each base station while avoiding interference from SCNs and maximizing the total network throughput. In the studied scenarios, we show the importance of coordination among MNOs when the dedicated spectrum is shared. However, when MNOs share a common spectrum, a decentralized control mechanism can be used to allocate suitable amounts of spectrum for each base station. The proposed algorithms are shown to be effective for different network layouts, by achieving significant data rate enhancements with a low overhead. / Tiivistelmä Tämä väitöskirja keskittyy kehittämään uusia menetelmiä, joilla jaetaan taajuuksia useiden operaattoreiden kesken tulevista viidennen sukupolven verkoista alkaen. Päätavoite on parantaa tiedonsiirtonopeuksia sellaisissa piensoluverkoissa, joissa matkapuhelinoperaattorit jakavat joko heidän omia taajuusalueitaan tai heillä yhteisomistuksessa olevia taajuuksia. Kehitettyjen menetelmien suorituskykyä arvioidaan mittavien järjestelmätason simulointien avulla. Matkapuhelinoperaattorit tyypillisesti omistavat yksin tietyt taajuusalueet, eivätkä ole valmiita jakamaan niitä. On kuitenkin oletettu, että tulevaisuudessa matkapuhelinoperaattorit joutuvat jakamaan taajuuksia, koska taajuusalueet ovat kalliita ja niukkoja erityisesti matalilla taajuusalueilla. Korkeammat taajuusalueet (> 6 GHz) puolestaan muodostavat otollisen alustan tehokkaalle spektrin jaetulle käytölle, koska niillä ei ole vielä olemassa olevaa taajuussääntelyä. Väitöskirjan ensimmäisessä osassa keskitytään kasvattamaan tiedonsiirtonopeuksia kun jokainen matkapuhelinoperaattori omistaa oman taajuuskaistansa ja matkapuhelinoperaattorit määrittävät kuinka suuren prosentuaalisen osuuden ovat valmiita jakamaan. Esitettyjen algoritmien päätavoite on jakaa taajuuksia dynaamisesti matkapuhelinoperaattoreiden kesken. Algoritmeissa hyödynnetään tietoa matkapuhelinoperaattoreiden taajuuden käyttöasteesta, jonka matkapuhelinoperaattoritkommunikoivat toisilleen. Näin häiriö voidaan välttää ja taajuuden käyttö maksimoidaan. Käyttämättömät taajuudet jaetaan tasaisesti matkapuhelinoperaattorien kesken tietyllä ajanhetkellä. Näin voidaan taata lyhytaikainen oikeudenmukainen taajuuksien käyttö, mutta ei pitkäaikaista oikeudenmukaista taajuuksien käyttöä. Väitöskirjan toisessa osassa matkapuhelinoperaattorit jakavat yhteisomistuksessa olevia taajuuksia. Tavoitteena on saavuttaa pitkäaikainen taajuuksien oikeudenmukainen käyttö, kun piensoluverkot eivät kommunikoi keskenään. Työssä kehitetään piensoluverkoille hajautettu algoritmi, joka perustuu oppimistyökaluun Gibbs-näytteistys. Näin saadaan allokoitua jokaiselle tukiasemalle tarvittava määrä taajuusresursseja niin, että häiriö tukiasemien välillä minimoidaan ja koko piensoluverkon suorituskyky maksimoidaan. Tutkituissa skenaarioissa osoitetaan matkapuhelinoperaattoreiden välisen koordinaation tärkeys, kun jaetaan omia taajuusalueita. Toisaalta kun operaattorit jakavat yhteisomistuksessa olevia taajuuksia on mahdollista käyttää algoritmeja, joissa ei ole koordinaatiota matkapuhelinoperaattoreiden kesken. Väitöskirjassa vahvistetaan kehitettyjen algoritmien olevan tehokkaita ja sopivan monenlaisiin verkkoympäristöihin saavuttaen merkittäviä parannuksia tiedonsiirtonopeuteen ilman suuria kustannuksia.

Sustainable manufacturing is becoming increasingly important due to scarcity of natural resources, stricter regulations and increasing customer demand for sustainable products. Sustainable manufacturing involves the use of sustainable processes and systems to produce more sustainable products. In order to meet these demands for sustainable products, manufacturing companies have to adopt numerous strategies to achieve sustainable manufacturing. The approach for evaluating sustainable products and processes have been investigated in previous work where product/process sustainability indices were proposed. However, no comprehensive methods are available for sustainable manufacturing performance evaluation at the system level. This work aims to develop two alternate methods for evaluating sustainable manufacturing performance at enterprise, plant and production line levels. First, requirements for a sustainability metrics framework are identified through studying and reviewing existing literature where the three pillars of sustainability, total life-cycle stages, and 6R concepts are concurrently addressed. Then index-and value-based methods are proposed to evaluate sustainable manufacturing performance by conducting assessment on economic, environmental and societal aspects. Finally, the application of these two methods is illustrated for a representative enterprise producing consumer electronics at the enterprise level; a case study for a satellite television dish production is used to demonstrate the application of these methods at the production line level. Results obtained from these two methods are compared and analyzed at the enterprise level. The proposed methods can provide information to a company to identify improvement strategies and for decision making for sustainable development.

In this thesis, we proposed the use of device-to-device (D2D) communications for extending the coverage area of active base stations, for public safety communications with partial coverage. A 3GPP standard compliant D2D system level simulator is developed for HetNets and public safety scenarios and used to evaluate the performance of D2D discovery and communications underlying cellular networks. For D2D discovery, the benefits of time-domain inter-cell interference coordi- nation (ICIC) approaches by using almost blank subframes were evaluated. Also, the use of multi-hop is proposed to improve, even further, the performance of the D2D discovery process. Finally, the possibility of using multi-hop D2D communications for extending the coverage area of active base stations was evaluated. Improvements in energy and spectral efficiency, when compared with the case of direct UE-eNB communi- cations, were demonstrated. Moreover, UE power control techniques were applied to reduce the effects of interference from neighboring D2D links.

Energy consumption has become one of the main design constraints in today’s integrated circuits. Techniques for energy optimization, from circuit-level up to system-level, have been intensively researched. The advent of large-scale integration with deep sub-micron technologies has led to both high power densities and high chip working temperatures. At the same time, leakage power is becoming the dominant power consumption source of circuits, due to continuously lowered threshold voltages, as technology scales. In this context, temperature is an important parameter. One aspect, of particular interest for this thesis, is the strong inter-dependency between leakage and temperature. Apart  from leakage power, temperature also has an important impact on circuit delay and, implicitly, on the frequency, mainly through its influence on carrier mobility and threshold voltage. For power-aware design techniques, temperature has become a major factor to be considered. In this thesis, we address the issue of system-level energy optimization for real-time embedded systems taking temperature aspects into consideration. We have investigated two problems in this thesis: (1) Energy optimization via temperature-aware dynamic voltage/frequency scaling (DVFS). (2) Energy optimization through temperature-aware idle time (or slack) distribution (ITD). For the above two problems, we have proposed off-line techniques where only static slack is considered. To further improve energy efficiency, we have also proposed online techniques, which make use of both static and dynamic slack. Experimental results have demonstrated that considerable improvement of the energy efficiency can be achieved by applying our temperature-aware optimization techniques. Another contribution of this thesis is an analytical temperature analysis approach which is both accurate and sufficiently fast to be used inside an energy optimization loop.

Conventional fixed base walls are typically characterized by yielding that results in permanent damage, residual drifts and costly losses due to the service shutdown for structural repairs. Controlled rocking masonry walls have been developed as a solution to prevent structural damage when seismic events take place. These systems purposely allow the wall to rock from its foundation and have an uplift at the base, thus replacing the typical yielding at the base of conventional fixed-base walls. Controlled rocking masonry walls have traditionally been controlled by using unbonded post-tensioning strands to provide the self-centering behaviour. Although post-tensioning has shown favourable results, its implementation is difficult in practical applications, and post-tensioning losses due to yielding of the strands at large deformations can reduce their self-centering ability. In order to overcome such issues, an alternative controlled rocking system for masonry walls was developed recently, which is designed to self-center through vertical gravity loads only, instead of the post-tensioning tendons. The rocking response of this alternative system is controlled by using energy dissipation devices, so the system is referred to as Energy Dissipation-Controlled Rocking Masonry Walls (ED-CRMWs). The vertical gravity loads are primarily transferred to the ED-CRMWs from the floor slab at each level. Therefore, the wall-slab interaction should be investigated in order to ensure a fully resilient system. In this regard, the current study identifies and categorizes the potential issues that are expected to occur due to the interaction between the wall rocking mechanism and the floor slab, and then investigates the most common of these issues using a parametric study. The parametric study focuses on the vertical incompatibility of displacements that a hollow- core slab suffers when its supporting walls uplift by different displacements during seismic events. Three different spans, four different cross-sections and two different alternatives of prestress configurations are considered in this study. The models were developed using ABAQUS 6.18 commercial software. The results show the cracking/yielding behaviour of the slabs and their displacement capacities at five different stages. The obtained results are promising for the usage of hollow-core slabs on ED-CRMWs or similar systems that require this interaction, as the range of displacement capacities can accommodate many of the vertical displacement incompatibilities expected in many potential situations. / Thesis / Master of Applied Science (MASc)