Dual head placement machines are commonly used in industry for placing components on circuit cards with great speed and accuracy. This thesis evaluates a novel approach for prescribing process plans for circuit card assembly on dual head placement machines. Process planning involves assigning component types to heads and to feeder slots associated with each head and prescribing appropriate sequences of picking, placing and nozzle-changing steps. The approach decomposes these decisions into four inter-related problems: P1, P2, P3 and P4. This thesis reviews this approach; presents a new heuristic to address P1; a method to facilitate P2 and P3 solutions; a method to control nozzle changes in P4; tests approaches to P1, P2, P3 and P4; and presents a thorough analysis of computational results to evaluate the efficacy of the approach which aims to balance workloads on machine heads to maximize assembly line throughput.

Circuit breakers are used in the power system to break or make current flow through power apparatus. Reliable operation of circuit breakers is critical to the well- being of the power system and can be achieved by regular inspection and maintenance. A low-cost automated circuit breaker monitoring system is developed to monitor circuit breaker control signals. An interface is designed on top of which different local and system-wide applications can be developed which utilize the data recorded by the system. Some of the possible applications are proposed. Lab and field evaluation of the designed system is performed and results are presented.

This work presents design techniques for the implementation of high-speed analog integrated circuits for wireless and wireline communications systems. Limitations commonly found in high-speed switched-capacitor (SC) circuits used for intermediate frequency (IF) filters in wireless receivers are explored. A model to analyze the aliasing effects due to periodical non-uniform individual sampling, a technique used in high-Q high-speed SC filters, is presented along with practical expressions that estimate the power of the generated alias components. The results are verified through circuit simulation of a 10.7MHz bandpass SC filter in TSMC 0.35mu-m CMOS technology. Implications on the use of this technique on the design of IF filters are discussed. To improve the speed at which SC networks can operate, a continuous-time common-mode feedback (CMFB) with reduced loading capacitance is proposed. This increases the achievable gain-bandwidth product (GBW) of fully-differential ampli- fiers. The performance of the CMFB is demonstrated in the implementation of a second-order 10.7MHz bandpass SC filter and compared with that of an identical filter using the conventional switched-capacitor CMFB (SC-CMFB). The filter using the continuous-time CMFB reduces the error due to finite GBW and slew rate to less than 1% for clock frequencies up to 72MHz while providing a dynamic range of 59dB and a PSRR- > 22dB. The design of high-speed transversal equalizers for wireline transceivers requires the implementation of broadband delay lines. A delay line based on a third-order linear-phase filter is presented for the implementation of a fractionally-spaced 1Gb/s transversal equalizer. Two topologies for a broadband summing node which enable the placement of the parasitic poles at the output of the transversal equalizer beyond 650MHz are presented. Using these cells, a 5-tap 1Gb/s equalizer was implemented in TSMC 0.35mu-m CMOS technology. The results show a programmable frequency response able to compensate up to 25dB loss at 500MHz. The eye-pattern diagrams at 1Gb/s demonstrate the equalization of 15 meters and 23 meters of CAT5e twistedpair cable, with a vertical eye-opening improvement from 0% (before the equalizer) to 58% (after the equalizer) in the second case. The equalizer consumes 96mW and an area of 630mu-m x 490mu-m.

The finite-Difference Time Domain method (FDTD) derives the discrete form of the Maxwell¡¦s equations with second-order central difference with the electromagnetic distribution of the Yee space lattice, and computes the value of the electric field and magnetic field in the simulation space using leapfrog for time derivatives. This method is different from the frequency domain method which needs to analyze its value individually (ex. Finite Element method). The frequency domain method needs to take a long time for analyzing the response on each spectrum point when the bandwidth is very wide. The advantage of time domain analysis is to obtain the complete frequency response from the simulation value through Fourier Transform method. It¡¦s difficult to combine the electromagnetic analysis with the lumped circuit simulation in current simulation CAD. Thereby the performance of the simulation result and the practical implementation always causes error. The FDTD method is the full-wave algorithm which can also simulate the lump element, nonlinear element or active element in simulation space by linking to SPICE or S-parameter. In this dissertation, an efficient scheme for processing arbitrary one-port devices in the finite-difference time-domain (FDTD) method is proposed. Generally speaking, methods invoking analytic pre-processing of the device¡¦s V-I relations (admittance or impedance) are computationally more efficient than methods employing numerical procedure to iteratively process the device at each time step. The accuracy of the proposed method is verified by comparison with results from the equivalent current-source method and is numerically stable.

In this thesis, we study the discontinuity structure electromagnetic effect of multilayer printed circuit board in three sections. In first section, we introduced a modeling approach which is based on transmission line theory , and simulated with a series of test boards ,such as regular and irregular power delivery system and multilayer with via structure, finally ,we confirmed that the modeling approach is an efficient simulation and agreed fairly well with 3D full-wave method. In second section, we demonstrated the return current is disrupted at the via or broken at the power / ground plane with slots , the impedance becomes extremely high at the resonance frequencies of the power / ground plane cavity and via could be a major cause of the simultaneous switching noise generation, signal quality problem, and edge radiated emission in multi-layer PCB. In final section, we provided a effective reduction mechanism to eliminate the noise or EMI, which has been achieved using island with shorting vias and combining with the modeling approach can simulate and estimate effectively.

Abstract: This thesis is concerned with the acquisition of body signals using a sampling system. A typical application is the recording of the electrocardiogram (ECG). It is proposed to sample the input signal at different rates, depending on the momentary signal content. If the input signal has large voltage variation, it is sampled at a high rate. During periods of small variation, the signal is sampled at a lower frequency to save both memory and power. An analog controller to control the clock rate is proposed and implemented. The analog controller decides the sample frequency (high rate or low rate) depending on the input signal. The analysis of the proposed system is presented in this thesis. Furthermore, a working prototype is implemented using discrete components on a PCB. The measured results show a significant reduction in the average sample frequency and data rate of 50% and 35%, respectively. Finally, the critical analog circuit blocks of the system suitable for integration on chip are proposed and implemented in a 0.35£gm CMOS process. Measured results are reported to confirm the functionality of the blocks.

In a wireless communication system, the RF signal integrity is often deteriorated by power amplifier (PA) nonlinearity and local oscillator (LO) pulling. This dissertation attempts to study power amplifier and local oscillator with the deliberate input distortion or interference for understanding, and hence improving, the resultant RF signal integrity issues. Furthermore, the scope of this study is extended to explore novel wireless applications. Based on the above thoughts, this dissertation includes three topics. The first topic is devoted to a baseband digital predistortion technique for enhancing the power amplifier linearity in a wireless RF transmitter. A digital predistorter has been designed to compensate the amplitude and phase distortion due to the nature of PAs, and the predistortion can enhance the linearity of linear PAs as well as switching-mode PAs. The second topic proceeds with a rigorous analysis of a local oscillator subject to injection signal. A phase-locked loop (PLL) under injection is analyzed in frequency domain to account for the inherent band-pass filtering on an injection signal. Such analysis can further predict the effect of co-frequency or co-channel interference on the PLL phase noise. A discrete-time analysis is also provided to predict output spectra of the LO pulled by a sinusoidal and modulated injection signal. The final topic presents a novel RF sensing circuit for a cognitive radio to sense spectral environment using injection locking and frequency demodulation techniques. The proposed RF sensing circuit can fast and reliably detect frequency and power for analog and digital modulation signals. In addition, the sensing principle and circuit architecture are delivered on theoretical basis developed in this dissertation. A discrete time approach is also investigated to compute the sensed output signal.

Thesis (Ph. D.)--School of Electrical and Computer Engineering, Georgia Institute of Technology, 2004. Directed by Madhaven Swaminathan. / Vita. Includes bibliographical references (leaves 154-163).

Thesis (Ph. D.)--School of Electrical and Computer Engineering, Georgia Institute of Technology, 2004. Directed by James D. Miendl. / Vita. Includes bibliographical references.

Thesis (Ph. D.)--University of Washington, 2002. / Vita. Includes bibliographical references (leaves 81-85).