<p>In the 3G standards, wireless communication system can support 2 Mb/s. With this data rate, multimedia communication is realized on handset. However, it is expected that new applications will require even higher data rates in future. In order to fulfil the growing requirement of high data rate, 100 Mb/s is considered as the aim of 4G standards. Such high data rate will result in very large power consumption, which is unacceptable considering the current battery capability. Therefore, reducing the power consumption of turbo decoders becomes a major issue to be solved. This report explores new techniques for implementing low power, small area and high throughput turbo decoders.</p>

Turbo-codes have attracted an explosion of interest since their discovery in 1993: for the first time, the gap with the limits predicted by information and coding theory was on the way to be bridged. The astonishing performance of turbo-codes relies on two major concepts: code concatenation so as to build a powerful global code, and iterative decoding in order to efficiently approximate the optimal decoding process. As a matter of fact, the techniques involved in turbo coding and in the associated iterative decoding strategy can be generalized to other problems frequently encountered in digital communications. This results in a so-called turbo principle. A famous application of the latter principle is the communication scheme referred to as turbo-equalization: when considering coded transmission over a frequency-selective channel, it enables to jointly and efficiently perform the equalization and decoding tasks required at the receiver. This leads by the way to significant performance improvement with regard to conventional disjoint approaches. In this context, the purpose of the present thesis is the derivation and the performance study of novel digital communication receivers, which perform iterative joint detection and decoding by means of the turbo principle. The binary turbo-equalization scheme is considered as a starting point, and improved in several ways, which are detailed throughout this work. Emphasis is always put on the performance analysis of the proposed communication systems, so as to reach insight about their behavior. Practical considerations are also taken into account, in order to provide realistic, tractable, and efficient solutions.

Recent advancements in iterative processing have allowed communication systems to perform close to capacity limits withmanageable complexity.For manychannels such as the AWGN and flat fading channels, codes that perform only a fraction of a dB from the capacity have been designed in the literature. In this dissertation, we will focus on the design and analysis of near-capacity achieving codes for another important class of channels, namely inter-symbol interference (ISI)channels. We propose various coding schemes such as low-density parity-check (LDPC) codes, parallel and serial concatenations for ISI channels when there is no spectral shaping used at the transmitter. The design and analysis techniques use the idea of extrinsic information transfer (EXIT) function matching and provide insights into the performance of different codes and receiver structures. We then present a coding scheme which is the concatenation of an LDPC code with a spectral shaping block code designed to be matched to the channel??s spectrum. We will discuss how to design the shaping code and the outer LDPC code. We will show that spectral shaping matched codes can be used for the parallel concatenation to achieve near capacity performance. We will also discuss the capacity of multiple antenna ISI channels. We study the effects of transmitter and receiver diversities and noisy channel state information on channel capacity.

This thesis aims at providing results and insight towards the application of turbo-codes in digital communication systems, mainly in three parts. The first part considers systems of combined turbo-code and modulation. This section follows the pragmatic approach of the first proposed such system. It is shown that by optimizing the labeling method and/or modifying the puncturing pattern, improvements of more than 0. 5 dB insignal to noise ratio (SNR) are achieved at no extra cost of energy, complexity, or delay. Conventional turbo-codes with binary signaling divide the bit energy equally among the transmitted turbo-encoder output bits. The second part of this thesis proposes a turbo-code scheme with unequal power allocation to the encoder output bits. It is shown, both theoretically and by simulation, that by optimizing the power allocated to the systematic and parity check bits, improvements of around 0. 5 dB can be achieved over the conventional turbo-coding scheme. The third part of this thesis tackles the question of ``the sensitivity of the turbo-code performance towards the choice of the interleaver'', which was brought up since the early studies of these codes. This is the first theoretical approach taken towards this subject. The variance of the bound is evaluated. It is proven that the ratio of the standard deviation over the mean of the bound is asymptotically constant (for large interleaverlength, N), decreases with N, and increases with SNR. The distribution of the bound is also computationally developed. It is shown that as SNR increases, a very low percentage of the interleavers deviate quite significantly from the average bound but the majority of the random interleavers result in performances very close to the average. The contributions of input words of different weights in the variance of performance bound are also evaluated. Results show that these contributions vary significantly with SNR and N. These observations are important when developing interleaver design algorithms.

Wireless communication is always struggling with errors in the transmission. The digital data received from the radio channel is often erroneous due to thermal noise and fading. The error rate can be lowered by using higher transmission power or by using an effective error correcting code. Power consumption and limits for electromagnetic radiation are two of the main problems with handheld devices today and an efficient error correcting code will lower the transmission power and therefore also the power consumption of the device. Duo-binary CTC is an improvement of the innovative turbo codes presented in 1996 by Berrou and Glavieux and is in use in many of today's standards for radio communication i.e. IEEE 802.16 (WiMAX) and DVB-RSC. This report describes the development of a duo-binary CTC decoder and the different problems that were encountered during the process. These problems include different design issues and algorithm choices during the design. An implementation in VHDL has been written for Alteras Stratix II S90 FPGA and a reference-model has been made in Matlab. The model has been used to simulate bit error rates for different implementation alternatives and as bit-true reference for the hardware verification. The final result is a duo-binary CTC decoder compatible with Alteras Stratix II designs and a reference model that can be used when simulating the decoder alone or the whole signal processing chain. Some of the features of the hardware are that block sizes, puncture rates and number of iterations are dynamically configured between each block Before synthesis it is possible to choose how many decoders that will work in parallel and how many bits the soft input will be represented in. The circuit has been run in 100 MHz in the lab and that gives a throughput around 50Mbit with four decoders working in parallel. This report describes the implementation, including its development, background and future possibilities.

In the 3G standards, wireless communication system can support 2 Mb/s. With this data rate, multimedia communication is realized on handset. However, it is expected that new applications will require even higher data rates in future. In order to fulfil the growing requirement of high data rate, 100 Mb/s is considered as the aim of 4G standards. Such high data rate will result in very large power consumption, which is unacceptable considering the current battery capability. Therefore, reducing the power consumption of turbo decoders becomes a major issue to be solved. This report explores new techniques for implementing low power, small area and high throughput turbo decoders.

This thesis aims at providing results and insight towards the application of turbo-codes in digital communication systems, mainly in three parts. The first part considers systems of combined turbo-code and modulation. This section follows the pragmatic approach of the first proposed such system. It is shown that by optimizing the labeling method and/or modifying the puncturing pattern, improvements of more than 0. 5 dB insignal to noise ratio (SNR) are achieved at no extra cost of energy, complexity, or delay. Conventional turbo-codes with binary signaling divide the bit energy equally among the transmitted turbo-encoder output bits. The second part of this thesis proposes a turbo-code scheme with unequal power allocation to the encoder output bits. It is shown, both theoretically and by simulation, that by optimizing the power allocated to the systematic and parity check bits, improvements of around 0. 5 dB can be achieved over the conventional turbo-coding scheme. The third part of this thesis tackles the question of ``the sensitivity of the turbo-code performance towards the choice of the interleaver'', which was brought up since the early studies of these codes. This is the first theoretical approach taken towards this subject. The variance of the bound is evaluated. It is proven that the ratio of the standard deviation over the mean of the bound is asymptotically constant (for large interleaverlength, N), decreases with N, and increases with SNR. The distribution of the bound is also computationally developed. It is shown that as SNR increases, a very low percentage of the interleavers deviate quite significantly from the average bound but the majority of the random interleavers result in performances very close to the average. The contributions of input words of different weights in the variance of performance bound are also evaluated. Results show that these contributions vary significantly with SNR and N. These observations are important when developing interleaver design algorithms.

As the increasing demand for high data-rate multimedia servicesin wireless broadband access, the advance wireless communication technologies have been developed rapidly. The Long-Term Evolution (LTE) is the new standard for wireless broadband access recently specified by the 3GPP(3rd Generation Partnership Project) on the way towards the fourth-generation mobile. In this thesis, we are interested in the 3GPP-LTE technology and focus on the turbo coding technique used therein. By employing MATLAB/Simulink, we build up the turbo codec simulation platform for 3GPP-LTE system. Two convolutional encoders that realize the concept of parallel concatenated convolutional codes (PCCCs) and a quadratic permutation polynomial (QPP) interleaver are used to implement the turbo encoder. The a posteriori probability (APP) decoder built-in Simulink is utilized to design the decoder that performs the soft-input and soft-output Viterbi Algorithm (SOVA). The zero-order hold block is used to control the number of decoding iteration for the iterative decoding process. We carry out the 3GPP-LTE turbo codec performance in the AWGN channel on the developed platform. Various cases that consider different data length, the number of decoding iteration, interleaver and decoding algorithm are simulated. The simulation results are compared to those of the Xilinx 3GPP-LTE turbo codec. The comparisons show that our turbo codec works properly and meets the LTE standard.

This dissertation deals with the design of bandwidth-efficient coding schemes with Low-Density Parity-Check (LDPC) for reliable wireless communications. Code design for wireless channels roughly falls into three categories: (1) when channel state information (CSI) is known only to the receiver (2) more practical case of partial CSI at the receiver when the channel has to be estimated (3) when CSI is known to the receiver as well as the transmitter. We consider coding schemes for all the above categories. For the first scenario, we describe a bandwidth efficient scheme which uses highorder constellations such as QAM over both AWGN as well as fading channels. We propose a simple design with LDPC codes which combines the good properties of Multi-level Coding (MLC) and bit-interleaved coded-modulation (BICM) schemes. Through simulations, we show that the proposed scheme performs better than MLC for short-medium lengths on AWGN and block-fading channels. For the first case, we also characterize the rate-diversity tradeoff of MIMO-OFDM and SISO-OFDM systems. We design optimal coding schemes which achieve this tradeoff when transmission is from a constrained constellation. Through simulations, we show that with a sub-optimal iterative decoder, the performance of this coding scheme is very close to the optimal limit for MIMO (flat quasi-static fading), MIMO-OFDM and SISO OFDM systems. For the second case, we design non-systematic Irregular Repeat Accumulate (IRA) codes, which are a special class of LDPC codes, for Inter-Symbol Interference (ISI) fading channels when CSI is estimated at the receiver. We use Orthogonal Frequency Division Multiplexing (OFDM) to convert the ISI fading channel into parallel flat fading subchannels. We use a simple receiver structure that performs iterative channel estimation and decoding and use non-systematic IRA codes that are optimized for this receiver. This combination is shown to perform very close to a receiver with perfect CSI and is also shown to be robust to change in the number of channel taps and Doppler. For the third case, we look at bandwidth efficient schemes for fading channels that perform close to capacity when the channel state information is known at the transmitter as well as the receiver. Schemes that achieve capacity with a Gaussian codebook for the above system are already known but not for constrained constellations. We derive the near-optimum scheme to achieve capacity with constrained constellations and then propose coding schemes which perform close to capacity. Through linear transformations, a MIMO system can be converted into non-interfering parallel subchannels and we further extend the proposed coding schemes to the MIMO case too.

Turbo Code, due to its excellent error correction capability, has been widely used in many modern wireless digital communication systems as well as data storage systems in recent years. However, because the decoding of the Turbo Code involves finding all the state probability and transition sequence, its hardware implementation is not straightforward as it requires a lot of memory and memory operation. In this thesis, a design of Turbo Code decoder IP (Intellectual Property) is proposed which can be parameterized with different word-lengths and code rates. The design of the core SISO (Soft-In Soft-Out) unit used in Turbo Code decoder is based on the algorithm of SOVA (Soft-Output Viterbi Algorithm). Based on the hybrid trace-back scheme, the SISO proposed in this thesis can achieve fast path searching and path memory reduction which can be up to 70% compared with the traditional trace-back approach. In addition, every iterative of Turbo Code decoding performs two SISO operations on the block of data with normal and interleaving order. In our proposed architecture, these two SISO operations can be implemented on a single SISO unit with only slightly control overhead. In order to improve the bit error rate performance, the threshold and normalization techniques are applied to our design. In addition, the termination criteria circuit is also included in our design such that the iteration cycle of the decoding can be reduced. The proposed Turbo Code decoder has been thoroughly tested and verified, and can be qualified as a robust IP.