Thermocompression bonding of gold is a promising technique for achieving low temperature, wafer-level bonding without the application of an electric field or complicated pre-bond cleaning procedure. The presence of a ductile layer influences the fracture behavior of the bonds. The fabrication process was described. In addition, the effect of plasticity was explored by varying the gold bonding thickness between 0.23 to 1.4 µm. Wafers were bonded at 300°C and two different pressures: 1.25 and 7 MPa. The bond toughness of the specimens were characterized using a four-point bend delamination technique. Cohesive failure was found to be the dominant fracture mode in the thicker films. Bonds made with thin gold films failed adhesively and at lower strain energy release rates. / Singapore-MIT Alliance (SMA)

Thermocompression bonding of gold is a promising technique for the fabrication and packaging microelectronic and MEMS devices. The use of a gold interlayer and moderate temperatures and pressures results in a hermetic, electrically conductive bond. This paper documents work conducted to model the effect of patterning in causing pressure non-uniformities across the wafer and its effect on the subsequent fracture response. A finite element model was created that revealed pattern-dependent local pressure variations of more than a factor of three. This variation is consistent with experimental observations of bond quality across individual wafers A cohesive zone model was used to investigate the resulting effect of non-uniform bond quality on the fracture behavior. A good, qualitative agreement was obtained with experimental observations of the load-displacement response of bonds in fracture tests. / Singapore-MIT Alliance (SMA)

Wafer bonding is a process by which two or more mirror-polished flat surfaces are joined together. This process is increasingly used in microelectronics and microsystems industries as a key fabrication technique for various applications: production of SOI wafers, pressure sensors, accelerometers and all sorts of advanced MEMS. Unfortunately, the lack of reliability of these systems does not allow them to enter the production market. This lack of reliability is often related to the lack of understanding and control of the thermo-mechanical properties of materials used for the fabrication of MEMS (indeed, at this small scale, properties of materials are sometimes quite different than at large scale) but it is also due to the limited knowledge of the different phenomena occurring during the working of these devices, the most detrimental of them being fracture. Among all of these fracture processes, the integrity of the interfaces and, particularly, the interfaces created by wafer bonding is a generic problem with significant technological relevance. In order to understand the bonding behavior of silicon wafers, the interface chemistry occurring during the different steps of the bonding process has been detailed. The formation of strong covalent bonds across the two surfaces is responsible of the high fracture resistance of gwafer bondingh interfaces after appropriate surface treatments and annealing. The bonding process (surface treatments and annealing step) has been optimized toward reaching the best combination of interface toughness and bonding uniformity. The fracture resistance of gwafer bondingh interfaces or interface toughness has been determined using a steady-state method developed in the framework of this thesis. The high sensitivity to geometrical and environmental factors of gwafer bondingh interfaces has been quantified and related to the interface chemistry. A new technique involving the insertion of a dissipative ductile interlayer between the silicon substrate and the top silicon oxide has been proposed in order to increase the overall fracture resistance. A multiscale modeling strategy which involves the description of the interface fracture at the atomic scale, of the plasticity in the thin interlayer at the microscopic scale, and of the macroscopic structure of specimen has been used to guide the optimization of this technique. Numerical simulations have shown the influence of the ductile interlayer parameters (yield strength, workhardening exponent and thickness) and the critical strength of the interface on the overall toughness of such assemblies. A first set of experimental data has allowed increasing the interface toughness by 70%. The critical strength of the interface is finally determined by inverse identification and turns out to be in the expected range of theoretical strength. The knowledge of the strength and the fracture toughness of gwafer bondingh interfaces is of practical importance because these two values can be used in a simple fracture model (e.g. cohesive-zone model) in order to observe the behavior of such interfaces under complex loading using finite element simulations.

Increased power densities in VLSI chips have led to a need to develop cooling methods that can cope with the increased heat produced by such chips. Currently one of the more attractive methods to meet this goal is through the use of two phase flow of a fluid as changing phase of the material allows high heat transfer rates for a low temperature change. To bring this technology to commercialisation a greater understanding of the underlying physics involved at the microscale is required as there is much debate within literature as to what occurs during two phase flow heat transfer at these scales. The work conducted as part of this thesis is a step towards improving the understanding of the mechanisms involved with this process. This thesis describes the fabrication of a novel microchannel structure, which can be used to experimentally characterise two phase heat transfer as it occurs. The final process reported for these microchannels structures provides the basis of a technology for the fabrication of microchannels with increased sensor densities. Two types of microchannel devices have been fabricated for this project. The first device of these was an array of parallel microchannels formed by the reactive ion etching (RIE) of silicon, which was then bonded with Pyrex glass. These microchannels were simple in that sensors were not integrated for local measurement. However the production of these devices incorporated fabrication techniques such as anodic bonding and inductively coupled plasma RIE that were essential to the fabrication of more complex devices. The second device built was a single microchannel that contained an integrated heater and several temperature sensors. The use of wafer bonding enabled the device to take full advantage of both bulk and surface micromachining technology as the placement of the temperature sensors on the channel floor would not be possible with conventional bulk micromachining. The initial microchannel structures demonstrated that wafer bonding could be used to fabricate novel devices, but they highlighted the difficulty of achieving strong anodic bonds due to the presence of dielectric films throughout the fusion bonded wafer stack used in the channel fabrication. To improve the performance of the device the process was optimised through the use of insitu, non-destructive test structures. These structures enabled the uniformity and strength of the bonds to be optimised through visualisation over the whole wafer surface. The integrated sensors enabled temperature measurements to be taken along the channel with a sensitivity 3.60 ΩK-1 while the integrated heater has delivered a controllable and uniform heat flux of 264 kWm-2.

We report the creation of strained silicon on silicon (SSOS) substrate technology. The method uses a relaxed SiGe buffer as a template for inducing tensile strain in a Si layer, which is then bonded to another Si handle wafer. The original Si wafer and the relaxed SiGe buffer are subsequently removed, thereby transferring a strained-Si layer directly to Si substrate without intermediate SiGe or oxide layers. Complete removal of Ge from the structure was confirmed by cross-sectional transmission electron microscopy as well as secondary ion mass spectrometry. A plan-view transmission electron microscopy study of the strained-Si/Si interface reveals that the lattice-mismatch between the layers is accommodated by an orthogonal array of edge dislocations. This misfit dislocation array, which forms upon bonding, is geometrically necessary and has an average spacing of approximately 40nm, in excellent agreement with established dislocation theory. To our knowledge, this is the first study of a chemically homogeneous, yet lattice-mismatched, interface. / Singapore-MIT Alliance (SMA)

Bonded copper interconnects were created using thermo-compression bonding and the dicing yield was used as an indication of the bond quality. SEM images indicated that the Cu was plastically deformed. Our experimental and modeling results indicate that the effective contact area is directly proportional to the applied load. Furthermore, for first time, results have been obtained that indicate that the dicing yield is proportional to the measured bond strength, and the bond strength is proportional to the effective contact area. It is also shown that films with rougher surfaces (and corresponding lower effective bonding areas) have lower bond strengths and dicing yields. A quantitative model for the relationship between measured surface roughness and the corresponding dicing yield has been developed. An appropriate surface-roughness data acquisition methodology has also been developed. The maximum possible applied load and the minimum possible surface roughness are required to obtain the maximum effective contact area, and hence to achieve optimum yields (both mechanically and electrically). / Singapore-MIT Alliance (SMA)

Présentés pour la première fois en 1994, les transducteurs ultrasonores capacitifs micro- usinés, ou CMUTs (Capacitive Micromachined Ultrasonic Transducers), représentent une technologie alternative aux matériaux piézoélectriques pour la transduction électroacoustique. En particulier, leur souplesse de conception et leur haut degré de miniaturisation en font des candidats privilégiés pour le développement de sondes mixtes complexes alliant thérapie et imagerie par ultrasons. C’est dans ce contexte que s’est inscrit ce travail de thèse, dédié au développement d’une première sonde CMUT mixte. Le document débute par une présentation générale de la technologie et du contexte du projet. Puis, le développement est présenté, en commençant par les étapes préliminaires de modélisation numérique jusqu’aux caractérisations les plus avancées du prototype fabriqué. Les résultats démontrent l’intérêt de la technologie pour les applications visées. / Presented for the first time in 1994, capacitive micromachined ultrasonic transducers (CMUT) are a promising alternative to the piezoelectric technology for electroacoustic transduction. Particularly, their intrinsic design flexibility and miniaturization capability are strong advantages for the manufacturing of high-end Ultrasound-guided Focused Ultrasound (USgFUS) probes. The work presented in this Ph.D. dissertation is devoted to the f irst development of a USgFUS CMUT probe. After a general introduction of the CMUT technology and the context of this research project, the development is reported starting from the preliminary numerical studies to the most advanced characterizations of the fabricated device. The first results demonstrate the benefits of this technology for the targeted applications.

Recently there has been an increased focus on the use of microfluidics for the synthesis of different products. One of the products proposed for synthesis is quantum dots. Microfluidics often uses Polydimethylsiloxane for structure in microfluidic chips, but quantum dots use octadecene in several synthesis steps. The purpose of this work was to create a lab setup capable of anodically bonding 4” diameter wafers, and to characterize the bond formed using the Plaza test chip so that microfluidic devices using glass and silicon as substrates could be created. Two stainless steel electrodes placed on top of a hot plate were attached to a high power voltage supply to perform anodic bonding. A Plaza test mask was created and used to pattern P type silicon wafers. The channels etched were between 300 and 500nm deep and ranged between 1000µm and 50µm. These wafers were then anodically bonded to Corning 7740 glass wafers. Bonding stopped once the entire surface of the wafer was bonded, determined by visual inspection. All bonds were formed at 400°C and the bond strength and toughness between wafers bonded at 400V and 700V was compared. A beam model was used to predict the interfacial fracture toughness, and the stress at the bond was calculated with a parallel spring model. By measuring the crack length of the test structures under a light microscope the load conditions of the beam could be found. It was concluded that the electrostatic forces between the wafers give the best indication of what the bond quality will be. This was seen by the large difference in crack length between samples that were bonded using a thick glass wafer (1 mm) and a thin glass wafer (500µm). The observed crack lengths for the thick glass wafers were between 40 and 60µm. Thin glass wafers had a crack length between 20 and 40µm. The fracture toughness was calculated using the beam model approximation. Fracture toughness of the thin glass wafers was 7MPa m1/2, and of the thick glass wafers was 30 MPa m1/2. The fracture toughness of the thick glass wafers agreed with results found through the use of the double cantilever beam samples in literature. The maximum observed interfacial stress was 70 MPa. Finally, to measure the change in the size of the sodium depletion zone formed during bonding, samples were placed under a scanning electron microscope (SEM). Depletion zones were found to be between 1.1 and 1.4µm for thin glass samples that were bonded at 400 and 700 volts. This difference was not found to have a significant effect on the strength or fracture toughness observed. Thicker glass samples could not have their depletion zone measured due to SEM chuck size.

Eine grundlegende Schwierigkeit in der Röntgenoptik liegt in der Bereitstellung geeigneter Optiken. So ist aufgrund der schwachen Wechselwirkung der Röntgenstrahlung mit Materie der Einsatz brechender Optiken nicht sinnvoll, und es wird auf alternative Konzepte wie Röntgenwellenleiter zurückgegriffen. Röntgenwellenleiter sind nicht-dispersive strahlführende Optiken, welche die Kohärenz der Röntgenstrahlung filtern und als quasi-Punktquellen fungieren. Hierbei wird der Röntgenstrahl in einer oder zwei Dimensionen räumlich beschränkt, wobei der Wellenlängenbereich der Röntgenstrahlung eine Abmessung im sub-100 nm-Bereich erfordert. In der vorliegenden Arbeit wurde ein Verfahren etabliert, mit welchem die Herstellung von Wellenleiterkanälen im sub-50 nm-Bereich in Silizium gelingt. Die Prozessierung basiert hierbei auf einem Schema aus elektronenstrahllithographischer Belichtung, Reaktivem Ionenätzen und Wafer bonding. Das Verfahren ist variabel in Bezug auf verschiedene Wellenleitergeometrien, beispielsweise gekreuzte Wellenleiter und Kanalwellenleiter, ist auf alternative Materialien übertragbar, und erlaubt die Strahlführung auf in einer Dimension gekrümmten Pfaden. Die im Rahmen der vorliegenden Arbeit hergestellten Wellenleiter wurden erfolgreich an verschiedenen Synchrotron-Messplätzen eingesetzt und ihre Fernfelder charakterisiert, und der kohärente Wellenleiterstrahl wurde in der Röntgenmikroskopie und der holographischen Bildgebung eingesetzt. Es finden sich sowohl für die Quellgröße der Wellenleiter als auch für die Auflösung in der Bildgebung Werte im sub-50 nm-Bereich.

A Corner Cube Retro-reflector (CCR) is a device that can be used as transmitters in wireless free space optical communication systems, or remote sensing instruments. A novel approach to fabricate the CCR is developed, where almost 100% of the planar chip area acts as the CCR compared to the maximum of 33% in the prior MEMS CCRs. Unlike the conventional micro machined CCRs that have two planes (mirrors of the CCR) normal to the surface of the wafer, our approach yields all the mirrors within the bulk of the wafer, ensuring very high packing densities and wide acceptance angles. The crystallography of single crystal silicon wafer along with different micromachining and wafer bonding techniques are used to fabricate and assemble the CCR. The solid models of both the active and passive CCRs were built using Coventorware simulation software. In the active CCRs, one of the mirror was electrostatically actuated; this is simulated using the software. The results which show a three fold decrease in the pull-in voltage as compared to surface micromachined cantilevers with the same dimensions as presented. Fabrication of the passive CCR along with various fabrication and assembling processes used are discussed. Experimental results are presented and then discussed.