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An Automatable Workflow to Analyze and Secure Integrated Circuits Against Power Analysis AttacksPerera, Kevin 02 June 2017 (has links)
No description available.
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Voice and Image Encryption, and, Performance Analysis of Counter Mode Advanced Encryption Standard for WiMAXBasavarasu, Srinivasa R. January 2013 (has links)
No description available.
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Etude de la vulnérabilité des circuits cryptographiques l'injection de fautes par laser. / Study of the vulnerability of cryptographic circuits by laser fault injection.Mirbaha, Amir-Pasha 20 December 2011 (has links)
Les circuits cryptographiques peuvent etre victimes d'attaques en fautes visant leur implementation materielle. elles consistent a creer des fautes intentionnelles lors des calculs cryptographiques afin d'en deduire des informations confidentielles. dans le contexte de la caracterisation securitaire des circuits, nous avons ete amenes a nous interroger sur la faisabilite experimentale de certains modeles theoriques d'attaques. nous avons utilise un banc laser comme moyen d'injection de fautes.dans un premier temps, nous avons effectue des attaques en fautes dfa par laser sur un microcontroleur implementant un algorithme de cryptographie aes. nous avons reussi a exclure l'effet logique des fautes ne correspondants pas aux modeles d’attaque par un jeu precis sur l'instant et le lieu d'injection. en outre, nous avons identifie de nouvelles attaques dfa plus elargies.ensuite, nous avons etendu nos recherches a la decouverte et la mise en place de nouveaux modeles d'attaques en fautes. grace a la precision obtenue lors de nos premiers travaux, nous avons developpe ces nouvelles attaques de modification de rondes.en conclusion, les travaux precedents constituent un avertissement sur la faisabilite averee des attaques par laser decrites dans la litterature scientifique. nos essais ont temoigne de la faisabilite toujours actuelle de la mise en place des attaques mono-octets ou mono-bits avec un faisceau de laser qui rencontre plusieurs octets ; et egalement reveler de nouvelles possibilites d’attaque. cela nous a amenes a etudier des contre-mesures adaptees. / Cryptographic circuits may be victims of fault attacks on their hardware implementations. fault attacks consist of creating intentional faults during cryptographic calculations in order to infer secrets. in the context of security characterization of circuits, we have examined practical feasibility of some theoretical models of fault attacks. we used a laser bench as a means of the fault injection.at the beginning, we performed laser fault injections on a microcontroller implementing an aes cryptographic algorithm. we succeeded to exclude the logical effect of mismatched faults by temporal and spatial accuracy in fault injection. moreover, we identified extended new dfa attacks.then, we extended our research to identify and to implement new fault attack models. with the precision obtained in our earlier work, we developed new round modification analysis (rma) attacks.in conclusion, the experiments give a warning for the feasibility of described attacks in the literature by laser. our tests have demonstrated that single-byte or single-bit attacks are still feasible with a laser beam that hits additional bytes on the circuit when the laser emission is accurate and associated with other techniques. they also revealed new attack possibilities. therefore, it conducted us to study of appropriate countermeasures.
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Implementace symetrické blokové šifry AES na moderních procesorech / Implementation of symmetric bloc cipher AES in modern processorsŠkoda, Martin January 2014 (has links)
The main aim of master's thesis is usage of new instructions from instruction set called Intel® Advanced Encryption Standard New Instructions (AES-NI), which is available on processors with code name Westmere and newer. In theoretical part, there are described symmetric block ciphers and their operational modes. Cipher AES is described in details, especially used block transformations, key expansion and equivalent inverse cipher. Next topic is description of instructions of AES-NI instruction set – their function is explained using pseudo codes of instructions and there are examples of their usage in code. Further in work, dynamic-link library is created, which implements cipher AES with key sizes 128, 192 and 256 bites and implements operational modes described in theoretical part. Library functions are called from Matlab by scripts and their functionality is proved by checking test vectors values, which are provided in publications of National Institute of Standards and Technology.
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Analysis of Affine Equivalent Boolean Functions for CryptographyFuller, Joanne Elizabeth January 2003 (has links)
Boolean functions are an important area of study for cryptography. These functions, consisting merely of one's and zero's, are the heart of numerous cryptographic systems and their ability to provide secure communication. Boolean functions have application in a variety of such systems, including block ciphers, stream ciphers and hash functions. The continued study of Boolean functions for cryptography is therefore fundamental to the provision of secure communication in the future. This thesis presents an investigation into the analysis of Boolean functions and in particular, analysis of affine transformations with respect to both the design and application of Boolean functions for cryptography. Past research has often been limited by the difficulties arising from the magnitude of the search space. The research presented in this thesis will be shown to provide an important step towards overcoming such restrictions and hence forms the basis for a new analysis methodology. The new perspective allows a reduced view of the Boolean space in which all Boolean functions are grouped into connected equivalence classes so that only one function from each class need be established. This approach is a significant development in Boolean function research with many applications, including class distinguishing, class structures, self mapping analysis and finite field based s-box analysis. The thesis will begin with a brief overview of Boolean function theory; including an introduction to the main theme of the research, namely the affine transformation. This will be followed by the presentation of a fundamental new theorem describing the connectivity that exists between equivalence classes. The theorem of connectivity will form the foundation for the remainder of the research presented in this thesis. A discussion of efficient algorithms for the manipulation of Boolean functions will then be presented. The ability of Boolean function research to achieve new levels of analysis and understanding is centered on the availability of computer based programs that can perform various manipulations. The development and optimisation of efficient algorithms specifically for execution on a computer will be shown to have a considerable advantage compared to those constructed using a more traditional approach to algorithm optimisation. The theorem of connectivety will be shown to be fundamental in the provision many avenues of new analysis and application. These applications include the first non-exhaustive test for determining equivalent Boolean functions, a visual representation of the connected equivalence class structure to aid in the understanding of the Boolean space and a self mapping constant that enables enumeration of the functions in each equivalence class. A detailed survey of the classes with six inputs is also presented, providing valuable insight into their range and structure. This theme is then continued in the application Boolean function construction. Two important new methodologies are presented; the first to yield bent functions and the second to yield the best currently known balanced functions of eight inputs with respect to nonlinearity. The implementation of these constructions is extremely efficient. The first construction yields bent functions of a variety of algebraic order and inputs sizes. The second construction provides better results than previously proposed heuristic techniques. Each construction is then analysed with respect to its ability to produce functions from a variety of equivalence classes. Finally, in a further application of affine equivalence analysis, the impact to both s-box design and construction will be considered. The effect of linear redundancy in finite field based s-boxes will be examined and in particular it will be shown that the AES s-box possesses complete linear redundancy. The effect of such analysis will be discussed and an alternative construction to s-box design that ensures removal of all linear redundancy will be presented in addition to the best known example of such an s-box.
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Ανάλυση επιθέσεων πλαγίου καναλιού σε κρυπτοσύστημα AES με χρήση προσομοιωτή επεξεργαστήΚαλόγριας, Απόστολος 07 June 2010 (has links)
Ένας από τους πιο ευρέως γνωστούς αλγορίθμους κρυπτογράφησης είναι ο AES (Advanced Encryption Standard). Το πρότυπο κρυπτογράφησης AES περιγράφει μια διαδικασία κρυπτογράφησης ηλεκτρονικής πληροφορίας βασισμένη στην λογική της κωδικοποίησης ομάδων δεδομένων με κάποιο μυστικό κλειδί. Μέχρι τον Μάιο του 2009, οι μόνες επιτυχημένες δημοσιευμένες επιθέσεις ενάντια στο πρότυπο AES ήταν επιθέσεις πλάγιου-καναλιού σε συγκεκριμένες εφαρμογές. Η βασική ιδέα των επιθέσεων πλαγίου καναλιού είναι ότι κάποιος μπορεί να παρατηρήσει έναν αλγόριθμο ο οποίος εκτελείται σε ένα σύστημα επεξεργασίας και να εξάγει μερικές ή πλήρεις πληροφορίες για την κατάσταση του αλγορίθμου ή το κλειδί. Ένας συγκεκριμένος τύπος επιθέσεων πλάγιου καναλιού, cache επιθέσεις, βασίζεται στην παρακολούθηση της συμπεριφοράς της μνήμης cache των συστημάτων (την μετακίνηση των δεδομένων μέσα και έξω από την μνήμη cache). Σε αυτή την διπλωματική αναπτύχθηκε ένα πρόγραμμα κρυπτογράφησης/αποκρυπτογράφησης AES και μελετήθηκε η συμπεριφορά διάφορων μνημών cache μέσω ενός προσομοιωτή επεξεργαστή (Simplescalar) κατά την διάρκεια εκτέλεσής του. Σκοπός της διπλωματικής εργασίας ήταν να δείξουμε ότι το κρυπτοσύστημα AES είναι ευάλωτο σε επιθέσεις πλαγίου καναλιού κρυφής μνήμης. / AES (Advanced Encryption Standard) is one of the most popular cryptographic algorithms. AES describes a process of electronic data encryption based on encrypting data using a secret key. Up to May 2009, the only successful published attacks against AES were side-channel attacks. The main concept of side-channel attacks is that someone can observe an algorithm that is being implemented in a system and gain information about the state of the algorithm or the secret key. One particular type of side-channel attacks, cache-based attacks, is based on observing the behavior of the system’s cache memory (tha data that moves in and out of the cache memory). In this thesis an algorithm AES (encryption/decryption) was developed and we examined the behavior of different cache memories using a simulator (Simplescalar) while this algorithm was processing trying to figure out if AES is vulnerable to cache-based side channel attacks. This thesis shows if AES is vulnerable against cache-based side channel attacks.
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Design exploration of application specific instruction set cryptographic processors for resources constrained systems / Μελέτη και υλοποίηση επεξεργαστών ειδικού σκοπού (ASIP) για κρυπτογραφικές εφαρμογές σε συστήματα περιορισμένων πόρωνΤσεκούρα, Ιωάννα 01 November 2010 (has links)
The battery driven nature of wireless sensor networks, combined with the need of extended
lifetime mandates that energy efficiency is a metric with high priority. In the current thesis
we explore and compare the energy dissipation of di fferent processor architectures and how
it is associated with performance and area requirements. The processor architectures are
di erentiated based on the datapath length (16-bit, 32-bit, 64-bit and 128-bit) and the
corresponding size of the data memories. Our study focuses on AES algorithm, and the
indicated processor architectures support AES forward encryption, CCM (32/64/128),
CBC (32/64/128) and CTR common modes of operation. In each processor architecture
the instruction set is extended to increase the efficiency of the system. / -
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Estudo e implementação de ip-cores para Criptografia simétrica baseada no Advanced encryption standard (AES)Ramos Neto, Otacílio de Araújo 31 January 2013 (has links)
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Previous issue date: 2013-01-31 / Coordenação de Aperfeiçoamento de Pessoal de Nível Superior - CAPES / This work addresses data encryption using Rijndael symmetric key encryption algorithm , which is used in Advanced Encryption Standard - AES. AES has massively widespread in computing, communications, and broadcast media applications, due to its robustness. By intensively using of all flavors and sizes of devices and networks, the AES has become the standard at the time of implementation and deployment of these applications when the major requirement, in addition to performance, is security, i.e. virtually all of those applications nowadays. In systems equipped with modern processors, even those on small devices, it is common to find some that perform the encryption and decryption procedures in software. With the "explosive" spread of addition of security layers in almost everything that is processed inside and outside of the devices, even on systems equipped with powerful computing resources, the possibility of performing these layers on (small) additional hardware resources, developed with specific purpose, has become attractive. This dissertation presents a study of the theoretical foundations involving AES, some architectures and implementations based on it and documented in the recent technical and scientific literature, as well as the methodologies and requirements for the development of its hardware implementation, in particular, focusing on mobile systems, where performance has to be achieved in low power consumption and small area scenarios. Reference models have been developed and functionally validated in high-level languages for each hierarchical architectural level compiled from the mentioned study. As a proof of concept, this work consisted in undertaking a project of an intellectual property of digital integrated circuit core (IP core) for the encryption/decryption procedures of AES, starting from the pseudocode level of the algorithms and going to the level of a digital integrated circuit core. Among the solutions studied from recent literature, modules and operations that could be replicated and/or reused were identified. A microarchitecture for the full AES was implemented hierarchically to the core level with standard cells placed and routed. The work also offers three implementation options for the block identified as the most complex: the S-Box. Results of performance and area were then presented and compared with those of literature. / Este trabalho aborda a criptografia de dados com chave simétrica com uso do algoritmo de criptografia Rijndael, que é utilizado no Advanced Encryption Standard - AES. Devido a sua robustez, tem se tornado massivamente difundido em aplicações computacionais, comunicação e de difusão de media. Abrangendo todos os tamanhos e sabores de dispositivos de rede, o AES tem sido o padrão na hora da implementação e disponibilização dessas aplicações quando o requisito principal, além do desempenho, é a segurança, ou seja, praticamente todas as aplicações digitais nos dias de hoje. Em sistemas de processamento dotados dos modernos processadores, mesmo os de pequeno porte, é comum encontrar sistemas que executam os procedimentos de criptografia e decriptografia em software. Com a proliferação "explosiva" da adição de camadas de segurança em quase tudo que é processado dentro e fora dos dispositivos, mesmo em sistemas dotados de poderosos recursos computacionais, tem se tornado atrativa a possibilidade de executar essas camadas em (pequenos) recursos adicionais de hardware, desenvolvidos com finalidade específica. Nesta dissertação, foram estudados os fundamentos teóricos, envolvendo o AES, arquiteturas e implementações documentadas na literatura técnica e científica recente, bem como as metodologias e requisitos específicos para fins de desenvolvimento de sua implementação em hardware, focando, em especial, os sistemas móveis, onde desempenho tem que ser conseguido com baixo consumo de energia e pouca área. Foram desenvolvidos e validados funcionalmente modelos de referência em linguagem de alto nível para cada nível de hierarquia arquitetural compilado do referido estudo. Como prova de conceito, este trabalho consistiu em realizar o projeto de uma propriedade intelectual de núcleo de circuito integrado IP-core, digital para realização dos procedimentos de criptografia/decriptografia do AES, partindo do nível do pseudocódigo dos algoritmos até o nível de um núcleo (core) de circuito integrado digital. Das soluções estudadas na literatura recente, foram identificados módulos e operações passíveis de serem replicadas/reusadas. Uma microarquitetura para o AES completo foi implementada hierarquicamente até o nível de núcleo com standard cells posicionado e roteado, contemplando ainda 3 opções de implementação para o bloco reconhecidamente o mais complexo: o S-Box. Resultados de desempenho e área foram apresentados e comparados.
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Alternative Polynomials for Rijndael : Diffusion AnalysisNoroozi, Hamid January 2014 (has links)
The Rijndael cryptosystem uses a particular polynomial to create its constants. All calculations within the encryption and decryption layers are based on this polynomial. This arouse the curiosity to see what happens if the polynomial is substituted by other polynomials. This paper’s main area of study is to investigate the consequences of using different polynomials to construct the Rijndael cryptosystem. To do so, as a phase of this study, a Mathematica package has been created to ease the investigations. As the second phase, using the aforementioned package, some kind of diffusion analysis has been done on the newly constructed Rijndael-like cryptosystems. The fundamental challenge was to figure out the reason of having the particular polynomial chosen. By the end of the experiment, we concluded that choosing other polynomials with the same characteristics as an ingredient of the Rijndael algorithm, does not have any perceptible effects on the diffusion level.
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Rijndael Circuit Level CryptanalysisPehlivanoglu, Serdar 05 May 2005 (has links)
The Rijndael cipher was chosen as the Advanced Encryption Standard (AES) in August 1999. Its internal structure exhibits unusual properties such as a clean and simple algebraic description for the S-box. In this research, we construct a scalable family of ciphers which behave very much like the original Rijndael. This approach gives us the opportunity to use computational complexity theory. In the main result, we generate a candidate one-way function family from the scalable Rijndael family. We note that, although reduction to one-way functions is a common theme in the theory of public-key cryptography, it is rare to have such a defense of security in the private-key theatre.
In this thesis a plan of attack is introduced at the circuit level whose aim is not break the cryptosystem in any practical way, but simply to break the very bold Rijndael security claim. To achieve this goal, we are led to a formal understanding of the Rijndael security claim, juxtaposing it with rigorous security treatments. Several of the questions that arise in this regard are as follows: ``Do invertible functions represented by circuits with very small numbers of gates have better than worst case implementations for their inverses?' ``How many plaintext/ciphertext pairs are needed to uniquely determine the Rijndael key?'
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