Being one of the most significant styles in the architectural avant-garde,  constructivism  introduced  to  the  world  of architecture  a  dozen  principles  that  remain  relevant  and progressive to this day. The  architectural  functionalism  and  purity,  lacking  any disturbances, undertakes Le Corbusier principles and works for the “poetry of a simple form and a philosophy of rationalism”. This way constructivism sets the rules for the internal planning, making this architectural style light and open-like, penetrated by daylight. Trends in contemporary architecture often echo the principles that the constructivists worked on. In terms of lighting design this means on one hand, there is a significant potential for today's architects to benefit from the deeper understanding of daylight planning approaches in constructivist buildings and on the other hand there is an opportunity to update the solutions in the design of artificial lighting. The project aims at identifying the possible lighting design program for these kinds of spaces. From pointing out the key factors to consider, through the analysis of a specific constructivist building, the set of solutions was developed with intention  to  apply  them  in  any  environment  designed  with  the same  principles  as  well  as  to  compliment  constructivism  in renovation projects.

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Chu Hon San, Calvin. / "Architecture Department, Chinese University of Hong Kong, Master of Architecture Programme 2010-2011, design report." / Includes bibliographical references (p. 99). / Statement --- p.2 / Context --- p.3 / Chapter 1.0 --- Background --- p.4 / Chapter 1.1 --- Ageing Population in Hong Kong / Chapter 1.1.1 --- Proportion of order person in each district / Chapter 1.1.2 --- Living arrangement of Elderly --- p.5 / Chapter 1.1.3 --- Housing Type of Elderly Living / Chapter 2.0 --- ARGUMENT --- p.6 / Chapter 2.1 --- Definition of the social space / Chapter 2.2 --- Tower-podium type housing development in HK --- p.8 / Chapter 2.3 --- Ate there enough social spaces in private housing especially for elderly? --- p.9 / Chapter 3.0 --- CASE STUDY --- p.10 / Chapter 3.1 --- Case Study: List of Comparison / Chapter 3.2 --- Case Study 1: Jolly Place L&O Architects --- p.12 / Chapter 3.2.1 --- Form / Chapter 3.2.2 --- Circulation --- p.13 / Chapter 3.2.3 --- Transparency of living unit --- p.14 / Chapter 3.2.4 --- Programmatic study --- p.15 / Chapter 3.2.5 --- Elderly need --- p.16 / Chapter 3.3 --- Case Study 2: Spittelhof Housing Peter Zumthor --- p.18 / Chapter 3.3.1 --- Form / Chapter 3.3.2 --- Circulation --- p.20 / Chapter 3.3.3 --- Transparency --- p.21 / Chapter 3.3.4 --- Elderly need --- p.22 / Chapter 3.4 --- Case Study 2: Residential Home for the Elderly Peter Zumthor --- p.24 / Chapter 3.4.1 --- Form / Chapter 3.4.2 --- Circulation --- p.25 / Chapter 3.4.3 --- Transparency --- p.26 / Chapter 3.4.4 --- Materiality --- p.28 / Chapter 3.5 --- Case Study 3: Stadtcarre ASIRarchitekten --- p.29 / Chapter 3.5.1 --- Form / Chapter 3.5.2 --- Transparency --- p.31 / Chapter 3.5.3 --- Circulation --- p.32 / Chapter 3.5.4 --- Elderly need --- p.33 / Chapter 4.0 --- SITE SELECTION --- p.34 / Chapter 4.1 --- Site Sslection: Diamond Hill in Wong Tai Sin / Chapter 4.1.1 --- Characteristics of the site / Chapter 4.1.2 --- Site study: History of Tai Horn Village --- p.37 / Chapter 4.1.3 --- Site study: Zoning --- p.38 / Chapter 4.1.4 --- Site study: Circulation --- p.39 / Chapter 4.2 --- Study on sewage treatment facilities --- p.40 / Chapter 5.0 --- DESIGN PROCESS --- p.42 / Chapter 5.1 --- Define the developer and the user / Chapter 5.2 --- Concept of'Infinity' --- p.43 / Chapter 5.3 --- Urban concept: Integrate with the surrounding --- p.44 / Chapter 5.4 --- Socially integrated housing - Defining the family --- p.47 / Chapter 5.4.1 --- Elderly only and Elderly in a family / Chapter 5.4.2 --- Non-elderly / Chapter 5.5 --- An appropriate proportion in a socially integrated housing - Living with elderly --- p.52 / Chapter 5.6 --- Socially integrated housing - Step down concept --- p.53 / Chapter 5.7 --- Socially integrated housing - Social space in the housing --- p.54 / Chapter 5.8 --- Socially integrated housing - Orientation --- p.67 / Chapter 5.9 --- Socially integrated housing - Natural Ventilation --- p.70 / Chapter 5.10 --- Plans & Section --- p.71 / Chapter 5.11 --- Model Photos --- p.90 / Reference --- p.99

As inovações tecnológicas têm propiciado transformações nas formas de interação e, principalmente, na comunicação entre as pessoas. Os avanços nas áreas de tecnologia da informação e comunicações abriram novos horizontes para a criação de demandas até então não existentes. Nesse contexto, a utilização de vídeo digital de alta definição para aplicações de tempo real ganha ênfase. Entretanto, os desafios envolvidos na manipulação da quantidade de informações necessárias à sua representação, fomentam pesquisas na indústria e na academia para minimizar os impactos sobre a largura de banda necessária para transmissão e/ou no espaço para o seu armazenamento. Para enfrentar esses problemas diversos padrões de compressão de vídeo têm sido desenvolvidos sendo que, nesse aspecto, o padrão H.264/AVC é considerado o estado da arte. O padrão H.264/AVC introduz ganhos significativos na taxa de compressão, em relação a seus antecessores, porém esses ganhos vêem acompanhados pelo aumento na complexidade computacional das ferramentas aplicadas como, por exemplo, a Codificação Aritmética Binária Adaptativa ao Contexto (CABAC). A complexidade computacional relacionado ao padrão H.264/AVC é tal que torna impraticável sua execução em software (para operar em um processador de propósito geral, ao menos para nos disponíveis atuais) com a finalidade de realizar a codificação ou decodificação em tempo real para sequências de vídeo de alta definição. Esta dissertação apresenta uma arquitetura de hardware para o processo de decodificação do CABAC, conforme especificação do padrão H.264/AVC. Tendo o objetivo de contribuir para a resolução de alguns dos problemas relacionados à tarefa de decodificação de vídeo de alta definição em tempo real. Para isso, apresenta-se uma introdução sobre conceitos fundamentais da compressão de dados e vídeo digital, além da discussão sobre as principais características do padrão H.264/AVC. O conjunto de algoritmos presentes no CABAC e o fluxo de decodificação do CABAC são descritos em detalhes. Para fundamentar as decisões de projeto um vasto conjunto de experimentos foi realizado para analisar o comportamento do bitstream durante o processo de decodificação do CABAC. A arquitetura de hardware proposta e desenvolvida é apresentada em detalhes, tendo seu desempenho comparado com outras propostas encontradas na literatura. Os resultados obtidos mostram que a arquitetura desenvolvida é eficaz em seu objetivo, pois atinge a capacidade de processamento de vídeos em alta definição (HD1080p) em tempo real. Além disso, os experimentos realizados deram origem a observações inovadoras, que permitiram determinar os pontos chave para minimizar os gargalos inerentes ao conjunto de algoritmos que compõe o CABAC. / The technological innovations of recent decades have brought changes in the forms of human interaction especially in communication area. Advances in the areas of information technology and communications opened new horizons for creating demands non-existent so far. In this scenario the high-definition digital video for real-time applications has gained emphasis for this context. However, the challenges involved in handling the amount of information necessary for its representation, promoting research in industry and academia to minimize the impact on the bandwidth needed for transmission and / or the space for the storage. To address those problems several video compression standards have been developed and the H.264/AVC standard is the state-of-the-art. The H.264/AVC standard introduces significant gains in compression rate, compared to its predecessors. These gains are obtained by an increase in computational complexity of the techniques used, such as the CABAC. The computational requirements of H.264/AVC standard is so strong that make its implementation impractical in software (to operate on a general purpose processor) for the purpose of performing encoding or decoding in real time for high-definition video sequences. This dissertation presents a new CABAD architecture with the implementation in hardware intended to solve the problems related to the task of decoding high-definition video in real time. An introduction to fundamental concepts of data compression and digital video is presented, in addition to discussing the main features of the H.264/AVC standard. The set of algorithms the CABAC and of the CABAD decode flow are described in detail. A wide number of experiments were conducted to identify the static and dynamic behavior of the bitstream to support the design decisions. At the end the developed architecture is examined and compared with other proposals found in literature. The results show that the architecture developed is effective in its purpose to handle high-definition video (HD1080p) in real time. Furthermore, the experiments have led to innovative observations to determine the key points to minimize the bottlenecks inherent in the set of algorithms that make the CABAD.

As inovações tecnológicas têm propiciado transformações nas formas de interação e, principalmente, na comunicação entre as pessoas. Os avanços nas áreas de tecnologia da informação e comunicações abriram novos horizontes para a criação de demandas até então não existentes. Nesse contexto, a utilização de vídeo digital de alta definição para aplicações de tempo real ganha ênfase. Entretanto, os desafios envolvidos na manipulação da quantidade de informações necessárias à sua representação, fomentam pesquisas na indústria e na academia para minimizar os impactos sobre a largura de banda necessária para transmissão e/ou no espaço para o seu armazenamento. Para enfrentar esses problemas diversos padrões de compressão de vídeo têm sido desenvolvidos sendo que, nesse aspecto, o padrão H.264/AVC é considerado o estado da arte. O padrão H.264/AVC introduz ganhos significativos na taxa de compressão, em relação a seus antecessores, porém esses ganhos vêem acompanhados pelo aumento na complexidade computacional das ferramentas aplicadas como, por exemplo, a Codificação Aritmética Binária Adaptativa ao Contexto (CABAC). A complexidade computacional relacionado ao padrão H.264/AVC é tal que torna impraticável sua execução em software (para operar em um processador de propósito geral, ao menos para nos disponíveis atuais) com a finalidade de realizar a codificação ou decodificação em tempo real para sequências de vídeo de alta definição. Esta dissertação apresenta uma arquitetura de hardware para o processo de decodificação do CABAC, conforme especificação do padrão H.264/AVC. Tendo o objetivo de contribuir para a resolução de alguns dos problemas relacionados à tarefa de decodificação de vídeo de alta definição em tempo real. Para isso, apresenta-se uma introdução sobre conceitos fundamentais da compressão de dados e vídeo digital, além da discussão sobre as principais características do padrão H.264/AVC. O conjunto de algoritmos presentes no CABAC e o fluxo de decodificação do CABAC são descritos em detalhes. Para fundamentar as decisões de projeto um vasto conjunto de experimentos foi realizado para analisar o comportamento do bitstream durante o processo de decodificação do CABAC. A arquitetura de hardware proposta e desenvolvida é apresentada em detalhes, tendo seu desempenho comparado com outras propostas encontradas na literatura. Os resultados obtidos mostram que a arquitetura desenvolvida é eficaz em seu objetivo, pois atinge a capacidade de processamento de vídeos em alta definição (HD1080p) em tempo real. Além disso, os experimentos realizados deram origem a observações inovadoras, que permitiram determinar os pontos chave para minimizar os gargalos inerentes ao conjunto de algoritmos que compõe o CABAC. / The technological innovations of recent decades have brought changes in the forms of human interaction especially in communication area. Advances in the areas of information technology and communications opened new horizons for creating demands non-existent so far. In this scenario the high-definition digital video for real-time applications has gained emphasis for this context. However, the challenges involved in handling the amount of information necessary for its representation, promoting research in industry and academia to minimize the impact on the bandwidth needed for transmission and / or the space for the storage. To address those problems several video compression standards have been developed and the H.264/AVC standard is the state-of-the-art. The H.264/AVC standard introduces significant gains in compression rate, compared to its predecessors. These gains are obtained by an increase in computational complexity of the techniques used, such as the CABAC. The computational requirements of H.264/AVC standard is so strong that make its implementation impractical in software (to operate on a general purpose processor) for the purpose of performing encoding or decoding in real time for high-definition video sequences. This dissertation presents a new CABAD architecture with the implementation in hardware intended to solve the problems related to the task of decoding high-definition video in real time. An introduction to fundamental concepts of data compression and digital video is presented, in addition to discussing the main features of the H.264/AVC standard. The set of algorithms the CABAC and of the CABAD decode flow are described in detail. A wide number of experiments were conducted to identify the static and dynamic behavior of the bitstream to support the design decisions. At the end the developed architecture is examined and compared with other proposals found in literature. The results show that the architecture developed is effective in its purpose to handle high-definition video (HD1080p) in real time. Furthermore, the experiments have led to innovative observations to determine the key points to minimize the bottlenecks inherent in the set of algorithms that make the CABAD.

As inovações tecnológicas têm propiciado transformações nas formas de interação e, principalmente, na comunicação entre as pessoas. Os avanços nas áreas de tecnologia da informação e comunicações abriram novos horizontes para a criação de demandas até então não existentes. Nesse contexto, a utilização de vídeo digital de alta definição para aplicações de tempo real ganha ênfase. Entretanto, os desafios envolvidos na manipulação da quantidade de informações necessárias à sua representação, fomentam pesquisas na indústria e na academia para minimizar os impactos sobre a largura de banda necessária para transmissão e/ou no espaço para o seu armazenamento. Para enfrentar esses problemas diversos padrões de compressão de vídeo têm sido desenvolvidos sendo que, nesse aspecto, o padrão H.264/AVC é considerado o estado da arte. O padrão H.264/AVC introduz ganhos significativos na taxa de compressão, em relação a seus antecessores, porém esses ganhos vêem acompanhados pelo aumento na complexidade computacional das ferramentas aplicadas como, por exemplo, a Codificação Aritmética Binária Adaptativa ao Contexto (CABAC). A complexidade computacional relacionado ao padrão H.264/AVC é tal que torna impraticável sua execução em software (para operar em um processador de propósito geral, ao menos para nos disponíveis atuais) com a finalidade de realizar a codificação ou decodificação em tempo real para sequências de vídeo de alta definição. Esta dissertação apresenta uma arquitetura de hardware para o processo de decodificação do CABAC, conforme especificação do padrão H.264/AVC. Tendo o objetivo de contribuir para a resolução de alguns dos problemas relacionados à tarefa de decodificação de vídeo de alta definição em tempo real. Para isso, apresenta-se uma introdução sobre conceitos fundamentais da compressão de dados e vídeo digital, além da discussão sobre as principais características do padrão H.264/AVC. O conjunto de algoritmos presentes no CABAC e o fluxo de decodificação do CABAC são descritos em detalhes. Para fundamentar as decisões de projeto um vasto conjunto de experimentos foi realizado para analisar o comportamento do bitstream durante o processo de decodificação do CABAC. A arquitetura de hardware proposta e desenvolvida é apresentada em detalhes, tendo seu desempenho comparado com outras propostas encontradas na literatura. Os resultados obtidos mostram que a arquitetura desenvolvida é eficaz em seu objetivo, pois atinge a capacidade de processamento de vídeos em alta definição (HD1080p) em tempo real. Além disso, os experimentos realizados deram origem a observações inovadoras, que permitiram determinar os pontos chave para minimizar os gargalos inerentes ao conjunto de algoritmos que compõe o CABAC. / The technological innovations of recent decades have brought changes in the forms of human interaction especially in communication area. Advances in the areas of information technology and communications opened new horizons for creating demands non-existent so far. In this scenario the high-definition digital video for real-time applications has gained emphasis for this context. However, the challenges involved in handling the amount of information necessary for its representation, promoting research in industry and academia to minimize the impact on the bandwidth needed for transmission and / or the space for the storage. To address those problems several video compression standards have been developed and the H.264/AVC standard is the state-of-the-art. The H.264/AVC standard introduces significant gains in compression rate, compared to its predecessors. These gains are obtained by an increase in computational complexity of the techniques used, such as the CABAC. The computational requirements of H.264/AVC standard is so strong that make its implementation impractical in software (to operate on a general purpose processor) for the purpose of performing encoding or decoding in real time for high-definition video sequences. This dissertation presents a new CABAD architecture with the implementation in hardware intended to solve the problems related to the task of decoding high-definition video in real time. An introduction to fundamental concepts of data compression and digital video is presented, in addition to discussing the main features of the H.264/AVC standard. The set of algorithms the CABAC and of the CABAD decode flow are described in detail. A wide number of experiments were conducted to identify the static and dynamic behavior of the bitstream to support the design decisions. At the end the developed architecture is examined and compared with other proposals found in literature. The results show that the architecture developed is effective in its purpose to handle high-definition video (HD1080p) in real time. Furthermore, the experiments have led to innovative observations to determine the key points to minimize the bottlenecks inherent in the set of algorithms that make the CABAD.

In humanity’s current condition, the advantages of organic material sources are supplanted by the qualities of synthetics that allow for rapid growth and altered capabilities, whilst man becomes further removed from his natural existence as a being that once possessed the aptitude to understand and work with these materials. Prior to our industrial, mechanised and materialist consumer culture, the direct interaction with the natural world provided humanity with more comprehensive and experiential ground for growth and learning. As we are connected to the world through our senses, space becomes the primary enabler of such a platform. Relying on the haptic qualities of materials and the body’s ability to experience and embody its immediate surroundings, architecture’s role in the integration between man, nature, and industry is explored. As a natural industry with a significant public interface, architecture acts as a mediator between man’s “constructed nature” and his “first nature” – referring to man’s estrangement from his environment. This dissertation investigates the adaptation of industrial buildings to accommodate public interaction whilst responding to the environmental impact that the production of building materials has on the environment. Alternatives to commonly used materials such as glass, steel and carbon fibres were researched, and so hemp, flax and bamboo became the primary elements used in the making of the architecture. / Dissertation MArch(Prof)--University of Pretoria, 2013. / Architecture / MArch(Prof) / Unrestricted

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This qualitative research investigates how educators in Hanoi, Vietnam, perceive and utilize place-based approaches in teaching green buildings (TGBs) to deliver education for sustainable development (ESD) lessons. The study involved twelve middle school teachers from five green schools. The interview was the primary data collection of this research. After conducting interviews with participants, thematic analysis was employed to identify five key themes: (1) benefits, (2)limitations, (3) suggestions, (4) planning with TGBs, and (5) teaching activities with place-based education (PBE). The findings revealed that TGBs’ design patterns support their teaching and serve as a tool to foster a stronger connection with nature and the environment, ultimately enhancing pro-sustainable elements in ESD. However, these instructors encounter significant challenges rooted in the Vietnamese cultural context and a lack of support from the school. Teachers can implement some place-based teaching principles into their lessons, but to maximize the teaching potential of TGBs, they must place greater emphasis on the role of place within TGBs and encourage students to be more mindful when learning with TGBs.

By projecting observed microseismic data backward in time to when fracturing occurred, it is possible to locate the fracture events in space, assuming a correct velocity model. In order to achieve this task in near real-time, a robust computational system to handle backward propagation, or Reverse Time Migration (RTM), is required. We can then test many different velocity models for each run of the RTM. We investigate the use of a Graphics Processing Unit (GPU) based system using Compute Unified Device Architecture for C (CUDA-C) as the programming language. Our preliminary results show a large improvement in run-time over conventional programming methods based on conventional Central Processing Unit (CPU) computing with Fortran. Considerable room for improvement still remains. / text