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Estudo sobre distribuição de cargas em semicondutores sujeitos a radiação ionizante / Study of charge distribution in semiconductors subject to ionizing radiationAguirre, Fernando Rodrigues 14 February 2017 (has links)
Os efeitos da radiação ionizante em dispositivos eletrônicos é uma preocupação crescente na tecnologia de semicondutores, especialmente devido à contínua redução dos dispositivos e ainda maior, quando são destinados para uso em ambientes agressivos com alta radiação, tais como missões espaciais, aceleradores de partículas ou reatores nucleares. Dentre os vários efeitos causados pela radiação ionizante em dispositivos eletrônicos está aquele devido à Dose Acumulada (Total Ionizing Dose - TID), o qual a acumulação de danos de radiação no dispositivo muda seu funcionamento normal. O TID causado por fótons em transístores já foi estudado no Brasil, mas o efeito de prótons num transistor bipolar, apresentado neste trabalho é um trabalho pioneiro no país. As curvas características de um transistor 2N3733 foram medidas antes, durante e após a irradiação de prótons entre 1,5 e 3,8 MeV, para quantificar as alterações das especificações elétricas do dispositivo. Nestas energias, há uma correlação direta entre a mudança na resposta elétrica e a energia do próton, exceto em algumas energias específicas, onde o pico de Bragg ocorreu perto das junções ou no meio do cristal de silício, demonstrando a importância da correta caracterização da camada de passivação em estudos de TID em dispositivos eletrônicos. A recuperação dos transistores irradiados após o recozimento a 50°C durante 8 horas também foi maior para aqueles irradiados nessas energias. Existe um limite superior de dose para o qual não foi observada alteração significativa do transistor. Este limite, da ordem de Grad, excede a maioria das aplicações em ambientes terrestres, mas está dentro do intervalo esperado para missões espaciais a Júpiter ou em grandes aceleradores de partículas. / The effect of ionizing radiation on electronic devices is a growing concern in semiconductor technology, especially due to the continuous reduction of the devices and even greater when they are intended for use in aggressive environments with high radiation, such as space missions, particle accelerators or nuclear reactors. Among the various effects caused by ionizing radiation on electronic devices are the effects due to Total Ionizing Dose (TID), in which the accumulation of radiation damage in the device changes its normal functioning. The TID caused by photons has already been studied in Brazil, but the effect of protons on a bipolar transistor, presented in this work is a pioneer work in the country. The characteristic curves of a 2N3733 transistor were measured before, during and after proton irradiation between 1.5 and 3.8 MeV, to quantify changes of the electrical specifications of the device. At these proton energies, there is a direct correlation between the change in the electric response to the proton energy, except at some specific energies where the Bragg peak occurred near the junctions or in the middle of the silicon crystal, demonstrating the importance of the correct characterization of the passivation layer in TID studies of electronic devices. The recovery of transistors irradiated after annealing at 50 ° C for 8 hours was also higher for those irradiated at these energies. There is an upper dose limit for which no alteration of the transistor was observed. This limit, of the order of Grad, exceeds most applications in terrestrial environments, but is within the expected range for space missions to Jupiter or large particle accelerators.
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Low-Frequency Noise in Si-Based High-Speed Bipolar TransistorsSandén, Martin January 2001 (has links)
No description available.
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Chemical Vapor Depositionof Si and SiGe Films for High-Speed Bipolar TransistorsPejnefors, Johan January 2001 (has links)
This thesis deals with the main aspects in chemical vapordeposition (CVD) of silicon (Si) and silicon-germanium (Si1-xGex) films for high-speed bipolar transistors.In situdoping of polycrystalline silicon (poly-Si)using phosphine (PH3) and disilane (Si2H6) in a low-pressure CVD reactor was investigated toestablish a poly-Si emitter fabrication process. The growthkinetics and P incorporation was studied for amorphous Si filmgrowth. Hydrogen (H) incorporated in the as-deposited films wasrelated to growth kinetics and the energy for H2desorption was extracted. Film properties such asresistivity, mobility, carrier concentration and grain growthwere studied after crystallization using either furnaceannealing or rapid thermal annealing (RTA). In order tointegrate an epitaxial base, non-selective epitaxial growth(NSEG) of Si and SiGe in a lamp-heated single-waferreduced-pressure CVD reactor was examined. The growth kineticsfor Si epitaxy and poly-Si deposition showed a differentdependence on the deposition conditions i.e. temperature andpressure. The growth rate difference was mainly due to growthkinetics rather than wafer surface emissivity effects. However,it was observed that the growth rate for Si epitaxy and poly-Sideposition was varying during growth and the time-dependencewas attributed to wafer surface emissivity variations. A modelto describe the emissivity effects was established, taking intoconsideration kinetics and the reactor heating mechanisms suchas heat absorption, emission andconduction. Growth ratevariations in opening of different sizes (local loading) andfor different oxide surface coverage (global loading) wereinvestigated. No local loading effects were observed, whileglobal loading effects were attributed to chemical as well astemperature effects. Finally, misfit dislocations formed in theSiGe epitaxy during NSEG were found to originate from theinterface between the epitaxial and polycrystalline regions.The dislocations tended to propagate across the activearea. <b>Keywords:</b>chemical vapor deposition (CVD), bipolarjunction transistor (BJT), heterojunction bipolar transistor(HBT), silicon-germanium (SiGe), epitaxy, poly-Si emitter,in situdoping, non-selective epitaxy (NSEG), loadingeffect, emissivity effect
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Low-Frequency Noise in Si-Based High-Speed Bipolar TransistorsSandén, Martin January 2001 (has links)
No description available.
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Chemical Vapor Depositionof Si and SiGe Films for High-Speed Bipolar TransistorsPejnefors, Johan January 2001 (has links)
<p>This thesis deals with the main aspects in chemical vapordeposition (CVD) of silicon (Si) and silicon-germanium (Si<sub>1-x</sub>Ge<sub>x</sub>) films for high-speed bipolar transistors.<i>In situ</i>doping of polycrystalline silicon (poly-Si)using phosphine (PH<sub>3</sub>) and disilane (Si<sub>2</sub>H<sub>6</sub>) in a low-pressure CVD reactor was investigated toestablish a poly-Si emitter fabrication process. The growthkinetics and P incorporation was studied for amorphous Si filmgrowth. Hydrogen (H) incorporated in the as-deposited films wasrelated to growth kinetics and the energy for H<sub>2</sub>desorption was extracted. Film properties such asresistivity, mobility, carrier concentration and grain growthwere studied after crystallization using either furnaceannealing or rapid thermal annealing (RTA). In order tointegrate an epitaxial base, non-selective epitaxial growth(NSEG) of Si and SiGe in a lamp-heated single-waferreduced-pressure CVD reactor was examined. The growth kineticsfor Si epitaxy and poly-Si deposition showed a differentdependence on the deposition conditions i.e. temperature andpressure. The growth rate difference was mainly due to growthkinetics rather than wafer surface emissivity effects. However,it was observed that the growth rate for Si epitaxy and poly-Sideposition was varying during growth and the time-dependencewas attributed to wafer surface emissivity variations. A modelto describe the emissivity effects was established, taking intoconsideration kinetics and the reactor heating mechanisms suchas heat absorption, emission andconduction. Growth ratevariations in opening of different sizes (local loading) andfor different oxide surface coverage (global loading) wereinvestigated. No local loading effects were observed, whileglobal loading effects were attributed to chemical as well astemperature effects. Finally, misfit dislocations formed in theSiGe epitaxy during NSEG were found to originate from theinterface between the epitaxial and polycrystalline regions.The dislocations tended to propagate across the activearea.</p><p><b>Keywords:</b>chemical vapor deposition (CVD), bipolarjunction transistor (BJT), heterojunction bipolar transistor(HBT), silicon-germanium (SiGe), epitaxy, poly-Si emitter,<i>in situ</i>doping, non-selective epitaxy (NSEG), loadingeffect, emissivity effect</p>
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Estudo sobre distribuição de cargas em semicondutores sujeitos a radiação ionizante / Study of charge distribution in semiconductors subject to ionizing radiationFernando Rodrigues Aguirre 14 February 2017 (has links)
Os efeitos da radiação ionizante em dispositivos eletrônicos é uma preocupação crescente na tecnologia de semicondutores, especialmente devido à contínua redução dos dispositivos e ainda maior, quando são destinados para uso em ambientes agressivos com alta radiação, tais como missões espaciais, aceleradores de partículas ou reatores nucleares. Dentre os vários efeitos causados pela radiação ionizante em dispositivos eletrônicos está aquele devido à Dose Acumulada (Total Ionizing Dose - TID), o qual a acumulação de danos de radiação no dispositivo muda seu funcionamento normal. O TID causado por fótons em transístores já foi estudado no Brasil, mas o efeito de prótons num transistor bipolar, apresentado neste trabalho é um trabalho pioneiro no país. As curvas características de um transistor 2N3733 foram medidas antes, durante e após a irradiação de prótons entre 1,5 e 3,8 MeV, para quantificar as alterações das especificações elétricas do dispositivo. Nestas energias, há uma correlação direta entre a mudança na resposta elétrica e a energia do próton, exceto em algumas energias específicas, onde o pico de Bragg ocorreu perto das junções ou no meio do cristal de silício, demonstrando a importância da correta caracterização da camada de passivação em estudos de TID em dispositivos eletrônicos. A recuperação dos transistores irradiados após o recozimento a 50°C durante 8 horas também foi maior para aqueles irradiados nessas energias. Existe um limite superior de dose para o qual não foi observada alteração significativa do transistor. Este limite, da ordem de Grad, excede a maioria das aplicações em ambientes terrestres, mas está dentro do intervalo esperado para missões espaciais a Júpiter ou em grandes aceleradores de partículas. / The effect of ionizing radiation on electronic devices is a growing concern in semiconductor technology, especially due to the continuous reduction of the devices and even greater when they are intended for use in aggressive environments with high radiation, such as space missions, particle accelerators or nuclear reactors. Among the various effects caused by ionizing radiation on electronic devices are the effects due to Total Ionizing Dose (TID), in which the accumulation of radiation damage in the device changes its normal functioning. The TID caused by photons has already been studied in Brazil, but the effect of protons on a bipolar transistor, presented in this work is a pioneer work in the country. The characteristic curves of a 2N3733 transistor were measured before, during and after proton irradiation between 1.5 and 3.8 MeV, to quantify changes of the electrical specifications of the device. At these proton energies, there is a direct correlation between the change in the electric response to the proton energy, except at some specific energies where the Bragg peak occurred near the junctions or in the middle of the silicon crystal, demonstrating the importance of the correct characterization of the passivation layer in TID studies of electronic devices. The recovery of transistors irradiated after annealing at 50 ° C for 8 hours was also higher for those irradiated at these energies. There is an upper dose limit for which no alteration of the transistor was observed. This limit, of the order of Grad, exceeds most applications in terrestrial environments, but is within the expected range for space missions to Jupiter or large particle accelerators.
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Einsatz von Siliziumkarbid-Bipolartransistoren in Antriebsstromrichtern zur VerlustreduktionBarth, Henry 06 April 2022 (has links)
Stand der Technik sind IGBTs und Freilaufdioden aus Silizium (Si). Jahrzehntelange Forschung hat zu einer nahezu perfekten Technologie geführt. Jedoch werden die Fortschritte hinsichtlich der Reduzierung von Schalt- und Durchlassverlusten mit jeder neuen Generation von Si-IGBTs immer kleiner. Die anfallende Verlustleistung kann jedoch signifikant mit Leistungshalbleiter-Bauelementen aus Siliziumkarbid (SiC) und Galliumnitrid (GaN) gesenkt werden.
Ziel dieser Arbeit ist es, zu untersuchen, ob und inwieweit mit diskreten SiC-Bipolartransistoren im TO-247- und SiC-Schottky-Dioden im TO-220-Gehäuse der Wirkungsgrad eines Antriebsstromrichters gesteigert werden kann.
Ein Exkurs in die Siliziumkarbid-Halbleitertechnologie am Anfang soll deren Vorteile in Hinblick auf verlustärmere Leistungselektronik aufzeigen. Die Vorteile des Halbleitermaterials Siliziumkarbid werden anhand des SiC-Bipolartransistors im Vergleich zum ersten Leistungstransistor - dem Bipolartransistor aus Silizium - herausgearbeitet.
Beim SiC-Bipolartransistor muss im laststromführenden Zustand ein Steuerstrom in die Basis eingeprägt werden. Damit erhöht sich der Treiberaufwand. Deshalb wird der erste Themenschwerpunkt auf den Treiber gelegt. In dieser Arbeit wurden ein einfacher und ein komplexer Treiber aufgebaut und evaluiert. Mit leichten Modifikationen wurden mit dem komplexeren Treiber auch IGBTs und SiC-MOSFETs für Vergleichsmessungen angesteuert.
Ein neuer Ansatz zur Reduzierung der Treiberverlustleistung im Wechselrichter mit SiC-Bipolar-Transistoren wird vorgestellt. Er setzt beim Kommutierungsalgorithmus des Wechselrichters an.
Ein wesentlicher Teil der Arbeit widmet sich der Charakterisierung des SiC-Bipolartransistors, insbesondere dem Schaltverhalten. Ein- und Ausschaltwärmen für verschiedene Arbeitspunkte werden ermittelt.
Am Ende der Arbeit werden experimentelle Untersuchungen an einem SiC-Wechselrichter durchgeführt. Abschließend werden die Potenziale, die mit dem Einsatz von SiC-Bipolartransistoren verbunden sind, bewertet aber auch die Grenzen aufgezeigt.:1 Einleitung 1
2 Aufbau des SiC-Bipolartransistors
2.1 Siliziumkarbid (SiC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1.1 Eigenschaften von monokristallinem Siliziumkarbid . . . . . . . . . . 5
2.1.2 Herstellung des SiC-Wafers . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1.3 Herstellung des SiC-Bipolartransistors . . . . . . . . . . . . . . . . . . 10
2.1.4 Defekte im Siliziumkarbidkristall . . . . . . . . . . . . . . . . . . . . 11
2.2 Halbleiterphysikalische Grundlagen . . . . . . . . . . . . . . . . . . . . . . . 12
2.2.1 Gesperrter pn-Übergang . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2.2 Stromführender pn-Übergang . . . . . . . . . . . . . . . . . . . . . . . 15
2.3 Bipolartransistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.3.1 Aufbau und Funktionsprinzip . . . . . . . . . . . . . . . . . . . . . . . 17
2.3.2 Sperrfähigkeit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.3.3 Erster und zweiter Durchbruch . . . . . . . . . . . . . . . . . . . . . . 23
2.3.4 Stromverstärkung . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2.3.5 Ladungsträgermodulation . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.3.6 Eindimensionaler spezifischer Widerstand der Driftzone . . . . . . . . 30
3 Ansteuerung des SiC-Bipolartransistors
3.1 Einführung Treiber . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.2 Herausforderungen beim Ansteuern von SiC-Bipolartransistoren . . . . . . . . 34
3.3 Treiberkonzepte für SiC-Bipolartransistoren . . . . . . . . . . . . . . . . . . . 36
3.4 Konventioneller Treiber . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
3.5 3-Level-Treiber . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.6 Treiber für SiC-MOSFET und IGBT . . . . . . . . . . . . . . . . . . . . . . . 45
4 Reduzierung der Treiberverluste durch Einschrittkommutierung
4.1 Einschrittkommutierung . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
4.2 Stromvorzeichenerkennung . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
4.3 Berechnung der Verlustleistungen für den eingeschalteten Zustand des SiC- Bipolartransistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
4.4 Messung der Treiberverlustleistung . . . . . . . . . . . . . . . . . . . . . . . . 52
5 Charakterisierung des SiC-Bipolartransistors
5.1 Messaufbau für Untersuchung des Ein- und Ausschaltverhaltens . . . . . . . . 55
5.2 Doppelpulsverfahren . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
5.3 Definition der Schaltzeiten und Schaltverlustleistung . . . . . . . . . . . . . . 57
5.4 Messung der Schaltwärme . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
5.4.1 Spannungstastköpfe . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
5.4.2 Stromsensoren . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
5.4.3 Zeitliche Verschiebung der Messsignale . . . . . . . . . . . . . . . . . 62
5.4.4 Vergleich von konventionellem und 3-Level-Treiber . . . . . . . . . . . 65
5.4.5 Vergleich bei unterschiedlicher Treiberspannung . . . . . . . . . . . . 66
5.4.6 Vergleich bei halb und voll bestückter Halbbrücke . . . . . . . . . . . . 68
5.4.7 Vergleich von SiC-Bipolartransistor mit SiC-MOSFET und Si-IGBT . . 69
5.4.8 Reduzierung der Spannungsspitze beim Ausschalten . . . . . . . . . . 74
5.5 Simulation des Schaltverhaltens eines SiC-Bipolartransistors . . . . . . . . . . 79
5.5.1 Schaltverhalten bei Ansteuerung mit unipolarem Treiber . . . . . . . . 79
5.5.2 Simulation des Einfluss der Emitter-Induktivität auf Schaltwärme . . . 81
5.5.3 Vergleich von Simulation und Messung . . . . . . . . . . . . . . . . . 82
5.6 Durchlassverlustleistung . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
6 Einsatz von SiC-Bipolartransistoren im Wechselrichter
6.1 Aufbau der Wechselrichter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
6.2 Inbetriebnahme des Wechselrichters . . . . . . . . . . . . . . . . . . . . . . . 89
6.3 Überspannungen an den Motorklemmen der 1 kW-Asynchronmaschine . . . . 91
6.4 Umbau des SiC-Wechselrichters . . . . . . . . . . . . . . . . . . . . . . . . . 93
6.5 Spannungsspitzen in der Ansteuerspannung . . . . . . . . . . . . . . . . . . . 94
6.6 Halbbrückenverluste im Leerlauf . . . . . . . . . . . . . . . . . . . . . . . . . 98
7 Zusammenfassung und Fazit 101
Literaturverzeichnis 104
A Anhang
A.1 Netzliste für SiC-Bipolartransistor FSICBH057A120 . . . . . . . . . . . . . . 113
A.2 Leiterplatten für Doppelpuls-Test und SiC-Wechselrichter . . . . . . . . . . . . 114
A.3 Herleitung des Feldverlaufs in der Driftzone des gesperrten pn-Übergangs . . . 116
A.4 Herleitung des Emitterwirkungsgrads . . . . . . . . . . . . . . . . . . . . . . . 119
A.5 Herleitung des spezifischen Widerstands der Driftzone . . . . . . . . . . . . . 121
A.6 Lebenslauf von Henry Barth . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
A.6.1 Persönliche Angaben . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
A.6.2 Wissenschaftlicher Werdegang . . . . . . . . . . . . . . . . . . . . . . 124 / State-of-the-art are IGBTs and free-wheeling diodes made of silicon (Si). Decades of research have led to an almost perfect technology. Nevertheless, progress in terms of reduction of switching and forward conducting losses becomes smaller and smaller with each new generation of Si IGBTs. The resulting power dissipation, however, can be significantly reduced with power semiconductor devices made of silicon carbide (SiC) and gallium nitride (GaN).
The objective of this work is to investigate whether and to what extent discrete SiC bipolar junction transistors (BJT) in TO-247 and SiC Schottky diodes in TO-220 packages can be used to increase the efficiency of a power drive inverter.
At the beginning, a digression into silicon carbide semiconductor technology is intended to show its advantages in terms of lower-loss power electronics. The advantages of the semiconductor material silicon carbide are illustrated by the SiC bipolar junction transistor in comparison with the first power transistor - the silicon bipolar junction transistor.
For the on-state of SiC bipolar junction transistors, a continuous current must be injected into the base. This increases the driving effort. Therefore, the first topic focuses on the driver. In this work, a simple and a complex driver were built and evaluated. With slight modifications, the more complex driver was also used to drive IGBTs and SiC-MOSFETs for comparative measurements.
A new approach to reduce driver power dissipation in the inverter when using SiC bipolar junction transistors is presented. It focuses on the commutation algorithm of the inverter.
A significant part of the work is devoted to the characterization of the SiC bipolar junction transistor, especially the switching behavior. Turn-on and turn-off switching losses for different operating points are determined.
At the end of the work, experimental investigations are performed on a SiC inverter. Finally, the potentials associated with the use of SiC bipolar junction transistors are evaluated but also the limitations are shown.:1 Einleitung 1
2 Aufbau des SiC-Bipolartransistors
2.1 Siliziumkarbid (SiC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1.1 Eigenschaften von monokristallinem Siliziumkarbid . . . . . . . . . . 5
2.1.2 Herstellung des SiC-Wafers . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1.3 Herstellung des SiC-Bipolartransistors . . . . . . . . . . . . . . . . . . 10
2.1.4 Defekte im Siliziumkarbidkristall . . . . . . . . . . . . . . . . . . . . 11
2.2 Halbleiterphysikalische Grundlagen . . . . . . . . . . . . . . . . . . . . . . . 12
2.2.1 Gesperrter pn-Übergang . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2.2 Stromführender pn-Übergang . . . . . . . . . . . . . . . . . . . . . . . 15
2.3 Bipolartransistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.3.1 Aufbau und Funktionsprinzip . . . . . . . . . . . . . . . . . . . . . . . 17
2.3.2 Sperrfähigkeit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.3.3 Erster und zweiter Durchbruch . . . . . . . . . . . . . . . . . . . . . . 23
2.3.4 Stromverstärkung . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2.3.5 Ladungsträgermodulation . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.3.6 Eindimensionaler spezifischer Widerstand der Driftzone . . . . . . . . 30
3 Ansteuerung des SiC-Bipolartransistors
3.1 Einführung Treiber . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.2 Herausforderungen beim Ansteuern von SiC-Bipolartransistoren . . . . . . . . 34
3.3 Treiberkonzepte für SiC-Bipolartransistoren . . . . . . . . . . . . . . . . . . . 36
3.4 Konventioneller Treiber . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
3.5 3-Level-Treiber . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.6 Treiber für SiC-MOSFET und IGBT . . . . . . . . . . . . . . . . . . . . . . . 45
4 Reduzierung der Treiberverluste durch Einschrittkommutierung
4.1 Einschrittkommutierung . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
4.2 Stromvorzeichenerkennung . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
4.3 Berechnung der Verlustleistungen für den eingeschalteten Zustand des SiC- Bipolartransistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
4.4 Messung der Treiberverlustleistung . . . . . . . . . . . . . . . . . . . . . . . . 52
5 Charakterisierung des SiC-Bipolartransistors
5.1 Messaufbau für Untersuchung des Ein- und Ausschaltverhaltens . . . . . . . . 55
5.2 Doppelpulsverfahren . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
5.3 Definition der Schaltzeiten und Schaltverlustleistung . . . . . . . . . . . . . . 57
5.4 Messung der Schaltwärme . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
5.4.1 Spannungstastköpfe . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
5.4.2 Stromsensoren . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
5.4.3 Zeitliche Verschiebung der Messsignale . . . . . . . . . . . . . . . . . 62
5.4.4 Vergleich von konventionellem und 3-Level-Treiber . . . . . . . . . . . 65
5.4.5 Vergleich bei unterschiedlicher Treiberspannung . . . . . . . . . . . . 66
5.4.6 Vergleich bei halb und voll bestückter Halbbrücke . . . . . . . . . . . . 68
5.4.7 Vergleich von SiC-Bipolartransistor mit SiC-MOSFET und Si-IGBT . . 69
5.4.8 Reduzierung der Spannungsspitze beim Ausschalten . . . . . . . . . . 74
5.5 Simulation des Schaltverhaltens eines SiC-Bipolartransistors . . . . . . . . . . 79
5.5.1 Schaltverhalten bei Ansteuerung mit unipolarem Treiber . . . . . . . . 79
5.5.2 Simulation des Einfluss der Emitter-Induktivität auf Schaltwärme . . . 81
5.5.3 Vergleich von Simulation und Messung . . . . . . . . . . . . . . . . . 82
5.6 Durchlassverlustleistung . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
6 Einsatz von SiC-Bipolartransistoren im Wechselrichter
6.1 Aufbau der Wechselrichter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
6.2 Inbetriebnahme des Wechselrichters . . . . . . . . . . . . . . . . . . . . . . . 89
6.3 Überspannungen an den Motorklemmen der 1 kW-Asynchronmaschine . . . . 91
6.4 Umbau des SiC-Wechselrichters . . . . . . . . . . . . . . . . . . . . . . . . . 93
6.5 Spannungsspitzen in der Ansteuerspannung . . . . . . . . . . . . . . . . . . . 94
6.6 Halbbrückenverluste im Leerlauf . . . . . . . . . . . . . . . . . . . . . . . . . 98
7 Zusammenfassung und Fazit 101
Literaturverzeichnis 104
A Anhang
A.1 Netzliste für SiC-Bipolartransistor FSICBH057A120 . . . . . . . . . . . . . . 113
A.2 Leiterplatten für Doppelpuls-Test und SiC-Wechselrichter . . . . . . . . . . . . 114
A.3 Herleitung des Feldverlaufs in der Driftzone des gesperrten pn-Übergangs . . . 116
A.4 Herleitung des Emitterwirkungsgrads . . . . . . . . . . . . . . . . . . . . . . . 119
A.5 Herleitung des spezifischen Widerstands der Driftzone . . . . . . . . . . . . . 121
A.6 Lebenslauf von Henry Barth . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
A.6.1 Persönliche Angaben . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
A.6.2 Wissenschaftlicher Werdegang . . . . . . . . . . . . . . . . . . . . . . 124
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SiC Readout IC for High Temperature Seismic Sensor SystemTian, Ye January 2017 (has links)
Over the last decade, electronics operating at high temperatures have been increasingly demanded to support in situ sensing applications such as automotive, deep-well drilling and aerospace. However, few of these applications have requirements above 460 °C, as the surface temperature of Venus, which is a specific target for the seismic sensing application in this thesis. Due to its wide bandgap, Silicon Carbide (SiC) is a promising candidate to implement integrated circuits (ICs) operating in such extreme environments. In this thesis, various analog and mixed-signal ICs in 4H-SiC bipolar technology for high-temperature sensing applications are explored, in which the device performance variation over temperatures are considered. For this purpose, device modeling, circuit design, layout design, and device/circuit characterization are involved. In this thesis, the circuits are fabricated in two batches using similar technologies. In Batch 1, the first SiC sigma-delta modulator is demonstrated to operate up to 500 °C with a 30 dB peak SNDR. Its building blocks including a fully-differential amplifier, an integrator and a comparator are characterized individually to investigate the modulator performance variation over temperatures. In the succeeding Batch 2, a SiC electromechanical sigma-delta modulator is designed with a chosen Si capacitive sensor for seismic sensing on Venus. Its building blocks including a charge amplifier, a multiplier and an oscillator are designed. Compared to Batch 1, a smaller transistor and two metal-interconnects are used to implement higher integration ICs in Batch 2. Moreover, the first VBIC-based compact model featured with continuous-temperature scalability from 27 to 500 °C is developed based on the SiC transistor in Batch 1, in order to optimize the design of circuits in Batch 2. The demonstrated performance of ICs in Batch 1 show the feasibility to further develop the SiC readout ICs for seismic sensor system operating on Venus. / <p>QC 20170911</p>
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Modelling the temperature dependences of Silicon Carbide BJTsFernández S., Alejandro D. January 2016 (has links)
Silicon Carbide (SiC), owing to its large bandgap, has proved itself to be a very viable semiconductor material for the development of extreme temperature electronics. Moreover, its electrical properties like critical field (Ecrit) and saturation velocity (vsat) are superior as compared to the commercially abundant Silicon, thus making it a better alternative for RF and high power applications. The in-house SiC BJT process at KTH has matured a lot over the years and recently developed devices and circuits have shown to work at temperatures exceeding 500˚C. However, the functional reliability of more complex circuits requires the use of simulators and device models to describe the behavior of constituent devices. SPICE Gummel Poon (SGP) is one such model that describes the behavior of the BJT devices. It is simpler as compared to the other models because of its relatively small number of parameters. A simple semi-empirical DC compact model has been successfully developed for low voltage applications SiC BJTs. The model is based on a temperature dependent SiC-SGP model. Studies over the temperature dependences for the SGP parameters have been performed. The SGP parameters have been extracted and some have been optimized over a wide temperature range and they have been compared with the measured data. The accuracy of the developed compact model based on these parameters has been proven by comparing it with the measured data as well. A fairly accurate performance at the required working conditions and correlation with the measured results of the SiC compact model has been achieved.
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High-Temperature Analog and Mixed-Signal Integrated Circuits in Bipolar Silicon Carbide TechnologyHedayati, Raheleh January 2017 (has links)
Silicon carbide (SiC) integrated circuits (ICs) can enable the emergence of robust and reliable systems, including data acquisition and on-site control for extreme environments with high temperature and high radiation such as deep earth drilling, space and aviation, electric and hybrid vehicles, and combustion engines. In particular, SiC ICs provide significant benefit by reducing power dissipation and leakage current at temperatures above 300 °C compared to the Si counterpart. In fact, Si-based ICs have a limited maximum operating temperature which is around 300 °C for silicon on insulator (SOI). Owing to its superior material properties such as wide bandgap, three times larger than Silicon, and low intrinsic carrier concentration, SiC is an excellent candidate for high-temperature applications. In this thesis, analog and mixed-signal circuits have been implemented using SiC bipolar technology, including bandgap references, amplifiers, a master-slave comparator, an 8-bit R-2R ladder-based digital-to-analog converter (DAC), a 4-bit flash analog-to-digital converter (ADC), and a 10-bit successive-approximation-register (SAR) ADC. Spice models were developed at binned temperature points from room temperature to 500 °C, to simulate and predict the circuits’ behavior with temperature variation. The high-temperature performance of the fabricated chips has been investigated and verified over a wide temperature range from 25 °C to 500 °C. A stable gain of 39 dB was measured in the temperature range from 25 °C up to 500 °C for the inverting operational amplifier with ideal closed-loop gain of 40 dB. Although the circuit design in an immature SiC bipolar technology is challenging due to the low current gain of the transistors and lack of complete AC models, various circuit techniques have been applied to mitigate these problems. This thesis details the challenges faced and methods employed for device modeling, integrated circuit design, layout implementation and finally performance verification using on-wafer characterization of the fabricated SiC ICs over a wide temperature range. / <p>QC 20170905</p>
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