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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
21

A Fast Settling Oversampled Digital Sliding-Mode Controller for DC-DC Buck Converters

January 2013 (has links)
abstract: Sliding-Mode Control (SMC) has several benefits over traditional Proportional-Integral-Differential (PID) control in terms of fast transient response, robustness to parameter and component variations, and low sensitivity to loop disturbances. An All-Digital Sliding-Mode (ADSM) controlled DC-DC converter, utilizing single-bit oversampled frequency domain digitizers is proposed. In the proposed approach, feedback and reference digitizing Analog-to-Digital Converters (ADC) are based on a single-bit, first order Sigma-Delta frequency to digital converter, running at 32MHz over-sampling rate. The ADSM regulator achieves 1% settling time in less than 5uSec for a load variation of 600mA. The sliding-mode controller utilizes a high-bandwidth hysteretic differentiator and an integrator to perform the sliding control law in digital domain. The proposed approach overcomes the steady state error (or DC offset), and limits the switching frequency range, which are the two common problems associated with sliding-mode controllers. The IC is designed and fabricated on a 0.35um CMOS process occupying an active area of 2.72mm-squared. Measured peak efficiency is 83%. / Dissertation/Thesis / Ph.D. Electrical Engineering 2013
22

H-Bridge Converter Modeling and Simulations for a Battery Power Management System

Niknam, Nastaran 23 August 2016 (has links)
No description available.
23

LED driver se synchronním usměrněním / LED driver with synchronous rectification

Hodáňová, Adéla January 2019 (has links)
The main goal of this diploma thesis is to compare two circuits designed for LED powering with output current of units of Amperes. Both circuits are based on step-down converter topology, one with technology of synchronous rectifying and the other one without it. Calculations and selection of used components with real prototypes were made for both selected circuits. All selected components meet automotive qualification requirements for discrete products. Produced prototypes were compared in terms of functionality, efficiency, EMC and thermal radiation.
24

Improved Accuracy Area Efficient Hybrid CMOS/GaN DC-DC Buck Converterfor High Step-Down Ratio Applications

January 2019 (has links)
abstract: Point of Load (POL) DC-DC converters are increasingly used in space applications, data centres, electric vehicles, portable computers and devices and medical electronics. Heavy computing and processing capabilities of the modern devices have ushered the use of higher battery supply voltage to increase power storage. The need to address this consumer experience driven requirement has propelled the evolution of the next generation of small form-factor power converters which can operate with higher step down ratios while supplying heavy continuous load currents without sacrificing efficiency. Constant On-Time (COT) converter topology is capable of achieving stable operation at high conversion ratio with minimum off-chip components and small silicon area. This work proposes a Constant On-Time buck dc-dc converter for a wide dynamic input range and load currents from 100mA to 10A. Accuracy of this ripple based converter is improved by a unique voltage positioning technique which modulates the reference voltage to lower the average ripple profile close to the nominal output. Adaptive On-time block features a transient enhancement scheme to assist in faster voltage droop recovery when the output voltage dips below a defined threshold. UtilizingGallium Nitride (GaN) power switches enable the proposed converter to achieve very high efficiency while using smaller size inductor-capacitor (LC) power-stage. Use of novel Superjunction devices with higher drain-source blocking voltage simplifies the complex driver design and enables faster frequency of operation. It allows 1.8VComplementary Metal-Oxide Semiconductor (CMOS) devices to effectively drive GaNpower FETs which require 5V gate signal swing. The presented controller circuit uses internal ripple generation which reduces reliance on output cap equivalent series resistance (ESR) for loop stability and facilitates ripples reduction at the output. The ripple generation network is designed to provide ai optimally stable performance while maintaining load regulation and line regulation accuracy withing specified margin. The chip with ts external Power FET package is proposed to be integrated on a printed circuit board for testing. The designed power converter is expected to operate under 200 MRad of a total ionising dose of radiation enabling it to function within large hadron collider at CERN and space satellite and probe missions. / Dissertation/Thesis / Masters Thesis Electrical Engineering 2019
25

Analysis and implementation of a synchronous buck converter used as an intermediate stage of an HID ballast

Vernyuk, Sergey V. January 2004 (has links)
No description available.
26

Output Impedance in PWM Buck Converter

Cazzell, Gregory A. 27 July 2009 (has links)
No description available.
27

High-Frequency Modeling and Analyses for Buck and Multiphase Buck Converters

Qiu, Yang 07 December 2005 (has links)
Future microprocessor poses many challenges to its dedicated power supplies, the voltage regulators (VRs), such as the low voltage, high current, fast load transient, etc. For the VR designs using multiphase buck converters, one of the results from these stringent challenges is a large amount of output capacitors, which is undesired from both a cost and a motherboard real estate perspective. In order to save the output capacitors, the control-loop bandwidth must be increased. However, the bandwidth is limited in the practical design. The influence from the switching frequency on the control-loop bandwidth has not been identified, and the influence from multiphase is not clear, either. Since the widely-used average model eliminates the inherent switching functions, it is not able to predict the converter's high-frequency performance. In this dissertation, the primary objectives are to develop the methodology of high-frequency modeling for the buck and multiphase buck converters, and to analyze their high-frequency characteristics. First, the nonlinearity of the pulse-width modulator (PWM) scheme is identified. Because of the sampling characteristic, the sideband components are generated at the output of the PWM comparator. Using the assumption that the sideband components are well attenuated by the low-pass filters in the converter, the conventional average model only includes the perturbation-frequency components. When studying the high-frequency performance, the sideband frequency is not sufficiently high as compared with the perturbation one; therefore, the assumption for the average model is not good any more. Under this condition, the converter response cannot be reflected by the average model. Furthermore, with a closed loop, the generated sideband components at the output voltage appear at the input of the PWM comparator, and then generate the perturbation-frequency components at the output. This causes the sideband effect to happen. The perturbation-frequency components and the sideband components are then coupled through the comparator. To be able to predict the converter's high-frequency performance, it is necessary to have a model that reflects the sampling characteristic of the PWM comparator. As the basis of further research, the existing high-frequency modeling approaches are reviewed. Among them, the harmonic balance approach predicts the high-frequency performance but it is too complicated to utilize. However, it is promising when simplified in the applications with buck and multiphase buck converters. Once the nonlinearity of the PWM comparator is identified, a simple model can be obtained because the rest of the converter system is a linear function. With the Fourier analysis, the relationship between the perturbation-frequency components and the sideband components are derived for the trailing-edge PWM comparator. The concept of multi-frequency modeling is developed based on a single-phase voltage-mode-controlled buck converter. The system stability and transient performance depend on the loop gain that is affected by the sideband component. Based on the multi-frequency model, it is mathematically indicated that the result from the sideband effect is the reduction of magnitude and phase characteristics of the loop gain. With a higher bandwidth, there are more magnitude and phase reductions, which, therefore, cause the sideband effect to pose limitations when pushing the bandwidth. The proposed model is then applied to the multiphase buck converter. For voltage-mode control, the multiphase technique has the potential to cancel the sideband effect around the switching frequency. Therefore, theoretically the control-loop bandwidth can be pushed higher than the single-phase design. However, in practical designs, there is still magnitude and phase reductions around the switching frequency in the measured loop gain. Using the multi-frequency model, it is clearly pointed out that the sideband effect cannot be fully cancelled with unsymmetrical phases, which results in additional reduction of the phase margin, especially for the high-bandwidth design. Therefore, one should be extremely careful to push the bandwidth when depending on the interleaving to cancel the sideband effect. The multiphase buck converter with peak-current control is also investigated. Because of the current loop in each individual phase, there is the sideband effect that cannot be canceled with the interleaving technique. For higher bandwidths and better transient performances, two schemes are presented to reduce the influence from the current loop: the external ramps are inserted in the modulators, and the inductor currents are coupled, either through feedback control or by the coupled-inductor structure. A bandwidth around one-third of the switching frequency is achieved with the coupled-inductor buck converter, which makes it a promising circuit for the VR applications. As a conclusion, the feedback loop results in the sideband effect, which limits the bandwidth and is not included in the average model. With the proposed multi-frequency model, the high-frequency performance for the buck and multiphase buck converters can be accurately predicted. / Ph. D.
28

Design and development of a 200 W converter for phosphoric acid fuel cells

Kuyula, Christian Kinsala 03 1900 (has links)
M. Tech. (Engineering: Electrical, Department Electronic Engineering, Faculty of Engineering and Technology), Vaal University of Technology, / “If we think oil is a problem now, just wait 20 years. It’ll be a nightmare.” — Jeremy Rifkin, Foundation of Economic Trends, Washington, D.C., August 2003. This statement harmonises with the reality that human civilisation faces today. As a result, humankind has been forced to look for alternatives to fossil fuels. Among possible solutions, fuel cell (FC) technology has received a lot of attention because of its potential to generate clean energy. Fuel cells have the advantage that they can be used in remote telecommunication sites with no grid connectivity as the majority of telecommunication equipment operates from a DC voltage supply. Power plants based on phosphoric acid fuel cell (PAFC) have been installed worldwide supplying urban areas, shopping centres and medical facilities with electricity, heat and hot water. Although these are facts regarding large scale power plants for on-site use, portable units have been explored as well. Like any other fuel cell, the PAFC output power is highly unregulated leading to a drastic drop in the output voltage with changing load value. Therefore, various DC–DC converter topologies with a wide range of input voltages can be used to regulate the fuel cell voltage to a required DC load. An interleaved synchronous buck converter intended for efficiently stepping down the energy generated by a PAFC was designed and developed. The design is based on the National Semiconductor LM5119 IC. A LM5119 evaluation board was redesigned to meet the requirements for the application. The measurements were performed and it was found that the converter achieved the expectations. The results showed that the converter efficiently stepped down a wide range of input voltages (22 to 46 V) to a regulated 13.8 V while achieving a 93 percent efficiency. The conclusions reached and recommendations for future research are presented. / Telkom Centre of Excellence, TFMC, M-Tech, THRIP.
29

Buck Converter Design Issues

Rahman, Muhammad Saad January 2007 (has links)
<p>Switch Mode Power Supplies are very important components in present day electronics and have continued to thrive and grow over the past 25 years. This thesis looks inside how the SMPS have evolved over the passage of years with special emphasis to the Synchronous Buck Converter. It also discusses why there is a strong potential to further the study related to designs based around a Synchronous Buck Converter for portable applications. The main objective of the thesis is to look into the controller design for minimizing size, enhancing efficiency and reliability of power converters in portable electronic equipment such as mobile phones and PDAs. The thesis aims to achieve this using a 90 nm process with an input voltage of 1.55V and an output of 1V with a power dissipation of 200mW.</p>
30

Buck Converter Design Issues

Rahman, Muhammad Saad January 2007 (has links)
Switch Mode Power Supplies are very important components in present day electronics and have continued to thrive and grow over the past 25 years. This thesis looks inside how the SMPS have evolved over the passage of years with special emphasis to the Synchronous Buck Converter. It also discusses why there is a strong potential to further the study related to designs based around a Synchronous Buck Converter for portable applications. The main objective of the thesis is to look into the controller design for minimizing size, enhancing efficiency and reliability of power converters in portable electronic equipment such as mobile phones and PDAs. The thesis aims to achieve this using a 90 nm process with an input voltage of 1.55V and an output of 1V with a power dissipation of 200mW.

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