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The aim of my master’s thesis is the design and implementation of laboratory power supply with output parameters 0-25V and 0-2A and options to manage this resource by elements of the front panel or via a computer control program. Content is the theoretical analysis of the possibility of subsequent theoretical sources suggesting that it verified on the prototype laboratory resources.

abstract: Power management integrated circuit (PMIC) design is a key module in almost all electronics around us such as Phones, Tablets, Computers, Laptop, Electric vehicles, etc. The on-chip loads such as microprocessors cores, memories, Analog/RF, etc. requires multiple supply voltage domains. Providing these supply voltages from off-chip voltage regulators will increase the overall system cost and limits the performance due to the board and package parasitics. Therefore, an on-chip fully integrated voltage regulator (FIVR) is required. The dissertation presents a topology for a fully integrated power stage in a DC-DC buck converter achieving a high-power density and a time-domain hysteresis based highly integrated buck converter. A multi-phase time-domain comparator is proposed in this work for implementing the hysteresis control, thereby achieving a process scaling friendly highly digital design. A higher-order LC notch filter along with a flying capacitor which couples the input and output voltage ripple is implemented. The power stage operates at 500 MHz and can deliver a maximum power of 1.0 W and load current of 1.67 A, while occupying 1.21 mm2 active die area. Thus achieving a power density of 0.867 W/mm2 and current density of 1.377 A/mm2. The peak efficiency obtained is 71% at 780 mA of load current. The power stage with the additional off-chip LC is utilized to design a highly integrated current mode hysteretic buck converter operating at 180 MHz. It achieves 20 ns of settling and 2-5 ns of rise/fall time for reference tracking. The second part of the dissertation discusses an integrated low voltage switched-capacitor based power sensor, to measure the output power of a DC-DC boost converter. This approach results in a lower complexity, area, power consumption, and a lower component count for the overall PV MPPT system. Designed in a 180 nm CMOS process, the circuit can operate with a supply voltage of 1.8 V. It achieves a power sense accuracy of 7.6%, occupies a die area of 0.0519 mm2, and consumes 0.748 mW of power. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2019

Photovoltaic panels are widely used to harvest solar energy. In the general application the panels are connected to an inverter that allows the power to be feed to the grid. The possibility to emulate a photovoltaic panel in a laboratory environment simplifies the development of inverters. Existing solutions are either expensive or not performing good enough. This thesis presents a real-time model that has fast enough transient response to be used with the future’s solar panel inverters. The solution is based on an interleaved synchronous buck converter with an analogue current control loop. A micro-controller is utilizing a look up table to steer the power stage to mimic the output of a real panel. The content of the look up table can be exchanged to emulate an arbitrary photovoltaic panel in different environmental conditions. The emulator output is stable in the load case with a typical inverter connected to it. It is oscillating with a limited amplitude under open circuit. A hardware implementation of the system confirms the functionality. The current controller can correct a load step in 20 μs. The output switching ripple is below 1 mA. / Fotovoltaiska paneler är ett väl etablerat sätt att ta tillvara på solenergi. Den vanligaste tillämpningen är att panelerna är anslutna till en växelriktare för att möjliggöra att energin matas ut på elnätet. Att kunna emulera en solcellspanel i laboratoriemiljö förenklar utvecklingen av växelriktare. Befintliga system är antingen dyra eller presterar inte bra nog. Denna avhandling presenterar en realtidsmodell som kan hantera transienta förlopp tillräckligt snabbt för att kunna användas med framtidens solpanelsväxelriktare. Lösningen är baserad på en tvåfas synkron buck-omvandlare med en analog strömreglering. En mikroprocessor använder uppslagstabell för att styra effektsteget till att efterlikna utsignalen från en verklig panel. Innehållet i uppslagstabellen kan bytas ut för att emulera en godtycklig solpanel i olika driftsförhållanden. Emulatorns utsignal är stabil med en typisk växelriktare ansluten som last. Utsignalen svänger med en begränsad amplitud under öppen krets. Experimentiella tester bekräftar funktionen. Strömregleringen kan korrigera ett belastningssteg inom 20 μs. Utgångens strömrippel är under 1 mA.

Due to the power requirements for today's microprocessors, point of load converter packaging is becoming an important issue.   Traditional thermal management techniques involved in removing heat from a printed circuit board are being tested as today's technologies require small footprint and volume from all electrical systems.  While heat sinks are traditionally used to spread heat, ceramic substrates are gaining in popularity for their superior thermal qualities which can dissipate heat without the use of a heat sink.  3D integration techniques are needed to realize a solution that incorporates the active and components together.  The objective of this research is to explore the packaging of a high current, high power density, high frequency DC/DC converter using ceramic substrates to create a low profile converter to meet the needs of current technologies. One issue with current converters is the large volume of the passive components.  Increasing the switching frequency to the megahertz range is one way to reduce to volume of these components.  The other way is to fundamentally change the way these inductors are designed.  This work will explore the use of low temperature co-fired ceramic (LTCC) tapes in the magnetic design to allow a low profile planar inductor to be used as a substrate.  LTCC tapes have excellent properties in the 1-10 MHz range that allow for a high permeability, low loss solution.  These tapes are co-fired with a silver paste as the conductor.  This paper looks at ways to reduce dc resistance in the inductor design through packaging methods which in turn allow for higher current operation and better heavy load efficiency.  Fundamental limits for LTCC technologies are pushed past their limits during this work.  This work also explores fabrication of LTCC inductors using two theoretical ideas: vertical flux and lateral flux.  Issues are presented and methods are conceived for both types of designs.  The lateral flux inductor gives much better inductance density which results in a much thinner design. It is found that the active devices must be shielded from the magnetic substrate interference so active layer designs are discussed.  Alumina and Aluminum Nitride substrates are used to form a complete 3D integration scheme that gives excellent thermal management even in natural convection.  This work discusses the use of a stacked power technique which embeds the devices in the substrate to give double sided cooling capabilities.  This fabrication goes away from traditional photoresist and solder-masking techniques and simplifies the entire process so that it can be transferred to industry.  Time consuming sputtering and electroplating processes are removed and replaced by a direct bonded copper substrate which can have up to 8 mil thick copper layers allowing for even greater thermal capability in the substrate.  The result is small footprint and volume with a power density 3X greater than any commercial product with comparable output currents.  A two phase coupled inductor version using stacked power is also presented to achieve even higher power density. As better device technologies come to the marketplace, higher power density designs can be achieved.  This paper will introduce a 3D integration design that includes the use of Gallium Nitride devices.  Gallium Nitride is rapidly becoming the popular device for high frequency designs due to its high electron mobility properties compared to silicon.  This allows for lower switching losses and thus better thermal characteristics at high frequency.  The knowledge learned from the stacked power processes gives insight into creating a small footprint, high current ceramic substrate design.  A 3D integrated design is presented using GaN devices along with a lateral flux inductor.  Shielded and Non-Shielded power loop designs are compared to show the effect on overall converter efficiency.  Thermal designs and comparisons to PCB are made using thermal imaging.  The result is a footprint reduction of 40% from previous designs and power densities reaching close to 900W/in3. / Master of Science

The role played by power converting circuits is extremely important to almost any electronic system built today. Circuits that use converters of any type depend on power that is consistent in form and reliable in order to properly function. In addition, today's demands require more efficient use of energy, from large stationary systems such as power plants all the way down to small mobile devices such as laptops and cell phones. This places a need to reduce any losses to a minimum. The power conversion circuitry in a system is a very good place to reduce a large amount of unnecessary loss. This can be done using circuit topologies that are low loss in nature. For low loss and high performance, soft switching topologies have offered solutions in some cases. Also, limited study has been performed on device aging effects on switching mode power converting circuits. The impact of this effect on a converter's overall efficiency is theoretically known but with little experimental evidence in support. In this thesis, non-isolated buck type switching converters will be the main focus. This type of power conversion is widely used in many systems for DC to DC voltage step down. Newer methods and topologies to raise converter power efficiency are discussed, including a new synchronous ZVT topology . Also, a study has been performed on device aging effects on converter efficiency. Various scenarios of voltage conversion, switching frequency, and circuit components as well as other conditions have been considered. Experimental testing has been performed in both cases, ZVT's benefits and device aging effects, the results of which are discussed as well.

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Smart cameras operate mostly in sleep mode, which is light load for power supplies. Typical buck converter applications have low efficiency under the light load condition, primarily from their power stage and control being optimized for heavy load. The battery life of a smart camera can be extended through improvement of the light load efficiency of the buck converter. This thesis research investigated the first stage converter of a car black box to provide power to a microprocessor, camera, and several other peripherals. The input voltage of the converter is 12 V, and the output voltage is 5 V with the load range being 20 mA (100 mW) to 1000 mA (5000 mW). The primary design objective of the converter is to improve light load efficiency. A 3-level buck converter and its control scheme proposed by Reusch were adopted for the converter in this thesis. A 3-level buck converter has two more MOSFETs and one more capacitor than a synchronous buck converter. Q1 and Q2 are considered the top MOSFETs, while Q3 and Q4 are the synchronous ones. The extra capacitor is used as a second power source to supply the load, which is connected between the source of Q1 and the drain of Q2 and the source of Q3 and the drain of Q4. The methods considered to improve light load efficiency are: PFM (pulse frequency modulation) control scheme with DCM (discontinuous conduction mode) and use of Schottky diodes in lieu of the synchronous MOSFETs, Q3 and Q4. The 3-level buck converter operates in CCM for heavy load above 330 mA and DCM for light load below 330 mA. The first method uses a COT (constant on-time) valley current mode controller that has a built in inductor current zero-crossing detector. COT is used to implement PFM, while the zero-crossing detector allows for DCM. The increase in efficiency comes from reducing the switching frequency as the load decreases by minimizing switching and gate driving loss. The second method uses an external current sense amplifier and a comparator to detect when to shut down the gate drivers for Q3 and Q4. Schottky diodes in parallel with Q3 and Q4 carry the load current when the MOSFETs are off. This increases the efficiency through a reduction in switching loss, gate driving loss, and gate driver power consumption. The proposed converter is prototyped using discrete components. LTC3833 is used as the COT valley current mode controller, which is the center of the control scheme. The efficiency of the 3-level buck converter was measured and ranges from 82% to 95% at 100 mW and 5000 mW, respectively. The transient response of the converter shows no overshoot due to a 500 mA load step up or down, and the output voltage ripple is 30 mV. The majority of the loss comes from the external components, which include a D FF (D flip-flop), AND gate, OR gate, current sense chip, comparator, and four gate drivers. The proposed converter was compared to two off-the-shelf synchronous buck converters. The proposed converter has good efficiency and performance when compared to the other converters, despite the fact that the converter is realized using discrete components. / Master of Science

In this thesis, the conventional pulse-width modulated (PWM) and zero-voltage switching (ZVS) quasi-resonant buck converters are analyzed and a variable-frequency control technique is proposed to regulate the output voltage due to the immediate input line and load changes. The quasi-resonant technique provides favorable switching conditions for active switch to reduce switching losses and electromagnetic interference (EMI). The method is based on shaping the voltage across the active switch in quasisinusoidal fashion and the switching action occurs with nearly zero voltage across the active switch. This requires only two additional components to the conventional PWM buck converter. The proposed quasi-resonant converter is capable of operating in megahertz range with a significant improvement in performance and power density. Detailed analytic and small-signal models of the ZVS quasi-resonant buck converter are established and the switching behavior is investigated in order to provide nearly zerovoltage turn-on. The performance of the ZVS quasi-resonant technique is verified with the computer simulations. The results are compared with the experiments in the laboratory involving both the open-loop and closed-loop operations. The detailed experiment procedure is added to use this converter for educational purposes.

In order to provide the means to set up a control theory lab experiment involving position control of a brushed DC motor with current feedback, a pulse-width modulated motor controller was designed. The output voltage is controlled by an analog reference signal and the magnitude of the output current and voltage are measured and output. These inputs and outputs are connected to a DAQ I/O-unit such that the lab experiment can be implemented digitally. In addition, defining equations for the whole system were derived. Comparison between measurements and model showed it possible to use the current as feedback if low-pass filtered and the angular displacement controlled over a small angular interval.