The purpose of this thesis is to design and implement a linear quadratic optimal controller for a twin-buck converter with zero-voltage-transition (ZVT). The controller calculates duty ratio every cycle based on voltage and current feedback, as well as estimates the time instances when the synchronous rectification power switch current is zero. These time instances are crucial for ZVT operation. Via frequency modulation, the controller is designed to automatically regulate the output voltage to a desired value under load and voltage source variation. Simulations indicate that the proposed control design works. The controller is implemented using a Field Programmable Gate Array (FPGA). The experimental results match the simulations, which further verifies the applicability of the proposed voltage regulation strategy.

Power consumption and device size have been placed at the primary concerns for battery-operated portable applications. Switching converters gain popularity in powering portable devices due to their high efficiency, compact sizes and high current delivery capability. However portable devices usually operate at light loads most of the time and are only required to deliver high current in very short periods, while conventional buck converter suffers from low efficiency at light load due to the switching losses that do not scale with load current. In this research, a novel technique for buck converter is proposed to reduce the switching loss by reducing the effective voltage supply at light load. This buck converter, implemented in TSMC 0.18 micrometers CMOS technology, operates with a input voltage of 3.3V and generates an output voltage of 0.9V, delivers a load current from 1mA to 400mA, and achieves 54 percent ~ 91 percent power efficiency. It is designed to work with a constant switching frequency of 3MHz. Without sacrificing output frequency spectrum or output ripple, an efficiency improvement of up to 20 percent is obtained at light load.

The systems which contain coarsely quantized signals are commonly found in applications where the actuators and/or sensors can only output a finite number of levels. This thesis focuses on the problem of synthesizing a finite-level control force for a certain control task, first presenting a systematic design method based on the theory of sliding modes and then applying it to the designs of the class-D audio amplifier and synchronous buck converter. At the first part, a novel three-level modulation technique for a class-D audio amplifier is designed by the sliding mode control theory. The simulated and experimental results conform to the excellent performance of this three-level modulation scheme. In particular, the proposed modulation scheme improves the poor efficiency of a conventional two-level class-D audio amplifier when the audio input signal is small, also excludes the output LC filter. The experiment shows that the designed three-level class-D amplifier achieves a minimum total harmonic distortion plus noise of 0.039% and an efficiency of 85.18%. At the second part, the controller of a synchronous buck converter is designed. The proposed self-oscillating controller stabilizes the buck converter in sliding mode, without the need of a triangular wave generator like the conventional PWM method. A 12V/1.5V synchronous buck converter with proposed control is built in the laboratory. The experiment shows 0.66% of the static output ripple and 3% of the load regulation error in response to the 15A step change of the load current at a slew rate of 50A/£gs.

In this thesis a buck converter has been developed to be used as a test bench in power electronics laboratory. For this purpose, first, steady-state and small-signal analyses of a buck converter is carried out, then open-loop and closed-loop control of the converter are developed and simulated. Then, the circuit is manufactured and tested. The test results are compared with the simulation results. Finally, an experimantal procedure is prepared to enable the students to perform the experiment in the laboratory with the test bench developed.

This report is a study of the effects of a commercial 0.13[mu] process and automotive temperature corners on a synchronous DC-DC buck converter design. The basics of switching converters will be explored with an emphasis on voltage-mode controlled feedback. A Type-III compensation network is designed using transfer function analysis to compensate for the inherent double pole introduced by an LC network. The output of the compensation network will drive a pulse width modulation comparator to vary the duty cycle of the high-side PMOS and low-side NMOS transistor switches. After the synchronous buck converter design was complete, the effect of process and temperature on efficiency, output voltage ripple, inductor peak to peak current, and output voltage load response was examined. / text

This thesis studies residential dc distribution system with primary focus on point-of-load (POL) converters. The growing number of inherently dc loads, increasing penetration of distributed energy resources (DERs) and advancements in power electronic converters are some of the reasons to reconsider the existing residential ac distribution system. A dc distribution system can achieve higher efficiency by eliminating the ac-dc rectifiers and power factor correction stages currently used in most domestic electronic appliances. In this thesis, 380V is identified as a suitable voltage level for the main dc bus. Safety issues are discussed and common domestic loads are characterized. Two common converter topologies – buck and flyback converters are suggested as POL converters for heating and LED lighting loads respectively. State-feedback control is designed and implemented for buck converter and current mode control of flyback converter is implemented. A 500W POL buck converter using state-feedback with integral control is designed and tested for heating load applications. Finally a small dc distribution system is simulated using the converter models. The response of the system is stable under load and line changes. / text

Power consumption is the primary concern in battery-operated portable applications. Buck converters have gained popularity in powering portable devices due to their compact size, good current delivery capability and high efficiency. However, portable devices are operating under light load condition for the most of the time. Conventional buck converters suffer from low light-load efficiency which severely limits battery lifetime. In this project, a novel technique for buck converter is proposed to reduce the switching loss by reducing the effective input supply voltage at light load. This is achieved by switching between two different input voltages (3.3V and 1.65V) depending on the output current value. Experimental results show that this technique improves the efficiency at light loads by 18.07%. The buck voltage possesses an output voltage of 0.9V and provides a maximum output current of 400mA. The buck converter operates at a switching frequency of 1MHz. The prototype was fabricated using 0.18µm CMOS technology, and occupies a total active area of 0.6039mm^2.

abstract: Buck converters are electronic devices that changes a voltage from one level to a lower one and are present in many everyday applications. However, due to factors like aging, degradation or failures, these devices require a system identification process to track and diagnose their parameters. The system identification process should be performed on-line to not affect the normal operation of the device. Identifying the parameters of the system is essential to design and tune an adaptive proportional-integral-derivative (PID) controller. Three techniques were used to design the PID controller. Phase and gain margin still prevails as one of the easiest methods to design controllers. Pole-zero cancellation is another technique which is based on pole-placement. However, although these controllers can be easily designed, they did not provide the best response compared to the Frequency Loop Shaping (FLS) technique. Therefore, since FLS showed to have a better frequency and time responses compared to the other two controllers, it was selected to perform the adaptation of the system. An on-line system identification process was performed for the buck converter using indirect adaptation and the least square algorithm. The estimation error and the parameter error were computed to determine the rate of convergence of the system. The indirect adaptation required about 2000 points to converge to the true parameters prior designing the controller. These results were compared to the adaptation executed using robust stability condition (RSC) and a switching controller. Two different scenarios were studied consisting of five plants that defined the percentage of deterioration of the capacitor and inductor within the buck converter. The switching logic did not always select the optimal controller for the first scenario because the frequency response of the different plants was not significantly different. However, the second scenario consisted of plants with more noticeable different frequency responses and the switching logic selected the optimal controller all the time in about 500 points. Additionally, a disturbance was introduced at the plant input to observe its effect in the switching controller. However, for reasonable low disturbances no change was detected in the proper selection of controllers. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2016

Made available in DSpace on 2014-06-11T19:22:35Z (GMT). No. of bitstreams: 0 Previous issue date: 2006-07-07Bitstream added on 2014-06-13T19:28:08Z : No. of bitstreams: 1 balestero_jpr_me_ilha.pdf: 1530452 bytes, checksum: 2f4b0b27a64698bd0dbc3bf2a5590ae7 (MD5) / Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES) / Este trabalho apresenta um novo conversor PWM CC-CC buck não isolado. O conversor é gerado a partir de uma célula de comutação de três estados, composta basicamente por dois interruptores ativos, dois passivos e dois indutores acoplados. Neste conversor apenas metade da potência da carga é processada pelos interruptores ativos, reduzindo assim a corrente de pico sobre estes à metade do valor da corrente de pico de saída, tornando-o importante para aplicações em potências mais elevadas. O volume dos elementos reativos (indutores e capacitores) é reduzido, pois, pela característica do conversor, a freqüência da ondulação da corrente e da tensão de saída é o dobro da freqüência de operação dos interruptores. Para uma menor freqüência de operação, diminuem-se as perdas na comutação. Devido à topologia do conversor, as perdas totais são distribuídas entre todos semicondutores, facilitando a dissipação de calor. Outra vantagem é possuir uma menor faixa de operação na região de descontinuidade em comparação com o conversor buck clássico, ou seja, a faixa de operação no modo de condução contínua é ampliada. É detalhada a abordagem através de análises qualitativa e quantitativa do emprego da célula de comutação de três estados no conversor buck, operando em toda faixa de variação da razão cíclica (0 .D .1). Além de toda a análise matemática e desenvolvimento através de simulação digital, um protótipo de 1kW foi implementado e testado em laboratório. Os principais resultados experimentais estão apresentados e discutidos neste trabalho. / This work presents a new PWM DC-to-DC non-isolated buck converter. The converter is generated using the three-state switching cell, comprised of two active switches, two diodes and two coupled inductors. In this converter only part of the load energy is processed by the active switches, reducing the peak current in these switches to half of the value to the peak of the load current. This feature permits to operate this topology in larger power levels. The volume of the power reactive elements (inductors and capacitors) is also decreased since the ripple frequency on the output is twice the switching frequency. For a lower operating frequency, the switching losses are decreased. Due to the topology of the converter, the total losses are distributed among all semiconductors, facilitating the dissipation of heat. Another advantage of this converter is the smaller region to operate in discontinuous conduction mode when compared to conventional buck converter or, in other words, the operation range in continuous conduction mode is enlarged. The theoretical approach is detailed through qualitative and quantitative analyses of the employment of the three states switching cell in the buck converter, operating in the entire every variation range of the duty cycle (0 < D < 1). Besides the mathematical analysis and development through digital simulation, a prototype of 1kW was implemented and tested at laboratory. The main experimental results are introduced and discussed in this work.

abstract: Switch mode DC/DC converters are suited for battery powered applications, due to their high efficiency, which help in conserving the battery lifetime. Fixed Frequency PWM based converters, which are generally used for these applications offer good voltage regulation, low ripple and excellent efficiency at high load currents. However at light load currents, fixed frequency PWM converters suffer from poor efficiencies The PFM control offers higher efficiency at light loads at the cost of a higher ripple. The PWM has a poor efficiency at light loads but good voltage ripple characteristics, due to a high switching frequency. To get the best of both control modes, both loops are used together with the control switched from one loop to another based on the load current. Such architectures are referred to as hybrid converters. While transition from PFM to PWM loop can be made by estimating the average load current, transition from PFM to PWM requires voltage or peak current sensing. This theses implements a hysteretic PFM solution for a synchronous buck converter with external MOSFET's, to achieve efficiencies of about 80% at light loads. As the PFM loop operates independently of the PWM loop, a transition circuit for automatically transitioning from PFM to PWM is implemented. The transition circuit is implemented digitally without needing any external voltage or current sensing circuit. / Dissertation/Thesis / M.S. Electrical Engineering 2014