A quantized control means that the control force is restricted to takes only a finite number of prescribed levels. The well-known bang-bang control or relay control belongs to this category. This kind of control has the advantage of simple circuit realization using electronic switches or relays that feature low power consumption in their on-off operation. However, quantized control introduces noise and distortion, and even worse its high nonlinearity makes the stabilizing compensator design difficult. This thesis applies the concept of dynamic sliding mode to the synthesis of a multi-level quantized control, with the aim to stabilize the system, perform reference tracking and attenuate the switching noise. The applicability of the presented sliding-mode quantized control is demonstrated on a three-level buck converter. Compared with the conventional PWM (Pulse-Width Modulation) scheme, it eliminates the use of a complex three-level PWM generator and a current sensor. A 12V/8V three-level buck converter with sliding mode quantized control is designed and realized, which shows the output voltage with 0.4625% of average DC error, 2.8988% of the static output ripple and 2.3% of load regulation error in response to the load current steps from 0A/3A to 3A/0A, at a slew rate of 6.25A/£gsec.

In the thesis, LED driver circuits which are applied in low power lighting LED with constant output current and Power Factor Correction are presented. The non-isolated Buck converter are used for the LED drivers. According to different operating mode of inductance current, Power Factor Correction are realized with both the method of Voltage Follower Approach Control under Discontinuous Conduction Mode and the method of Nonlinear Carrier Control under Continuous Conduction Mode. NLC doesn¡¦t need the multiplier which is used in traditional power factor correction, therefore NLC can reduce the system cost. The designed circuits are verified by simulation of IsSpice software and practical experiments. From simulation and experimental results, it shows the proposed approaches achieve the goal with high power factor and constant output current.

In this dissertation, we propose a circuit design and implementation of physical layer for FlexRay-based automotive communication systems which are expected to be widely used in car electronics for the years to come. To reduce the volume of electrical lines in a car and ensure safe connections, the automotive communication systems are more important than ever. FlexRay systems have been deemed as better than other existing solutions for the complicated in-vehicle networks. A low-voltage differential-signaling-like transmitter is proposed to drive the twisted pair of the FlexRay bus. Furthermore, a three-comparator scheme is used to carry out bit slicing and state recognition at the receiver end. A prototype system as well as a chip implemented by using a typical 0.18 £gm single-poly six-metal CMOS process is reported in this dissertation. Furthermore, an accurate clock signal is required in any control system, especially in the vehicle applications, where the ¡§safety¡¨ is the top priority. Because of the TDMA strategy (Time Division Multiple Access) was chosen for the FlexRay communication protocol, the system clock should not be drifting too much. A robust 20 MHz clock generator with process, supply voltage, and temperature compensation and a low-jitter 80 MHz phase-lock loop are proposed in this dissertation to reduce hostile environment effects. Finally, because the ¡§safety¡¨ and ¡§reliability¡¨ are top design requirements in the automobile electronics, we should also focus on the power supply design in the in-car communication networks. Therefore, a high tolerant and high efficiency voltage converter is proposed in this dissertation. By utilizing stacked power MOSFETs, a voltage level converter, a detector and a controller, this design is realized by a typical CMOS process without any thick-oxide device to tolerate input voltage range up to 3 times of the VDD voltage.

¡@¡@We consider output voltage regulation of a novel twin-buck switching power converters with so-called zero voltage switching (ZVS) and zero current switching (ZCS). In order to observe the constraints imposed by ZVS and ZCS, it is necessary to adopt the pulse frequency modulation (PFM) technique, which lead to a switching system with aperiodic operating cycles. The control design is based on a sampled data model of the original switching dynamics and a linear quadratic criterion that takes the at-sampling behaviour into account. The applicability of the proposed controller is validated via numerical simulations written in MATLAB and SIMULINK. The controller is realized using Field Programmable Gate Array (FPGA). The experimental results indicate that the feedback system have good transient response and adequate robustness margin against source and load variation, which verify the applicability of the proposed control design approach.

The portable electronics market is rapidly migrating towards more compact devices with multiple functionalities. Form factor, performance, cost and efficiency of these devices constitute the factors of merit of devices like cell phones, MP3 players and PDA's. With advancement in technology and more intelligent processors being used, there is a need for multiple high integrity voltage supplies for empowering the systems in portable electronic devices. Switched mode power supplies (SMPS's) are used to regulate the battery voltage. In an SMPS, maximum area is taken by the passive components such as the inductor and the capacitor. This work demonstrates a single inductor used in a buck converter with two output voltages from an input battery with voltage of value 3V. The main focus areas are low cross regulation between the outputs and supply of completely independent load current levels while maintaining desired values (1.2V,1.5V) within well controlled ripple levels. Dynamic hysteresis control is used for the single inductor dual output buck converter in this work. Results of schematic and post layout simulations performed in CADENCE prove the merits of this control method, such as nil cross regulation and excellent transient response.

With scarce the energy source and the worsened environment pollution, how to create and use a clean and never exhausted energy is becoming very important day by day. This thesis we proposed the research and development of a solar energy storage system with fuzzy logic control. This solar energy storage system is composed of the solar cell, charger, batteries, buck converter and digital a signal processor. The solar energy storage charging system charger is based on buck circuit control with battery cycle pulse charging. with the fuzzy control theory combined in the tactics of charging , it¡¦s can improve the efficiency of charging, suppress the abnormally battery temperature rise, lengthen the battery¡¦s life, and reduce the waste used. In the experiment, four different charging methods, with the same starting voltage, are compared in terms of temperature control. Among the four methods, the fuzzy logic control proposed in this thesis is able to control the battery temperature at a good 30 Celsius Degree. Experimental and simulation results demonstrate the effectiveness and validity of the system.

This thesis presents a Mixed Linear/Switching Control (MLSC) scheme for voltage regulator modules (VRM). The MLSC employs two loops of feedback compensation, inner-loop switching compensation and outer-loop linear regulation. The purpose of the switching compensation is to linearize and stabilize the buck converter under the influence of switching noise and load variation. With switching compensation, the linearized plant of the buck converter can be simplified to a first-order stable transfer function at low frequencies. Accordingly, the outer-loop linear controller can be easily designed to regulate the output voltage using the linear control theory. The advantage of the proposed MLSC scheme is two-fold: easy to design and of low circuit complexity. There is no need of using any current detecting resistor and PWM generator, and also the stability and performance can be easily met by choosing positive controller coefficients. A 12V/1V single-phase VRM with proposed control is designed and simulated, which shows an output regulation with 0.4% steady- state output error and 7% load regulation error in response to the load current steps from 60A/1A to 1A/60A, at a slew rate of 60A/µsec.

This thesis comprises two topics : the first one is the design and implementation of FlexRay automotive communication system physical layer. The second part is the design of a high efficiency DC/DC Buck converter with sub-3 ¡Ñ VDD. The first topic discloses the physical layer design comprising the Bus Guardian and the Bus Driver used in an in-vehicle network compliant with FlexRay standards. It is realized in a mixed-signal chip using TSMC 1P6M 0.18 £gm CMOS process. Its core area is less than 0.8 mm2, and power consumption is less than 60 mW. The second topic is to design a DC to DC step-down converter, which can accommodate wide range VDD. By utilizing stacked power MOSFETs, a voltage level converter, a detector and a controller, the design is realized by a typical 1P6M 0.18 £gm CMOS process without any high voltage technology. The core area is less than 0.184 mm2, while the VDD range is up to 5 V. Since the internal reference voltage is 1 V, it can increase the output regulation range. The proposed design attains very high conversion efficiency to prolong the life time of power supply. Therefore, it can be integrated in a system chip to provide multiple supply voltage sources.

In this thesis, the design of a Switching Power Supply for switched-reluctance motor drive system power factor correction is presented. Switching power technology for the power supply is now widely used, which has the main advantages of high efficiency and small size. However, the traditional type of Switching Power Supply will reduce the impact on electricity usage and quality, and produce electricity pollution and waste, for example low power factor, and high harmonic distortion. In order to improve the power factor, this paper used the traditional method of multiplier power factor correction circuit, and the use of state-space averaging method to analysis Buck Derived Converters to implement the Switching ¡@ Reluctance Motor Drive circuit design; In addition, this thesis used the Average Current Control method to cause the inductor current to follow a sinusoidal signal, achieving the purpose of¡@power factor correction.The design of Buck Converters is based on switching theory. With this method, the electricity pollution problems introduced by switching reluctance motor drives is solved by the Averagingmethod derived form the converters. The mathematical Buck Converter model is brought into a block diagram, based on the design of Buck¡@Converters, and then simulated with PsPICE software. Finally the design of the output voltage control, compensation and current control loop is performed.

Resumo: Este trabalho apresenta um novo conversor PWM CC-CC buck não isolado. O conversor é gerado a partir de uma célula de comutação de três estados, composta basicamente por dois interruptores ativos, dois passivos e dois indutores acoplados. Neste conversor apenas metade da potência da carga é processada pelos interruptores ativos, reduzindo assim a corrente de pico sobre estes à metade do valor da corrente de pico de saída, tornando-o importante para aplicações em potências mais elevadas. O volume dos elementos reativos (indutores e capacitores) é reduzido, pois, pela característica do conversor, a freqüência da ondulação da corrente e da tensão de saída é o dobro da freqüência de operação dos interruptores. Para uma menor freqüência de operação, diminuem-se as perdas na comutação. Devido à topologia do conversor, as perdas totais são distribuídas entre todos semicondutores, facilitando a dissipação de calor. Outra vantagem é possuir uma menor faixa de operação na região de descontinuidade em comparação com o conversor buck clássico, ou seja, a faixa de operação no modo de condução contínua é ampliada. É detalhada a abordagem através de análises qualitativa e quantitativa do emprego da célula de comutação de três estados no conversor buck, operando em toda faixa de variação da razão cíclica (0 .D .1). Além de toda a análise matemática e desenvolvimento através de simulação digital, um protótipo de 1kW foi implementado e testado em laboratório. Os principais resultados experimentais estão apresentados e discutidos neste trabalho. / Abstract: This work presents a new PWM DC-to-DC non-isolated buck converter. The converter is generated using the three-state switching cell, comprised of two active switches, two diodes and two coupled inductors. In this converter only part of the load energy is processed by the active switches, reducing the peak current in these switches to half of the value to the peak of the load current. This feature permits to operate this topology in larger power levels. The volume of the power reactive elements (inductors and capacitors) is also decreased since the ripple frequency on the output is twice the switching frequency. For a lower operating frequency, the switching losses are decreased. Due to the topology of the converter, the total losses are distributed among all semiconductors, facilitating the dissipation of heat. Another advantage of this converter is the smaller region to operate in discontinuous conduction mode when compared to conventional buck converter or, in other words, the operation range in continuous conduction mode is enlarged. The theoretical approach is detailed through qualitative and quantitative analyses of the employment of the three states switching cell in the buck converter, operating in the entire every variation range of the duty cycle (0 < D < 1). Besides the mathematical analysis and development through digital simulation, a prototype of 1kW was implemented and tested at laboratory. The main experimental results are introduced and discussed in this work. / Orientador: Falcondes José Mendes de Seixas / Coorientador: Grover Victor Torrico Bascopé / Banca: Dionízio Paschoareli Junior / Banca: João Onofre Pereira Pinto / Mestre