Enhancing the quality of services in the distribution system is an important topic for power system research. It is imperative to employ precise network modeling and effective simulation tools, and a good system model is the key. This dissertation starts with modifying the building algorithms of Y-admittance and Z-impedance matrices. The Y-matrix will be built according to phase sequences. With the facts that the line self-impedance is significantly greater than the mutual-coupling terms and the existence of a high r/x ratio in distribution, two decoupled load flow methods (Phase-Decoupled¡BPD and Sub-Phase-Decoupled¡BSPD) with Current Injection Model(CIM) were developed. A new Z-matrix building algorithm was also developed in this dissertation. It decomposed the traditional Z into two sub-matrices, the upper and lower triangular matrices respectively. The matrices represent the relationships between the branch current and the bus injection current, and between the bus voltage and the branch current. Enhancing the quality of services will be effectively achieved by a proper capacitor placement technique. This dissertation develops a linear relationships of voltage changes versus the capacitor compensation, the branch current changes versus the capacitor compensation, and loss reductions versus the capacitor compensation. For loss reduction, a linear optimization function was defined to solve the capacitor placement problem. Tests have shown that the proposed methods were suitable for applications to an unbalance distribution system.

The operation speed of modern computer system has been upgraded from several hundred MHz to GHz. The instant current will pass to the power plane of the mother board by way of the IC pins and result in electromagnetic wave propagation between the power and ground plane, so called ¡§Ground bounce.¡¨ To prevent the ground bounce from IC operation, decoupling capacitors are used. In this thesis, an efficient numerical approach which is based on the two-dimensional (2D) finite-difference time-domain (FDTD) method and with a new recursive algorithm has been used for modeling the power/ground planes characteristics with SMT capacitors above them. By the way, we take several methods, such as Debye model, FDTD-SPICE, and telegrapher¡¦s equation, for modeling various mother board structures. Finally, we use the genetic algorithm for calculating the optimum capacitor placements to meet the expect ground bounce limitation.

In this thesis, we use the no-capacitor feed-forward (NCFF) compensation scheme which employs a feed-forward path to obtain high gain, high frequency. We use CMFB circuit to adjust the common-mode output voltages and the bias circuit. The CMFB circuit makes the output accurately to the reference voltage. The circuit was designed and fabricated TSMC 0.35 £gm CMOS process. The dc gain is around 90dB and the cut-off frequency is 1GHz. The supply voltage is ¡Ó1.25V. The output voltage is smaller than 10mV.

In order to address the challenges of capacitive sensing in harsh environment, self resonant passive wireless sensors are studied. The capacitive sensing elements based on interdigitated capacitor (IDC) sensor are used. A semi-empirical model providing accurate capacitance calculation for IDCs over a wide range of dimensions and dielectric constants is developed. An equivalent circuit model based on electric field distribution is proposed, leading to a closed form approximation for IDC capacitance calculation. The conductivity of the material under test is also considered and a model is proposed to calculate effective capacitance as a function of conductivity and measurement frequency. The model is used to study the design optimization of IDC sensor and suggested design procedure is proposed. To wirelessly interrogate the capacitive sensor, it is connected to an inductive element to form a resonant circuit, while the measurement is made at remote reader coil. Advantages and disadvantages of different type of resonant structure design are analyzed. In order to assist the design process, a SPICE circuit model is developed to estimate the resonant frequency of the self resonant sensor. Miniaturized sensors with different dimensions are designed, fabricated and tested. The sensor is integrated with silicon nanowire fabric coated with polymer. Measurements are made to illustrate the enhancement in sensing capability by integrating chemical selective material. / text

Transient Recovery Voltage (TRV) is an important consideration in the selection and installation of circuit breakers with appropriate ratings. Capacitor banks with inrush current limiting reactors are an integral part of the power system. Capacitor banks with inrush reactors on the load side terminal of the capacitor breaker alter the TRV seen across the breaker and it is critical to carry out the TRV analysis to prevent circuit breaker failure. TRV analysis has been performed for various capacitor bank - inrush reactor configurations, with the fault occurring at different terminals on the load side. Analytical solutions have been presented for both single-phase and three-phase ungrounded capacitor banks. Neutral displacement voltage of three-phase ungrounded capacitor banks result in increased stress across the breaker. Results have been validated with PSCAD simulation and MATLAB plots. / text

The miniaturization of chemical and biological sensors has received considerable attention in recent years for medical diagnostics, environmental monitoring, pharmaceutical screening, military applications, etc. One interesting area of development in microfluidic system is detecting dielectric properties of MUT (Material Under Test) using IDC (Interdigital Capacitor) electrodes. The IDC chemical sensor has been investigated by many researchers because they are cheap to manufacture and can be easily integrated with other sensing components and signal processing electronics. This dissertation presents the design, fabrication, and testing of an IDC (interdigital capacitor) electrode sensor for a fluid property monitoring component that can be integrated into a microfluidic system. One practical point of this research is the analytical evaluation of the interdigital electrode capacitance for the detection of conductivity and permittivity of the aqueous solutions, which is not apparently analyzed in other chemical sensor applications. In addition, a new noble methodology of remotely accessing the IDC sensor by wireless inductive coupling similar to EAS (Electronic Article Surveillance) tags is presented. / text

This thesis presents an energy monitoring system to measure energy consumption of software applications to support security and power management for embedded devices. The proposed system is composed of an Actel Fusion device and a custom designed energy measurement circuit. The Fusion device measures the voltage and the current of the target device at a defined sampling rate. The energy measurement circuit is designed as a current integrator over fixed intervals using the switched-capacitor integrator technique to store energy information of the target device within Fusion’s sampling intervals. This circuit is designed to accommodate the low sampling rate of the Fusion device. Experimental results showed that the Fusion device allows the measurement of the energy of the target device at a minimum rate of 15 µs. The energy measurement circuit is implemented using the 65 nm CMOS technology. Simulation results showed that this circuit provides 91%~97% average energy measurement accuracy.

The objective of this Master's thesis was to design and implement a low power Analog to Digital Converter (ADC) used for sensor measurements. In the complete measurement unit, in which the ADC is part of, different sensors will be measured. One set of these sensors are three strain gauges with weak output signals which are to be pre-amplified before being converted. The focus of the application for the ADC has been these sensors as they were considered a limiting factor. The report describes theory for the algorithmic and incremental converter as well as a hybrid converter utilizing both of the two converter structures. All converters are based on one operational amplifier and they operate in repetitive fashions to obtain power efficient designs on a small chip area although at low conversion rates. Two converters have been designed and implemented to different degrees of completeness. One is a 13 bit algorithmic (or cyclic) converter which uses a switching scheme to reduce the problem of capacitor mismatch. This converter was implemented at transistor level and evaluated separately and to some extent also with sub-components. The second converter is a hybrid converter using both the operation of the algorithmic and incremental converter to obtain 16 bits of resolution while still having a fairly high sample rate.

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The quality of electric power has been a constant topic of study, mainly because inherent problems to it can bring great economic losses in industrial processes. Among the factors that affect power quality, those related to transients originated from capacitor bank switching in the primary distribution systems must be highlighted. In this thesis, the characteristics of the transients resulting from the switching of utility capacitor banks are analyzed, as well as factors that influence there intensities. A practical application of synchronous closing to reduce capacitor bank switching transients is presented. A model that represents a real distribution system 12.47kV from Shelbyville sub-station was built and simulated using MATLAB/SIMULINK software for purposes of this study. A spectral analysis of voltage and current waves is made to extract the acceptable capacitor switching times by observing the transient over-voltages and, harmonic components. An algorithm is developed for practical implementation of zero-crossing technique by taking the results obtained from the SIMULINK model.