<p>Examensarbetet utfördes för Easygamer i Skoghall vilket är ett företag som bl.a. sysslar med modifiering av de flesta av dagens spelkonsoler samt försäljning av olika datorprodukter. Företaget ville att vi skulle göra om en Xbox till en ”studentdator” som de kallade det. Detta för att man ska kunna få en ganska kraftfull dator för inte så mycket pengar. Med en sådan dator skulle man sedan kunna använda ordbehandlingsprogram, lyssna på musik, surfa på Internet m.m. men självklart också kunna använda Xboxen som en vanlig spelkonsol, om så önskas.</p> / <p>The Degree Project was performed at Easygamer in Skoghall which is a company that among other things modifies most of today’s gaming consoles and sells computer products. They wanted us to transform an Xbox to a “student computer”. You will be able to get a quite powerful computer for not that much money. With this kind of computer you will be able to use “office applications”, listen to music, use the internet etc. But of course, also use the Xbox as a gaming console, if you want to.</p>

The explosive development of wireless communication services creates a demand for more flexible and cost-effective communication systems that offer higher data rates. The obvious trend towards small-size and ultra low power systems, in combination with the ever increasing number of applications integrated in a single portable device, tightens the design constraints at hardware and software level. The integration of current mobile systems with the third generation systems exemplifies and emphasizes the need of monolithic multi-band transceivers. A long term goal is a software defined radio, where several communication standards and applications are embedded and reconfigured by software. This motivates the need for highly flexible and reconfigurable analog radio frequency (RF) circuits that can be fully integrated in standard low-cost complementary metal-oxide-semiconductor (CMOS) technologies. In this thesis, the Voltage-Controlled Oscillator (VCO), one of the main challenging RF circuits within a transceiver, is investigated for today’s and future communication systems. The contributions from this work may be divided into two parts. The first part exploits the possibility and design related issues of wide-band reconfigurable integrated VCOs in CMOS technologies. Aspects such as frequency tuning, power dissipation and phase noise performance are studied and design oriented techniques for wide-band circuit solutions are proposed. For demonstration of these investigations several fully functional wide-band multi-GHz VCOs are implemented and characterized in a 0.18µm CMOS technology. The second part of the thesis concerns theoretical analysis of phase noise in VCOs. Due to the complex process of conversion from component noise to phase noise, computer aided methods or advanced circuit simulators are usually used for evaluation and prediction of phase noise. As a consequence, the fundamental properties of different noise sources and their impact on phase noise in commonly adopted VCO topologies have so far not been completely described. This in turn makes the optimization process of integrated VCOs a very complex task. To aid the design and to provide a deeper understanding of the phase noise mechanism, a new approach based on a linear time-variant model is proposed in this work. The theory allows for derivation of analytic expressions for phase noise, thereby, providing excellent insight on how to minimize and optimize phase noise in oscillators as a function of circuit related parameters. Moreover, it enables a fair performance comparison of different oscillator topologies in order to ascertain which structure is most suitable depending on the application of interest. The proposed method is verified with very good agreement against both advanced circuit simulations and measurements in CMOS and bipolar technologies. As a final contribution, using the knowledge gained from the theoretical analysis, a fully integrated 0.35µm CMOS VCO with superior phase noise performance and power dissipation is demonstrated.

Syftet med examensarbetet var att programmera en viterbiavkodare i VHDL och sedan syntetisera den till en FPGA. Först testades viterbialgoritmen i Matlab och Simulink för att få en förståelse för hur Viterbialgoritmen fungerar. Inom ramen för exjobbet har vi gjort en viterbiavkodare i Matlab samt en VHDL version som vi har simulerat i Modelsim. Avkodaren klarar inte av att avkoda punkterade bitströmmar. Att tillverka själva kodaren för punkterad kodning är enkelt men att sedan avkoda bitströmmen visade sig vara mer komplext. Att avkoda punkterad kod kräver ingen ändring av avkodaren men bitströmmen skall modifieras genom att man stoppar in dummybitar enligt ett givet mönster innan de når avkodaren men efter att mottagaren har tagit emot bitströmmen. Pga. tidsbrist prioriterades inte punkterad kodning och rapporten kom att ändra inriktning så att den snarare ska kunna fungera som starthjälp för kommande examensarbetare eller för andra inom universitetet som har till uppdrag att utveckla en viterbiavkodare.

No description available.

The intention of this thesis project report is to control a servo motor by using Electromyography(EMG) signals in the purpose of learning about bioamplifers and how ATMEL AVR Series microcontrollers work. EMG is the a test that is used to record the electrical activity of muscles. In order to fulfill our intention an EMG amplifier, an ADC converter and a servo motor controller is build to be used with the simple mechenical gripper where the control of the gripper is directly related with the amplitude of the EMG signals taken from the hand muscles. In the development and USART serial communication part is also added enabling to see the ADC results in computer.

There is a lot of literature already available describing well-structured approach for embeddeddesign and implementation of Application Specific Integrated Processor (ASIP) micro processorcore. This concept features hardware structured approach for implementation of processor core fromminimal instruction set, encoding standards, hardware mapping, and micro architecture design,coding conventions, RTL,verification and burning into a FPGA. The goal is to design an ASIPprocessor core (Micro architecture design and RTL) which can perform DSP task, e.g., FIR. Thereport is a well structured approach of design and implementation of an ASIP DSP processor forDSP applications like FIR. This report contains design flow starting from Instruction set design,micro architecture design and RTL implementation of the core. Details of the power simulationsof FPGA are also listed and analyzed.

The aim of this thesis is the design and implementation of a standardized interface to communicate a NC machine with an industrial robot. This interface consists of an ‘electronic box’ which includes a powerful board that is perfect for automation projects composed of a microcontroller, serial ports, optocouplers, relays, etc… The main component of this PCB is the microcontroller. The Atmel AT90CAN128 microcontroller is a good choice for this purpose since it is perfectly suited for industrial and automotive applications and it supports CANopen and DeviceNet implementation.   The industrial robot’s communication between the board is performed through CAN bus. In order to communicate the interface with the NC machine it has eight optocouplers that are used as inputs and eight relays are used as outputs. Developments of programs using C language to communicate robots and NC machines have been developed by the software that provides Atmel for 8-bit AVR applications called AVR Studio 4 + WinAVR.

No description available.

Smart cameras are part of many automated system for detection and correction in various systems. They can be used for detecting unwanted particles inside a fuel tank or may be placed on an airplane engine to provide protection from any approaching obstacle. They can also be used to detect a finger print or other biometric identification on a document or in some video domain. These systems usually have a very sensitive fast processing nature, to stop some ongoing information or extract some information. Image compression algorithms are used  for  the  captured  images to enable fast communication between different nodes i.e. the cameras and the processing units. Nowadays these algorithms are very popular with sensor based smart camera. The challenges associated with these networks are fast communication of these images between different nodes or to a centralized system. Thus a study is provided for an algorithm used for this purpose. In-depth study and Matlab modeling of CCITT group4 TIFF is the target of this thesis. This work provides detail study about the CCITT TIFF algorithms and provides a Matlab model for the compression algorithm for monochrome images. The compressed images will be of a compression ratio about 1:15 which will help in fast communication and computation of these images.  A developed set of 8 test images with different characteristics in size and dimension is compressed by the Matlab model implementing the CCITT group4 TIFF. These compressed images are then compared to same set of images compressed by other algorithms to compare the compression ratio.

Detta ingenjörsarbete är utfört hos Syntronic Research and Development AB i Gävle och går ut på att undersöka möjligheten att separera en display-modul från sin styrande processor-krets samt att skapa ett generellt gränssnitt för att möjliggöra ett enkelt utbyte av display-moduler. Detta har genomförts genom att konstruera en prototyp, baserad på en så kallad serializer / deserializer-lösning. En förstudie har genomförts där lämpliga komponener valts ut för uppgiften och olika lösningar vägts mot varandra. En prototyp har sedan konstruerats, mönsterkort har tillverkats men tyvärr inte monterats (på grund av ett logistiskt missöde). Resultatet är, förutom ovan nämnda begränsning, en prototyp som väl uppfyller de specifikationer som anges i uppdragsbeskrivningen. Flera förslag till vidareutveckling presenteras som kan utöka funktionaliteten. / This engineering work has been conducted at Syntronic Research and Development AB in Gävle and aims to explore the possibilities of separating a display module from its controlling processor circuit and to create a general interface to allow easy replacement of display modules. This has been implemented by designing a prototype, based on a so-called serializer / deserializer solution. A pilot study has been carried out where appropriate components has been selected for the task, and various solutions have been weighted against each other. A prototype has been designed, printed circuit boards have been produced but unfortunately not mounted (because of a logistical mishap). The result is, with the above limitations, a prototype that fully satisfies the specifications outlined in the task description. Several suggestions for further development are presented, which could extend the functionality.