<p>Routing techniques for plain ’flat’ microchips have been developed extensively and will soon reach its limitations. One natural step would be to develop chips which are manufactured in a more cubic type of volume, as oppose to the classical flat design. </p><p>This thesis proposes a method for routing two-point nets across a three- dimensional channel. The height required by this algorithm is of the order <i>O(n</i> ^(3/2)), where n is the number of terminals on a square top-layer with the side <i>2 (n</i>^(1/2)). </p><p>The algorithm proposed here is based on"On Routing Two-Point Nets Across a Channel", by Ron Y. Pinter [9], and the concepts from this paper are explainedin this thesis to familiarise the reader these. </p><p>It is also shown that the proposed algorithm is more effective in its volume than the two-dimensional counterpart. The algorithm here is of the order <i>O(n</i>^(3/2)) with the two-dimensional algorithm of the order <i>O</i>(<i>n</i>²).</p>

<p>Nimo Verken AB is the leading producer in the Scandinavia of drying cabinets. The construction has, with small changes, been the same since the 70s with a thermostat and a timer as controlling system. There was a wish to develop a modern cabinet which showed remaining time on a display and with energy saving functions.</p><p>In this report we go through how it is possible to implement a digital controlling system, where remaining time is shown on a display and where it is possible to choose a preset “program”.</p><p>The report first presents the fundamental theory for a PIC, where we describe the different registers, how interrupts are handled, the internal clock function and how data is sent to control the different parts of the construction.</p><p>Next the report presents and describes the new hardware that is needed, such as the encoder, the temperature sensor and the display.</p><p>After the theory we describe how the program in the PIC may be drafted. Last in the report we have the result of the tests of the temperature variations and the accuracy of the time.</p>

Silicon Carbide (SiC) is a wide band-gap semiconductor material with excel-lent material properties for high frequency, high power and high temperature elec-tronics. In this work different SiC field-effect transistors have been studied using theoretical methods, with the focus on both the devices and the methods used. The rapid miniaturization of commercial devices demands better physical models than the drift-diffusion and hydrodynamic models most commonly used at present. The Monte Carlo method is the most accurate physical methods available and has been used in this work to study the performance in short-channel SiC field-effect devices. The drawback of the Monte-Carlo method is the computational power required and it is thus not well suited for device design where the layout requires to be optimized for best device performance. One approach to reduce the simulation time in the Monte Carlo method is to use a time-domain drift-diffusion model in contact and bulk regions of the device. In this work, a time-domain drift-diffusion model is implemented and verified against commercial tools and would be suitable for inclusion in the Monte-Carlo device simulator framework. Device optimization is traditionally performed by hand, changing device pa-rameters until sufficient performance is achieved. This is very time consuming work without any guarantee of achieving an optimal layout. In this work a tool is developed, which automatically changes device layout until optimal device per-formance is achieved. Device optimization requires hundreds of device simulations and thus it is essential that computationally efficient methods are used. One impor-tant physical process for RF power devices is self heating. Self heating can be fairly accurately modeled in two dimensions but this will greatly reduce the computa-tional speed. For realistic influence self heating must be studied in three dimensions and a method is developed using a combination of 2D electrical and 3D thermal simulations. The accuracy is much improved by using the proposed method in comparison to a 2D coupled electro/thermal simulation and at the same time offers greater efficiency. Linearity is another very important issue for RF power devices for telecommunication applications. A method to predict the linearity is imple-mented using nonlinear circuit simulation of the active device and neighboring passive elements.

The data acquisition system COMET developed by Saab AB contains a unit for signal conditioning and A/D conversion, called KSM. The varieties in signal conditioning constitutes of a number of specific PBAs and maintenance as well as reconfiguration of these are complicated not to mention costly. This thesis has aimed to investigating whether the signal conditioning circuits can be replaced by a general purpose, programmable solution. If so, how can this be done? The development has been carried out by evaluating ideas through the use of a laboratory environment and has resulted in an analog design for laboratory purpose. A reconfigurable design is the result of this thesis as an alternative to the solution used today. In the proposed design mainly digital otentiometers, switches and MUXes are used. In that way signal path and overall behaviour can be selected. Some extensions have been made in comparison to the current functionality, but additional development is necessary to make the design complete. Future versions of the COMET system could be significantly improved by considering the result of this thesis when developing the signal conditioning circuitry.

Detecting small signals with a comparator demands that the total voltage offset is lower than the actual signal. The total offset includes the voltage offset in the comparator and the voltage offset that is created by the offset currents that flows thru the load at the comparators input. The goal with this comparator that has been developed has been that it will have a total voltage offset at maximum 500 uV. The comparator does not need to be extremely fast or does not need to operate in a big frequency area. To have all the flexibility that is needed a full custom technique is used. When the mismatch is most unfavourable the total offset is 209.24 uV which is within the goal. / För att kunna detektera små signalnivåer med en komparator krävs att den har en lägre total spänningsoffset än den signalnivå den skall detektera. I den totala offseten ingår dels den rena spänningsoffseten i komparatorn och dels den spänningsoffset som kommer att skapas när offsetströmmar på komparatorns ingångar går igenom den last som finns på ingången. Målet med den komparator som utvecklats har varit att den skall ha en total spänningsoffset på maximalt 500 uV. Inga direkta krav såsom att den skall vara snabb och att den skall kunna arbeta inom ett stort frekvensområde finns. För att få den flexibilitet som behövs är komparatorn konstruerad i en så kallad full custom teknik. När missanpassningen är som mest ogynnsam hamnar den totala spänningsoffseten på 209.24 uV vilket ligger inom målet med god marginal.

This Master's Thesis describes the design of a new system where a digital signal processor has been added to an existing imaging system consisting of field programmable gate arrays. The new system will offer a higher degree of flexibility by considerably shortening the design time and make it possible to implement more complex algorithms than the existing ones. The choice of system architecture and a test implementation are discussed. The test implementation consists of a program for the digital signal processor and VHDL code for one of the field programmable gate arrays. The code for the digital signal processor was designed for testing on an evaluation board from Texas Instruments. The evaluation board is connected to a computer, which runs a Windows program to visualize the result. The choice of algorithm has not been made yet. In the test implementation a skewing algorithm is used as an example. Two implementations of the skewing algorithm has been optimized, one fix point version and one floating point version.

Frysar som känner av om dörren står öppen och spisar som registrerar värmeplattornas temperatur och inkopplingstid och vid fara larmar bostadsinnehavaren. De så kallade intelligenta konsumentprodukterna kommer i en snar framtid ersätta många av dagens ”dumma” apparater. Intelligensen skulle emellertid enkelt kunna kopplas till befintlig apparatur utan att något ingrepp i hårdvaran behöver göras. Baserat på en patentsökt idé av Niclas Fock på Combitech Systems har ett system konstruerats, som på ett snabbt, enkelt och kostnadseffektivt sätt möjliggör smarta produkter redan idag. / Cabinet freezers that can sense if the frontdooris unproperly closed and stoves registering temperature and usage time of the plates, alerting the house owner when danger occurs. These so called intelligent consumer products will in a nearby future replace many of todays ”dumb” devices. But intelligence could be applied on existing apparatus without changing its hardware. Based on a idea (pending patent) by Niclas Fock at Combitech Systems a system is designed. This system will in a rapidly, simple and cost effectively manner realise smart products already today.

Globally-asynchronous locally-synchronous (GALS) systems may become a solution for nowadays challenges in the field of VLSI design. Fully synchronous chips are becoming not feasible anymore due to clock distribution and power consumtion problems. The value of GALS lies in combination of well know synchronous design methods and relative simple asynchronous communication channels. The key components are the communication control ports around the synchronous modules and the stretchable clock also called a wrapper. This clock has a unbound delay and is controlled by events the asynchronous channel. A simple GALS system consisting of a 4-bit transmitter, integrator and receiver has been designed and layouted for a 0,35 micron CMOS proces. A 4-phase bundled protocol is used with GasP FIFO's. Novel circuits has been designed to switch from the one wire asynchronous communication of the FIFO to the 4-phase of the wrapper. The report also dicusses the challenges for manufature test on asynchronous designs. A test strategy for GALS systems is been devoloped.

Den här rapporten innehåller information om hur man skapar en länk mellan en dator och ett minne via en dators serieport. Ett RS232-protokoll används för att upprätthålla den här länken. För att ta hand om minnet samt upprätthålla kommunikationen med datorn har en FPGA programmerats. Intel hex8 formatet används för datan. Ett program för Windows 98 skapades också. Programmet öppnar en fil och läser tecken. Tecknen översätts till heltal som sänds till serieporten. Programmet kan också spara data till en fil. Data hämtas från minnet via serieporten. / This report contains information how to establish a link between a computer and a memory through the serialport of a computer. The RS232 protocol is used to establish this link. To handle the memory and the communication with the computer a FPGA has been programmed. The data is in Intel hex8 format. A program for Windows 98 were also created. The program opens a file and reads characters from it. The charcters are translated into integers which are sent to the serialport. The program can also store data, recieved from the serialport, to a file.

This report is the basis for a Bachelor of Science thesis in engineering done at Volvo Powertrain in Gothenburg. The problem consisted of investigating a circuit with a PWM-controlled MOSFET driving a DC-motor. The problem was to investigate what caused the circuit to break the transistor. Finally an improvement of the circuit is designed making the MOSFET withstand the stressful conditions exposed to. An overall description of the problems with switching an inductive load using a MOSFET as switch is done. Some methods to protect the MOSFET from failure are also discussed. Finally a discussion is held to suggest what broke the MOSFET, and an improved design is proposed.