This Master Thesis was conducted by Rikard Eriksson and Vlad Badea for their Master of Science degree in Electronics Design Engineering at the University of Linköping (Linköpings Universitet), Sweden. HTC Sweden AB initialized this Thesis and the Thesis contains a pre study of pseudolite based indoor navigation systems, a design of a simple pseudolite and finally some recommendations of applications. The pre study starts off with an introduction of the GPS system. This since pseudolite based systems and GPS have many similarities. Different pseudolites based techniques were then investigated and the pre study is wrapped up with a very short briefing on the Hammerhead chip. Some of the pseudolite based techniques were worth some more looking into and a pseudolite was therefore designed and simulated. There was unfortunate not enough time to actually build the pseudolite and verify it. Some recommendations to HTC Sweden were given in the last chapter of this thesis. The authors of this thesis recommend some interesting techniques and how the future work could proceed.

Hagen, Fernuniv., Diss., 2004. / Computerdatei im Fernzugriff.

Universiẗat, Diss., 1990--Paderborn.

Hagen, FernUniversiẗat, Diss., 2004.

<p>This master thesis describes the creation of a fully parameterizable design tool, intended for automatic generation of standard cell layouts from basic schematic information. The thesis covers general background on programs for automatic layout generation, standard cells and basics in IC design. Algorithms commonly used in various parts of such programs are presented, and the ones used to implement the tool are described in depth.</p>

<p>When implementing syncronous filters with global clock nets, a substantial amount of energy is consumed in the clock net. Hence, it is interesting to reduce the size of the clock net, which in turn will reduce the total energy consumption. One way to acheive this, is to create a SIC (Structured Interfacing of Computational elements) since such a structure can be created without a global clock net. Our results show that a fifth order wavedigital filter with a sample rate of at least 10M samples/sec may be achieved</p>

<p>Att ett grafikkort ska behandla data och sen generera en bild på en skärm är en ganska logisk funktion för ett grafikkort. Vad som har gjorts här är att alla grundläggande funktioner för grafikkortet har tagits bort, detta för att ingen behandling ska göras. Detta har gjorts för att kunna låta data passera genom kortet med så hög hastighet som möjligt. Att låta data gå genom kortet var det första steget. Efter det skulle förhoppningsvis ett stabilt system ha uppnåtts där vi kunde göra överföringen av data snabbare. Tyvärr blev det inte tillräckligt stabilt och vår slutsats är att man inte kan använda detta kort på det här sättet. </p><p>För att kunna genomföra detta programmerades FPGA:n med VHDL-kodning. Innan VHDL programmeringen så studerades manualen för kortet för att veta hur de olika registrena på kortet skulle ställas in. </p><p>För att testa programmering konstruerades en räknare som genererade en trekantsvåg på ett inkopplat oscilloskop. </p><p>Den ursprungliga uppgiften klarades av. Detta var att skicka igenom data utan den skulle behandlas.</p>

<p>This thesis for the Master of Science degree was performed at Oppunda Electronics AB. The assignment was to further develop an existing prototype of a dispensing equipment. The dispensing equipment doses a kind of glue, bonding which dentist use to mend teeth. The dispensing equipment is adjusted to dose 12 micro litres of bonding. With the dispensing equipment SafeBond Electronic the user can reduce the bonding consumption with approximately 50 percent. Furthermore will the handling of the bonding be more hygienic, because the photoelectric sensor allows the user to start a dosage without touching any part of the dispensing equipment. </p><p>The main requirements for the development was to reduce the size of the existing prototype and implement functions to makeit possible to change the dose time and display the current dose time. Some parts and components have been replaced and reorganized to reduce the size of the dispenser. The choice of a steep motor, which makes the rotation when a dosage is performed, is the largest contribution to shrink the size of the equipment. Also the new designed circuit board makes it possible to reduce the size of the dispensing equipment.</p><p>A LCD is used to show the current dose time. The LCD is a part of a LCD module. To change the dosing time two push buttons are being used. A microcontroller is controlling the steep motor. The microcontroller is a PIC16F877A from Microchip. The microcontroller in the dispensing equipment is controlling all the functions. The program code is designed to function in an interrupt routine. This makes it possible to set the processor in a sleep mode when the dispenser is not in use and decrease the power consumption. </p><p>More functions have been implemented in the dispenser and it is now more suitable for itsassignment. In the mean time it has been possible to reduce the size of the equipment. The chosen parts andcomponents make a good price function ratio. During the product development a lot of documentations have been done. Which make the dispensing equipment ready to be implemented in production.</p>

<p>The Kerngen Module in MATLAB can be used to optimize a filter with regards to an ideal filter; while taking into consideration the weighting function and the spatial mask. To be able to remotely do these optimizations from a standard web browser over a TCP/IP network connection would be of interest. This master’s thesis covers the project of doing such a system; along with an attempt to graphically display three-dimensional filters and also save the optimized filter in XML format. It includes defining an appropriate DTD for the representation of the filter. The result is a working system, with a server and client written in the programming language PIKE.</p>

<p>In this thesis, a Static Random Access Memory generator has been designed and implemented. The tool can generate memories of different sizes. The number of words that can be stored can be chosen among powers of 2 and the number of bits per word can be up to 48. </p><p>The focus of the thesis was to find an adequate structure for the generated memories depending on the size, and develop a memory generator that implements the structures, which has been thoroughly done. The single circuits used in the generated memories can be substituted with better circuits as well as adapted to other processes. </p><p>All circuits apart from a block decoder circuit have been developed. The memory generator was not supposed to automatically produce a complete layout, and some manual interventions on the memories generated by the tool are necessary. The tool requires to be developed further to minimise this manual intervention on the generated memories. The complete memories generated have not been tested because of their complexity, but tests on circuits as well as many parts of the memories have been carried out. </p><p>During the thesis work, a large amount of tasks had to be carried out and a lot of issues had to be dealt with, which has been a problem. The tool used for the implementation has powerful features for both analog and digital electronic design, but has stability problems with large designs, which has been a big obstacle in this work.</p>