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Built-In Self-Test for input/output tiles in field programmable gate arraysLerner, Lee W., Stroud, Charles E., January 2008 (has links) (PDF)
Thesis (M.S.)--Auburn University, 2008. / Abstract. Vita. Includes bibliographical references (p. 104-106).
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Built-in self-test configurations for field programmable gate array cores in systems-on-chipHarris, Jonathan McKinley, Stroud, Charles E. January 2004 (has links) (PDF)
Thesis(M.S.)--Auburn University, 2004. / Abstract. Vita. Includes bibliographic references (p.123-125).
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An FPGA architecture design of a high performance adaptive notch filter /Szalkowski, Michael James. January 2008 (has links)
Thesis (M.S.)--Rochester Institute of Technology, 2008. / Typescript. Includes bibliographical references (leaves 102-106).
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Built-in self-test of the programmable interconnect in field programmable gate arraysDixon, Bobby Earl, Stroud, Charles E., January 2008 (has links) (PDF)
Thesis (M.S.)--Auburn University, 2008. / Abstract. Vita. Includes bibliographical references (p. 76-77).
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Étude des compromis espace/temps dans les systèmes reconfigurables, pour la technologie PSC /Simard, Stéphane, January 2006 (has links)
Thèse (M.Eng.) -- Université du Québec à Chicoutimi, 2006. / "Mémoire présenté à l'Université du Québec à Chicoutimi comme exigence partielle de la maîtrise en ingénierie" CaQCU Bibliogr.: f. 128-136. Document électronique également accessible en format PDF. CaQCU
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Development of nonlinear reconfigurable control of reconfigurable plants using the FPGA technology /Han, Yi. January 2008 (has links)
Thesis (MTech (Electrical Engineering))--Cape Peninsula University of Technology, 2008. / Includes bibliographical references (leaves 335-340). Also available online.
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Analysis and improvement of Virtex-4 block RAM Built-In Self-Test and introduction to Virtex-5 block RAM Built-In Self-TestGarrison, Brooks, Stroud, Charles E., January 2009 (has links)
Thesis--Auburn University, 2009. / Abstract. Vita. Includes bibliographical references (p. 112-113).
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Dual reference signal post-silicon reconfigurable clock distribution networksChattopadhyay, Atanu, January 1900 (has links)
Thesis (Ph.D.). / Written for the Dept. of Electrical and Computer Engineering. Title from title page of PDF (viewed 2009/06/08). Includes bibliographical references.
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FPAA realization of a controlled directional microphoneHart, Patrick Hammel. January 2009 (has links)
Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department of Electrical and Computer Engineering, 2009. / Includes bibliographical references.
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Hardware design and certification aspects of a field programmable gate array-based terrain database integrity monitor for a synthetic vision system /Kakkeroda, Anupriya. January 2004 (has links)
Thesis (M.S.)--Ohio University, August, 2004. / Includes bibliographical references (p. 135-139).
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