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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
61

Κάτω μεταλλάκτης στην μικροκυματική περιοχή 1-6 GHz με χρήση κατανεμημένου ενισχυτή

Λιώλης, Σπυρίδων 20 April 2011 (has links)
Το αντικείμενο της παρούσης διπλωματικής επικεντρώνεται στη σχεδίαση ανάπτυξη και μέτρηση κυκλώματος κάτω μεταλλάκτη (down converter) συχνότητας στην περιοχή 1 έως 6 GHz. Η αρχιτεκτονική περιλαμβάνει ενισχυτή χαμηλού θορύβου (LNA) κατανεμημένης τοπολογίας (distributed amplifier), μίκτη καθώς και ενισχυτές και φίλτρα στην ενδιάμεση συχνότητα. Ο σχεδιασμός συνοδεύεται από μετρήσεις όπου και διαπιστώνεται η σύγκλιση με τα αποτελέσματα εντατικών εξομοιώσεων. Κύρια εργαλεία του σχεδιασμού απετέλεσαν κυκλωματικοί και ηλεκτρομαγνητικοί εξομοιωτές. / The object of this thesis focuses on design development and measurement down converter circuit in the frequency range 1 to 6 GHz. The architecture includes low noise amplifier (LNA) Distributed topology (distributed amplifier), mixer and amplifiers and filters in intermediate frequency. The design is accompanied by measurements and found where the convergence of the results of intensive simulations. Main tools of design were kyklomatikoi and electromagnetic simulators.
62

Wide band, low-noise amplifiers for the mid-range SKA

Botes, Dewald Alewyn 03 1900 (has links)
Thesis (MEng)--Stellenbosch University, 2015. / ENGLISH ABSTRACT: This thesis presents the design, construction and measurement of two wide-band LNA’s for the SKA-Mid range (350-1200 MHz). The first wide-band LNA involves the investigation of classic low noise amplifier techniques, which includes basic noise theory, stability analysis, feedback design and the development of sophisticated matching techniques for ultra wide-band performance. Final measurements show a flat gain response equal to 19 dB, with a noise figure of 1.5 dB and an output return loss of 10 dB across the entire bandwidth. A multi-path cascading concept is introduced for the second low noise amplifier design, which aims to connect two single frequency amplifiers in parallel to operate from 500 to 700 MHz. The design process involves several optimization schemes to realise the matching networks for the cascaded topology and the noise performance of the device was confirmed by using multi-port noise theory. The prototype presents significant bandwidth improvements compared to a single frequency LNA design. Excellent agreement between the simulation and measurement were obtained with a flat gain response of 20 dB across a 2:1 bandwidth, with a low noise figure of 0.95 dB and an output return loss of 13 dB across the operation bandwidth of 400 to 800 MHz. / AFRIKAANSE OPSOMMING: Hierdie tesis behandel die ontwerp, konstruksie en meting van twee wyeband laeruis versterkers vir die SKA - Mid reeks (350–1200 MHz). Die eerste wyeband laeruis versterker, ondersoek klassieke laeruis versterker tegnieke wat insluit basiese ruisteorie, stabiliteit analise, terugvoerontwerp en die ontwikkeling van gevorderde aanpassingstegnieke vir ultra wyeband werkverrigting. Finale metings het ’n plat aanwins van 19 dB, met ’n ruisfiguur van 1.5 dB en ’n uittree-refleksie koëffisiënt van -10 dB oor die hele bandwydte vertoon. ’n Multi-pad konsep word bekend gestel vir die tweede laeruis versterker. Die ontwerp het twee enkel frekwensie laeruis versterkers in parallel verbind om vanaf 500 tot 700 MHz te werk. Die ontwerp proses bevat verskeie optimalisering skemas om die aanpassings netwerke vir die kaskade topologie te realiseer. Die ruissyfer van die versterker is bevestig deur die gebruik van multi-pad ruisteorie. Die prototipe het beduidende bandwydte verbeterings vertoon in vergelyking met ’n enkel frekwensie versterker ontwerp. ’n Uitstekende ooreenkoms tussen die simulasie en meting was verkry met ’n plat aanwins van 20 dB oor ’n 2:1 bandwydte, met ’n laeruisfiguur van 0.95 dB en ’n uittree-refleksie koëffisiënt van -13 dB oor die bandwydte van 400-800 MHz.
63

Projeto de um amplificador de baixo ruído em tecnologia CMOS 130nm para frequências de 50MHZ a 1GHz / A 50MHz-1GHz wideband low noise amplifier in 130nm CMOS technology

Pimentel, Henrique Luiz Andrade January 2012 (has links)
O presente trabalho tem por objetivo fornecer o embasamento teórico para o projeto de um amplificador de baixo ruído (LNA – Low Noise Amplifier) em tecnologia CMOS que opere em mais de uma faixa de frequência, de modo a permitir seu uso em receptores multibanda e de banda larga. A base teórica que este trabalho abrange desde a revisão bibliográfica do assunto em questão, passando pela análise dos modelos de transistores para alta-frequência, pelo estudo das especificações deste bloco e das métricas utilizadas em projetos de circuitos integrados de RF, bem como pela revisão de topologias clássicas existentes. Com os conhecimentos acima adquiridos, foi possível realizar o projeto de um LNA diferencial de banda larga utilizando tecnologia CMOS IBM 130nm, o qual pode ser aplicado ao padrão IEEE 802.22 para rádios cognitivos (CR). O projeto é baseado na técnica de cancelamento de ruído, sendo validado após apresentar efetiva redução de figura de ruído para banda de frequência desejada, com moderado consumo de potência e utilização moderada de área de silício, devido a solução sem o uso de indutores. O LNA banda larga opera em frequências de 50Mhz a 1GHz e apresenta uma figura de ruído abaixo de 4dB, em 90% da faixa, um ganho acima de 12dB, e perda de retorno na entrada e na saída maiores que 12dB. O IIP3 e a frequência de ocorrência de compressão a 1dB com a entrada em 580MHz estão acima de 0dBm e -10dBm respectivamente. Possui consumo de 46,5mWpara fonte de 1,5V e ocupa uma área ativa de apenas 0,28mm x 0,2mm. / This work presents the theoretical basis for the design of a low noise amplifier (LNA) in CMOS technology that operates in more than one frequency band, which enables its use in multi-band and wideband receivers. The theoretical basis that this work will address extends from the literature review on the subject, through the analysis of models of MOS transistors for high frequencies, study of specifications of this block and the metrics used in RF integrated circuit design, as well as the review of existing classical LNA topologies. Based on the knowledge acquired above, the design of a differential wideband LNA is developed using IBM 130nm RF CMOS process, which can be used in IEEE 802.22 Cognitive Radio (CR) applications. The design is based on the noise-canceling technique, with an indutctorless solution, showing that this technique effectively reduces the noise figure over the desired frequency range with moderate power consumption and a moderate utilization of silicon die area. The wideband LNA covers the frequency range from 50 MHz to 1 GHz, achieving a noise figure below 4dB in over 90% of the band of interest, a gain of 11dB to 12dB, and an input/output return loss higher than -12 dB. The input IIP3 and input P1dB at 580MHz are above 0dB and -10dB, respectively. It consumes 46.5mW from a 1.5V supply and occupies an active area of only 0.056mm2 (0.28mm x 0.2mm).
64

Especifica??es e concep??es de front-end UHF integrado e multipadr?o em tecnologia CMOS 130nm

Costa J?nior, Carlos Antonio Mendes da 10 December 2014 (has links)
Submitted by Automa??o e Estat?stica (sst@bczm.ufrn.br) on 2016-01-26T18:48:32Z No. of bitstreams: 1 CarlosAntonioMendesDaCostaJunior_DISSERT.pdf: 4736923 bytes, checksum: 5e2b53f643a134a6e9ec853d3d3ea862 (MD5) / Approved for entry into archive by Arlan Eloi Leite Silva (eloihistoriador@yahoo.com.br) on 2016-01-28T20:31:09Z (GMT) No. of bitstreams: 1 CarlosAntonioMendesDaCostaJunior_DISSERT.pdf: 4736923 bytes, checksum: 5e2b53f643a134a6e9ec853d3d3ea862 (MD5) / Made available in DSpace on 2016-01-28T20:31:09Z (GMT). No. of bitstreams: 1 CarlosAntonioMendesDaCostaJunior_DISSERT.pdf: 4736923 bytes, checksum: 5e2b53f643a134a6e9ec853d3d3ea862 (MD5) Previous issue date: 2014-12-10 / Conselho Nacional de Desenvolvimento Cient?fico e Tecnol?gico - CNPq / O Sistema Brasileiro de Coleta de Dados Ambientais (SBCDA) ? respons?vel pela coleta e transmiss?o de dados meteorol?gicos e ambientais, utilizados por dezenas de institui??es e organiza??es nacionais. O segmento espacial do sistema, composto pelos sat?lites de coleta de dados, ? uma pe?a fundamental para seu funcionamento. Para garantir a continuidade e qualidade desses servi?os, esfor?os s?o voltados para o desenvolvimento de alternativas para a constru??o de novos sat?lites. Visando reduzir o tamanho do atual transponder brasileiro, ? proposto neste trabalho a integra??o de uma interface de r?dio frequ?ncia (do ingl?s FrontEnd) a ser embarcado nos receptores da pr?xima gera??o dos sat?lites SBCDA. O circuito ? concebido respeitando os requisistos do padr?o de coleta de dados internacional, ARGOS, e do SBCDA. Este trabalho foca, portanto, na integra??o de um amplificador de baixo ru?do e dois misturadores na faixa UHF em tecnologia CMOS padr?o. As especifica??es de projeto s?o primeiramente descritas e ent?o as topologias dos circuitos s?o escolhidas. A concep??o dos circuitos ? analisada e os seus par?metros de projeto s?o derivados. Finalmente, seu layout ? concebido e os resultados finais s?o divulgados. O chip ser? fabricado utilizando a tecnologia CMOS padr?o de 130 nm da STmicroelectronics. / The Brazilian Environmental Data Collecting System (SBCDA) collects and broadcasts meteorological and environmental data, to be handled by dozens of institutions and organizations. The system space segment, composed by the data collecting satellites, plays an important role for the system operation. To ensure the continuity and quality of these services, efforts are being made to the development of new satellite architectures. Aiming a reduction of size and power consumption, the design of an integrated circuit containing a receiver front-end is proposed, to be embedded in the next SBCDA satellite generations. The circuit will also operate under the requirements of the international data collecting standard ARGOS. This work focuses on the design of an UHF low noise amplifier and mixers in a CMOS standard technology. The specifi- cations are firstly described and the circuit topologies presented. Then the circuit conception is discussed and the design variables derived. Finally, the layout is designed and the final results are commented. The chip will be fabricated in a 130 nm technology from ST Microelectronics.
65

Projeto de um amplificador de baixo ruído em tecnologia CMOS 130nm para frequências de 50MHZ a 1GHz / A 50MHz-1GHz wideband low noise amplifier in 130nm CMOS technology

Pimentel, Henrique Luiz Andrade January 2012 (has links)
O presente trabalho tem por objetivo fornecer o embasamento teórico para o projeto de um amplificador de baixo ruído (LNA – Low Noise Amplifier) em tecnologia CMOS que opere em mais de uma faixa de frequência, de modo a permitir seu uso em receptores multibanda e de banda larga. A base teórica que este trabalho abrange desde a revisão bibliográfica do assunto em questão, passando pela análise dos modelos de transistores para alta-frequência, pelo estudo das especificações deste bloco e das métricas utilizadas em projetos de circuitos integrados de RF, bem como pela revisão de topologias clássicas existentes. Com os conhecimentos acima adquiridos, foi possível realizar o projeto de um LNA diferencial de banda larga utilizando tecnologia CMOS IBM 130nm, o qual pode ser aplicado ao padrão IEEE 802.22 para rádios cognitivos (CR). O projeto é baseado na técnica de cancelamento de ruído, sendo validado após apresentar efetiva redução de figura de ruído para banda de frequência desejada, com moderado consumo de potência e utilização moderada de área de silício, devido a solução sem o uso de indutores. O LNA banda larga opera em frequências de 50Mhz a 1GHz e apresenta uma figura de ruído abaixo de 4dB, em 90% da faixa, um ganho acima de 12dB, e perda de retorno na entrada e na saída maiores que 12dB. O IIP3 e a frequência de ocorrência de compressão a 1dB com a entrada em 580MHz estão acima de 0dBm e -10dBm respectivamente. Possui consumo de 46,5mWpara fonte de 1,5V e ocupa uma área ativa de apenas 0,28mm x 0,2mm. / This work presents the theoretical basis for the design of a low noise amplifier (LNA) in CMOS technology that operates in more than one frequency band, which enables its use in multi-band and wideband receivers. The theoretical basis that this work will address extends from the literature review on the subject, through the analysis of models of MOS transistors for high frequencies, study of specifications of this block and the metrics used in RF integrated circuit design, as well as the review of existing classical LNA topologies. Based on the knowledge acquired above, the design of a differential wideband LNA is developed using IBM 130nm RF CMOS process, which can be used in IEEE 802.22 Cognitive Radio (CR) applications. The design is based on the noise-canceling technique, with an indutctorless solution, showing that this technique effectively reduces the noise figure over the desired frequency range with moderate power consumption and a moderate utilization of silicon die area. The wideband LNA covers the frequency range from 50 MHz to 1 GHz, achieving a noise figure below 4dB in over 90% of the band of interest, a gain of 11dB to 12dB, and an input/output return loss higher than -12 dB. The input IIP3 and input P1dB at 580MHz are above 0dB and -10dB, respectively. It consumes 46.5mW from a 1.5V supply and occupies an active area of only 0.056mm2 (0.28mm x 0.2mm).
66

Projeto de um amplificador de baixo ruído em tecnologia CMOS 130nm para frequências de 50MHZ a 1GHz / A 50MHz-1GHz wideband low noise amplifier in 130nm CMOS technology

Pimentel, Henrique Luiz Andrade January 2012 (has links)
O presente trabalho tem por objetivo fornecer o embasamento teórico para o projeto de um amplificador de baixo ruído (LNA – Low Noise Amplifier) em tecnologia CMOS que opere em mais de uma faixa de frequência, de modo a permitir seu uso em receptores multibanda e de banda larga. A base teórica que este trabalho abrange desde a revisão bibliográfica do assunto em questão, passando pela análise dos modelos de transistores para alta-frequência, pelo estudo das especificações deste bloco e das métricas utilizadas em projetos de circuitos integrados de RF, bem como pela revisão de topologias clássicas existentes. Com os conhecimentos acima adquiridos, foi possível realizar o projeto de um LNA diferencial de banda larga utilizando tecnologia CMOS IBM 130nm, o qual pode ser aplicado ao padrão IEEE 802.22 para rádios cognitivos (CR). O projeto é baseado na técnica de cancelamento de ruído, sendo validado após apresentar efetiva redução de figura de ruído para banda de frequência desejada, com moderado consumo de potência e utilização moderada de área de silício, devido a solução sem o uso de indutores. O LNA banda larga opera em frequências de 50Mhz a 1GHz e apresenta uma figura de ruído abaixo de 4dB, em 90% da faixa, um ganho acima de 12dB, e perda de retorno na entrada e na saída maiores que 12dB. O IIP3 e a frequência de ocorrência de compressão a 1dB com a entrada em 580MHz estão acima de 0dBm e -10dBm respectivamente. Possui consumo de 46,5mWpara fonte de 1,5V e ocupa uma área ativa de apenas 0,28mm x 0,2mm. / This work presents the theoretical basis for the design of a low noise amplifier (LNA) in CMOS technology that operates in more than one frequency band, which enables its use in multi-band and wideband receivers. The theoretical basis that this work will address extends from the literature review on the subject, through the analysis of models of MOS transistors for high frequencies, study of specifications of this block and the metrics used in RF integrated circuit design, as well as the review of existing classical LNA topologies. Based on the knowledge acquired above, the design of a differential wideband LNA is developed using IBM 130nm RF CMOS process, which can be used in IEEE 802.22 Cognitive Radio (CR) applications. The design is based on the noise-canceling technique, with an indutctorless solution, showing that this technique effectively reduces the noise figure over the desired frequency range with moderate power consumption and a moderate utilization of silicon die area. The wideband LNA covers the frequency range from 50 MHz to 1 GHz, achieving a noise figure below 4dB in over 90% of the band of interest, a gain of 11dB to 12dB, and an input/output return loss higher than -12 dB. The input IIP3 and input P1dB at 580MHz are above 0dB and -10dB, respectively. It consumes 46.5mW from a 1.5V supply and occupies an active area of only 0.056mm2 (0.28mm x 0.2mm).
67

CMOS design enhancement techniques for RF receivers : analysis, design and implementation of RF receivers with component enhancement and component reduction for improved sensitivity and reduced cost, using CMOS technology

Logan, Nandi January 2010 (has links)
Silicon CMOS Technology is now the preferred process for low power wireless communication devices, although currently much noisier and slower than comparable processes such as SiGe Bipolar and GaAs technologies. However, due to ever-reducing gate sizes and correspondingly higher speeds, higher Ft CMOS processes are increasingly competitive, especially in low power wireless systems such as Bluetooth, Wireless USB, Wimax, Zigbee and W-CDMA transceivers. With the current 32 nm gate sized devices, speeds of 100 GHz and beyond are well within the horizon for CMOS technology, but at a reduced operational voltage, even with thicker gate oxides as compensation. This thesis investigates newer techniques, both from a systems point of view and at a circuit level, to implement an efficient transceiver design that will produce a more sensitive receiver, overcoming the noise disadvantage of using CMOS Silicon. As a starting point, the overall components and available SoC were investigated, together with their architecture. Two novel techniques were developed during this investigation. The first was a high compression point LNA design giving a lower overall systems noise figure for the receiver. The second was an innovative means of matching circuits with low Q components, which enabled the use of smaller inductors and reduced the attenuation loss of the components, the resulting smaller circuit die size leading to smaller and lower cost commercial radio equipment. Both these techniques have had patents filed by the University. Finally, the overall design was laid out for fabrication, taking into account package constraints and bond-wire effects and other parasitic EMC effects.
68

Study of the organisation and the transcriptional activity of mouse major satellites / L’étude de l’organisation et l’activité transcriptionnelle des satellites majeurs de la souris

Kolar-Znika, Lorena 12 May 2015 (has links)
Dans les cellules de souris, l'hétérochromatine péricentromérique, caractérisée par les répétitions des satellites majeurs et une signature épigénétique spécifique, la triméthylation de l'histone H3 sur la lysine 9 (H3K9me3), est organisée en structures nucléaires particulières appelées chromocentres. Cette région est transcriptionnellement active, produisant des ARN non-codants. Pour caractériser le profil transcriptionnel des satellites majeurs, nous avons utilisé des oligonucléotides LNA séquence spécifiques, pour des expériences de northern blot. Nous avons mis en évidence un profil de transcription complexe, révélé avec les sondes conçues pour cibler les deux brins des répétitions des satellites majeurs. Ce profil est modulé en réponse au choc thermique, condition dans laquelle un court ARN transcrit par l'ARN polymérase III, est surexprimé. Cependant, des problèmes de spécificité inhérents à l'utilisation de ces sondes LNA, ne nous ont pas permis de confirmer que les transcrits détectés ont pour origine les satellites majeurs. La seconde partie de ce travail a consisté en l'étude de l'impact de la modification ciblée de H3K9me3 aux satellites majeurs par une protéine TALE fusionnée à l'histone déméthylase mJMJD2D. Nous avons montré que le signal H3K9me3 est aboli dans les cellules transfectées avec cette protéine TALE. La déméthylation provoque des changements morphologiques des chromocentres, tels que l'augmentation de la taille des foci de satellites majeurs, accompagnés par la diminution de leur nombre, suggérant la fusion de plusieurs chromocentres. / In mouse cells, pericentromeric heterochromatin, characterized by major satellite repeats and a specific epigenetic signature, the trimethylation of the histone H3 at lysine 9 (H3K9me3) is organised in particular nuclear structures called chromocenters. This region is actively transcribed, producing non-coding RNA. To investigate the transcriptional profile of major satellites, we made used of the sequence specific LNA modified oligonucleotides in northern blot experiments. We have shown that a complex transcriptional pattern is revealed with the probes designed to target both strands of the major satellite repeat. This pattern is modified in response to heat shock, in which we reveal that a short, RNA polymerase III-transcribed RNA is overexpressed. However, specificity problems encountered with the use of these LNA probes inabled us to confirm with certainty the major satellite origin of the detected transcripts. The second part of this work consisted in the studying of the impact of the targeted modification of the H3K9me3 at the major satellites by a TALE protein fused to a histone demethylase, mJMJD2D. We have shown that the H3K9me3 signal is abolished in the cells transfected with this TALE protein. The demethylation triggers morphological changes of the chromocenters such as the increase of the major satellite foci size, that are accompanied by the decrease in the foci number, suggesting the merging of several chromocenters.
69

Vstupní část přijímače pro pásmo L / L-band receiver front-end

Kolář, Jan January 2012 (has links)
This Master's Thesis deals with a design of L-band receiver front-end. In the concrete the receiver is designed for receiving signals of frequency band 1,3 GHz. All particular blocks from low noise amplifier to intermediate frequency amplifier and frequency doubler in LO input are described, designed and simulated in program Ansoft. The part of this Master's Thesis is aimed to construct a working front-end receiver and to measure its basic parameters.
70

Interference Cancellation in Wideband Receivers using Compressed Sensing

Peyyeti, Tejaswi C 01 January 2013 (has links) (PDF)
Previous approach for narrowband interference cancellation based on compressed sensing (CS) in wideband receivers uses orthogonal projections to project away from the interference. This is not effective in the presence of nonlinear LNA (low noise amplifier) and finite bit ADCs (analog-to-digital converters) due to the fact that the nonidealities present will result in irresolvable intermodulation components and corrupt the signal reconstruction. Cancelling out the interferer before reaching the LNA thus becomes very important. A CS measurement matrix with randomly placed zeros in the frequency domain helps in this regard by removing the effect of interference when the signal measurements are performed before the LNA. Using this idea, under much idealized hardware assumptions impressive performance is obtained. The use of binary sequences which makes the hardware implementation simplistic is investigated in this thesis. Searching sequences with many spectral nulls turns out to be nontrivial. A theoretical approach for estimating probability of nulls is provided to reduce significant computational effort in the search and is shown to be close to actual search iterations. The use of real binary sequences (generated using ideal switches) obtained through the search does not do better compared to the orthogonal projection method in the presence of nonlinear LNA.

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