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On general error cancellation based logic transformations: the theory and techniques. / 基於錯誤取消的邏輯轉換: 理論與技術 / CUHK electronic theses & dissertations collection / Ji yu cuo wu qu xiao de luo ji zhuan huan: li lun yu ji shuJanuary 2011 (has links)
Yang, Xiaoqing. / Thesis (Ph.D.)--Chinese University of Hong Kong, 2011. / Includes bibliographical references (leaves 113-120). / Electronic reproduction. Hong Kong : Chinese University of Hong Kong, [2012] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Abstract also in Chinese.
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Logic Synthesis with High Testability for Cellular ArraysSarabi, Andisheh 01 January 1994 (has links)
The new Field Programmable Gate Array (FPGA) technologies and their structures have opened up new approaches to logic design and synthesis. The main feature of an FPGA is an array of logic blocks surrounded by a programmable interconnection structure. Cellular FPGAs are a special class of FPGAs which are distinguished by their fine granularity and their emphasis on local cell interconnects. While these characteristics call for specialized synthesis tools, the availability of logic gates other than Boolean AND, OR and NOT in these architectures opens up new possibilities for synthesis. Among the possible realizations of Boolean functions, XOR logic is shown to be more compact than AND/OR and also highly testable. In this dissertation, the concept of structural regularity and the advantages of XOR logic are used to investigate various synthesis approaches to cellular FPGAs, which up to now have been mostly nonexistent. Universal XOR Canonical Forms, Two-level AND/XOR, restricted factorization, as well as various Directed Acyclic Graph structures are among the proposed approaches. In addition, a new comprehensive methodology for the investigation of all possible XOR canonical forms is introduced. Additionally, a new compact class of XOR-based Decision Diagrams for the representation of Boolean functions, called Kronecker Functional Decision Diagrams (KFDD), is presented. It is shown that for the standard, hard, benchmark examples, KFDDs are on average 35% more compact than Binary Decision Diagrams, with some reductions of up to 75% being observed.
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KL-cuts : a new approach for logic synthesis targeting multiple output blocks / KL-Cuts: uma nova abordagem para síntese lógica utilizando blocos com múltiplas saídasMartinello Junior, Osvaldo January 2010 (has links)
Esta dissertação introduz o conceito de cortes KL, o que permite controlar tanto o número K de entradas como o número L de saídas em uma região de um circuito. O projeto de um circuito digital pode ser dividido em duas fases: síntese lógica e síntese física. Dentro de síntese lógica, um dos principais passos é o mapeamento tecnológico. Tradicionalmente, o processo de mapeamento tecnológico somente lida com funções de saída única, para a construção de circuitos. O objetivo deste método é explorar o uso de blocos de múltiplas saídas no mapeamento tecnológico. Para prover escalabilidade, o conceito de fatoração de cortes é estendido para os cortes KL. Algoritmos para enumerar esses cortes e também para enumerar alguns subconjuntos de cortes com características específicas são apresentados e os resultados são mostrados. Como exemplos de aplicações práticas, diferentes algoritmos de cobertura são propostos. O algoritmo guloso é uma alternativa simples e produz bons resultados em área, mas é muito restritivo, pois não é factível em mapeamento orientado à atraso. Outro algoritmo de cobertura apresentado é uma extensão do algoritmo de fluxo de área e permite a utilização de cortes com várias saídas, mantendo possível a consideração de outros custos. Um algoritmo de correspondência Booleana que é capaz de lidar com blocos com múltiplas saídas também é descrito. Isso permite a utilização de uma biblioteca padrão com células com mais de uma saída no mapeamento tecnológico. Os resultados mostram a viabilidade e utilidade do método. / This thesis introduces the concept of KL-feasible cuts, which allows controlling both the number K of inputs and the number L of outputs in a circuit region. The design of a digital circuit can roughly be divided in two phases: logic synthesis and physical synthesis. Within logic synthesis, one of the main steps is the technology mapping. Traditionally, the technology mapping process only handles single output functions, in order to construct circuits. The objective of this method is to explore the use of multiple output blocks on technology mapping. To provide scalability, the concept of factor cuts is extended to KL-cuts. Algorithms for enumerating these cuts and also for enumerating some subsets of cuts with some special characteristics are presented and results are shown. As examples of practical applications, different covering algorithms are proposed. The greedy algorithm is a simple alternative and produces good results in area, but it is too restrictive, as it is not practical in timing oriented mapping. The other covering algorithm presented is an extension to the area flow algorithm and allows cuts with multiple outputs to be used while making possible the control of some other costs. A Boolean matching algorithm that is able to handle multiple output blocks is also described, which permits the use of a standard cell library with more than one output on technology mapping. The results show the viability and usefulness of the method.
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KL-cuts : a new approach for logic synthesis targeting multiple output blocks / KL-Cuts: uma nova abordagem para síntese lógica utilizando blocos com múltiplas saídasMartinello Junior, Osvaldo January 2010 (has links)
Esta dissertação introduz o conceito de cortes KL, o que permite controlar tanto o número K de entradas como o número L de saídas em uma região de um circuito. O projeto de um circuito digital pode ser dividido em duas fases: síntese lógica e síntese física. Dentro de síntese lógica, um dos principais passos é o mapeamento tecnológico. Tradicionalmente, o processo de mapeamento tecnológico somente lida com funções de saída única, para a construção de circuitos. O objetivo deste método é explorar o uso de blocos de múltiplas saídas no mapeamento tecnológico. Para prover escalabilidade, o conceito de fatoração de cortes é estendido para os cortes KL. Algoritmos para enumerar esses cortes e também para enumerar alguns subconjuntos de cortes com características específicas são apresentados e os resultados são mostrados. Como exemplos de aplicações práticas, diferentes algoritmos de cobertura são propostos. O algoritmo guloso é uma alternativa simples e produz bons resultados em área, mas é muito restritivo, pois não é factível em mapeamento orientado à atraso. Outro algoritmo de cobertura apresentado é uma extensão do algoritmo de fluxo de área e permite a utilização de cortes com várias saídas, mantendo possível a consideração de outros custos. Um algoritmo de correspondência Booleana que é capaz de lidar com blocos com múltiplas saídas também é descrito. Isso permite a utilização de uma biblioteca padrão com células com mais de uma saída no mapeamento tecnológico. Os resultados mostram a viabilidade e utilidade do método. / This thesis introduces the concept of KL-feasible cuts, which allows controlling both the number K of inputs and the number L of outputs in a circuit region. The design of a digital circuit can roughly be divided in two phases: logic synthesis and physical synthesis. Within logic synthesis, one of the main steps is the technology mapping. Traditionally, the technology mapping process only handles single output functions, in order to construct circuits. The objective of this method is to explore the use of multiple output blocks on technology mapping. To provide scalability, the concept of factor cuts is extended to KL-cuts. Algorithms for enumerating these cuts and also for enumerating some subsets of cuts with some special characteristics are presented and results are shown. As examples of practical applications, different covering algorithms are proposed. The greedy algorithm is a simple alternative and produces good results in area, but it is too restrictive, as it is not practical in timing oriented mapping. The other covering algorithm presented is an extension to the area flow algorithm and allows cuts with multiple outputs to be used while making possible the control of some other costs. A Boolean matching algorithm that is able to handle multiple output blocks is also described, which permits the use of a standard cell library with more than one output on technology mapping. The results show the viability and usefulness of the method.
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KL-cuts : a new approach for logic synthesis targeting multiple output blocks / KL-Cuts: uma nova abordagem para síntese lógica utilizando blocos com múltiplas saídasMartinello Junior, Osvaldo January 2010 (has links)
Esta dissertação introduz o conceito de cortes KL, o que permite controlar tanto o número K de entradas como o número L de saídas em uma região de um circuito. O projeto de um circuito digital pode ser dividido em duas fases: síntese lógica e síntese física. Dentro de síntese lógica, um dos principais passos é o mapeamento tecnológico. Tradicionalmente, o processo de mapeamento tecnológico somente lida com funções de saída única, para a construção de circuitos. O objetivo deste método é explorar o uso de blocos de múltiplas saídas no mapeamento tecnológico. Para prover escalabilidade, o conceito de fatoração de cortes é estendido para os cortes KL. Algoritmos para enumerar esses cortes e também para enumerar alguns subconjuntos de cortes com características específicas são apresentados e os resultados são mostrados. Como exemplos de aplicações práticas, diferentes algoritmos de cobertura são propostos. O algoritmo guloso é uma alternativa simples e produz bons resultados em área, mas é muito restritivo, pois não é factível em mapeamento orientado à atraso. Outro algoritmo de cobertura apresentado é uma extensão do algoritmo de fluxo de área e permite a utilização de cortes com várias saídas, mantendo possível a consideração de outros custos. Um algoritmo de correspondência Booleana que é capaz de lidar com blocos com múltiplas saídas também é descrito. Isso permite a utilização de uma biblioteca padrão com células com mais de uma saída no mapeamento tecnológico. Os resultados mostram a viabilidade e utilidade do método. / This thesis introduces the concept of KL-feasible cuts, which allows controlling both the number K of inputs and the number L of outputs in a circuit region. The design of a digital circuit can roughly be divided in two phases: logic synthesis and physical synthesis. Within logic synthesis, one of the main steps is the technology mapping. Traditionally, the technology mapping process only handles single output functions, in order to construct circuits. The objective of this method is to explore the use of multiple output blocks on technology mapping. To provide scalability, the concept of factor cuts is extended to KL-cuts. Algorithms for enumerating these cuts and also for enumerating some subsets of cuts with some special characteristics are presented and results are shown. As examples of practical applications, different covering algorithms are proposed. The greedy algorithm is a simple alternative and produces good results in area, but it is too restrictive, as it is not practical in timing oriented mapping. The other covering algorithm presented is an extension to the area flow algorithm and allows cuts with multiple outputs to be used while making possible the control of some other costs. A Boolean matching algorithm that is able to handle multiple output blocks is also described, which permits the use of a standard cell library with more than one output on technology mapping. The results show the viability and usefulness of the method.
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Full Custom VLSI Design of On-Line Stability CheckersLee, Chris Y 01 August 2011 (has links)
A stability checker is a clocked storage element, much like a flip-flop, which detects unstable and late signals in the pipeline of a digital system. The On-line stability checker operates concurrently with its associated circuit-under-test (CUT). This thesis describes the full custom very-large-scale integration (VLSI) design and testing process of On-Line Stability Checkers. The goals of this thesis are to construct and test Stability Checker designs, and to create a design template for future class projects in the EE 431 Computer-Aided Design (CAD) of VLSI Devices course at Cal Poly.
A method for concurrent fault testing called On-line Stability Checking was introduced by Franco and McCluskey [10] to detect reliability failures. Reliability failures initially manifest themselves as delay faults and transient glitching, which become progressively larger over time due to the wearout of conducting metal lines, eventually leading to functional faults. Stability checkers periodically detect reliability failures by monitoring CUT output signals for unstable and late input signals over a time period after the sampling clock edge.
The checkers are tested by applying variable delayed input test patterns to emulate reliability failures. Consequently, configurable delay chains were incorporated into the system to provide variable delays on the input signal lines. The system also includes external test signal ports.
Circuit and layout designs were implemented in the Electric VLSI Design tool [12] and simulated with LTSPICE [13]. Electric provides Design Rule Checking (DRC) and Layout-versus-Schematic (LVS) utilities for verification. Each module was designed in a bottom-up, hierarchical cell-based approach. Functional simulation, DRC and LVS checks were performed at every subsequent higher cell layer in the design hierarchy. The final chip layout was taped out for fabrication on November 29, 2010 and finished parts were received on July 7, 2011 after two manufacturing delays.
Finished packaged parts were successfully verified for functionality based on SPICE simulations. The stability checkers were tested for flip-flop operation, glitch detection and late signal arrival detection. Configurable delay chains were tested to determine delay resolution and uniformity. Actual delay resolution and range measurements show a 3 to 4 times difference compared to simulated values.
The Electric design template created from this project includes basic CMOS logic gates with uniform standard cell heights. The template contains a 40-pin pad ring cell along with the individual pad ring components. EE 431 students would be able to create custom chips that are compatible for fabrication via the MOSIS MEP service. In future work, the template design library can be expanded to include more logic gate variants of various inputs and drive strengths as well as more complex functional modules.
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Eine Systematisierung der Anwendungsmöglichkeiten und Potenziale von Big Data Analytics in InnovationsökosystemenKollwitz, Christoph 28 October 2024 (has links)
Im digitalen Zeitalter sind Innovationskraft und eine effiziente Adaption digitaler Technologien für Unternehmen entscheidend, um sich Wettbewerbsvorteile zu sichern. Der Einsatz digitaler Technologien für Innovation verspricht in diesem Zusammenhang nicht nur Produktivitätsvorteile, sondern steigert auch die Kundenzufriedenheit und macht Unternehmen agiler und widerstandsfähiger gegenüber Krisen. Eine zentrale Rolle spielt dabei die Anwendung von Big Data Analytics, jedoch bestehen derzeit erhebliche Forschungsbedarfe, um genauer zu ergründen, wie Big Data Analytics systematisch in Innovationsökosystemen genutzt werden können. Zum einen herrscht ein Mangel an Forschung über die strategischen Beiträge von Big Data Analytics für Innovation, insbesondere im Kontext des Zusammenwirkens verschiedener Akteure. Zum anderen liegt der Fokus bestehender Forschungsarbeiten oft nur auf Teilaspekten der Anwendung von Big Data Analytics und vernachlässigt umfassendere Betrachtungen, aus einer Ökosystem-Perspektive heraus. Für die Praxis liegen die primären Hürden dabei häufig nicht in der Technologie selbst, sondern in deren Adaption innerhalb der wertschöpfenden Strukturen von Unternehmen.
Diese Dissertation zielt darauf ab, diese Lücke zu schließen und untersucht die systematische Anwendung von Big Data Analytics in Innovationsökosystemen und nutzt dafür einen Design-Science-Research-Ansatz als übergeordnete Forschungsmethode. Im Dachbeitrag und in den Einzelbeiträgen des kumulativen Dissertationsvorhabens wird dafür gestaltungsorientierte Forschung angewendet, um theoretische Erkenntnisse direkt in die praktische Gestaltung und Entwicklung von Lösungen zu integrieren. Im Ergebnis liefert die Dissertation einen übergeordneten Ordnungsrahmen für die Anwendung von Big Data Analytics in Innovationsökosystemen, der die gesammelten Erkenntnisse aus dem Forschungsprojekt CODIFeY und den Einzelbeiträgen integriert. Damit trägt die Dissertation über den entwickelten Ordnungsrahmen und die IT-Artefakte der Einzelbeiträge dazu bei, ein besseres Verständnis für die strategische Nutzung digitaler Technologien zur Förderung von Innovation und Wettbewerbsvorteilen zu erreichen, was sowohl wissenschaftlich als auch praktisch einen Mehrwert bietet.:Danksagung i
Einzelbeiträge iii
Inhaltsverzeichnis iv
Abkürzungsverzeichnis x
Abbildungsverzeichnis xii
Tabellenverzeichnis xiv
Kurzzusammenfassung 1
Abstract 2
I. Dachbeitrag 3
1 Einleitung 3
1.1 Motivation 3
1.2 Problem- und Fragestellung 5
1.3 Zielstellung 8
1.4 Aufbau des Dachbeitrags 9
2 Forschungsansatz 11
2.1 Wissenschaftstheoretische Grundpositionierung 11
2.2 Forschungsmethode 12
2.2.1 Design Science Research als übergeordnetes Forschungsparadigma 12
2.2.2 Das Projekt Community-basierte Dienstleistungs-Innovation für e-Mobility 14
2.2.3 Aufbau des kumulativen Dissertationsvorhabens 17
3 Stand der Wissenschaft und Forschung 24
3.1 Big Data Analytics 24
3.2 Datengetriebene Innovation 25
3.3 Innovationsökosysteme aus der Perspektive der Service Dominant Logic 27
4 Gestaltung eines Ordnungsrahmens für die Anwendung von Big Data Analytics in Innovationsökosystemen 30
4.1 Das Modell eines Innovationsökosystems aus Sicht der Service Dominant Logic 30
4.2 Ableitung der Dimensionen des Ordnungsrahmens für die Anwendung von Big Data Analytics in Innovationsökosystemen 35
5 Eine Systematisierung von Anwendungsfällen von Big Data Analytics in Innovationsökosystemen 39
5.1 Big Data Analytics als Mittel für Innovation 39
5.2 Big Data Analytics als Ergebnis von Innovation 44
5.3 Demonstration & Evaluation des Ordnungsrahmens 50
6 Fazit 52
II. Research Papers of the Dissertation 55
Paper A – Capturing the Bigger Picture? Applying Text Analytics to Foster Open Innovation 55
A1 Introduction 57
A2 Background and Terminology 60
A2.1 Complexities of Sustainability-Oriented Innovation 60
A2.2 Open Innovation as an Instrument for Participation 62
A2.3 Sustainable-Oriented Innovation and Open Innovation 64
A2.4 Silent Stakeholders 67
A2.5 Research Focus: Text Analytics in Direct Search Methods for Sustainability-Oriented Innovation 69
A3 Action Research Study 72
A3.1 Description of the Action Research Cycle 72
A3.2 Diagnosing the Project Background 73
A3.3 Action Planning and Taking—Application of Text Analytics 77
A4 Results 82
A4.1 Findings from the Overall Discourse Analysis 82
A4.2 Findings from Zooming into Single Topics 84
A4.3 Applicability in the Innovation Process for the Label Development 85
A5 Discussion 87
A6 Implications and Conclusions 88
Paper B – What the Hack? – Towards a Taxonomy of Hackathons 92
B1 Introduction 93
B2 A Process-centric Perspective on Open Innovation and Hackathons 95
B3 Research Approach 97
B3.1 Taxonomy Development 97
B3.2 Literature Review 98
B4 A Taxonomy of Hackathons 101
B4.1 Overview of the Taxonomy 101
B4.2 Strategic Design Decisions 102
B4.3 Operational Design Decisions 104
B5 Discussion 107
B6 Conclusion 109
Paper C – Combining Open Innovation and Knowledge Management in Communities of Practice - An Analytics Driven Approach 110
C1 Introduction 111
C2 Foundations 113
C2.1 Knowledge Management and Innovation 113
C2.2 Communities of Practice 114
C2.3 Analytics domains 114
C3 Research Methodology 117
C4 Conceptual Framework for the Integration of Open Innovation and Knowledge Management 118
C4.1 Conceptual Data Model 119
C5 Implementation & Evaluation of a Pilot Project 122
C5.1 The Research Project CODIFeY 122
C5.2 Evaluation and Preliminary Findings 124
C6 Conclusions 126
Paper D – Entwicklung eines Analytics Framework für virtuelle Communities of Practice 127
D1 Einführung 128
D2 Grundlagen 130
D2.1 Communities of Practice 130
D2.2 Analytics 131
D2.3 Design eines Analytics Frameworks für Communities of Practice 132
D3 Demonstration und Evaluation im Projekt CODIFeY 136
D4 Fazit 138
Paper E – Teaching Data Driven Innovation – Facing a Challenge for Higher Education 139
E1 Introduction 140
E2 Foundations and Theoretical Underpinning 142
E2.1 Data Driven Innovation 142
E2.2 Teaching Data-Driven Innovation 142
E2.3 Pedagogical Approach 143
E3 Research Method 145
E3.1 General Morphological Analysis 145
E3.2 Data Collection and Empirical Analysis 146
E4 Design of the Morphological Box 148
E4.1 Teaching Method 148
E4.2 Course Setting 149
E4.3 Course Content 149
E4.4 Innovation Approach 150
E4.5 Morphological Box for Teaching Data Driven Innovation 151
E5 Teaching Cases 153
E5.1 Case A: Data Driven Value Generation for the Internet of Things 153
E5.2 Case B: Data Driven Innovation Project in the Field of E-mobility 154
E6 Conclusion 156
Paper F – Cross-Disciplinary Collaboration for Designing Data-Driven Products and Services 157
F1 Introduction 158
F2 Foundations and Theoretical Background 161
F2.1 Data Literacy as a Foundation for the Design of Data-Driven Product and Services 161
F2.2 Collaborative Processes and Knowledge Transfer 162
F2.3 Knowledge Boundaries 162
F2.4 Boundary Objects 163
F2.5 Boundary Objects for Collaboration Processes and Knowledge Integration 164
F3 Research Approach 166
F4 Design of the Data Vignette 169
F4.1 Thematic View 169
F4.2 Structural View 173
F5 Evaluation of the Artifact 178
F5.1 Artificial Evaluation Using the Guidelines of Modelling 178
F5.2 Application of the DV - A First Pilot 179
F6 Conclusion 182
Paper G – Towards the Development of a Typology of Big Data Analytics in Innovation Ecosystems 184
G1 Introduction 185
G2 Foundations 187
G2.1 The Role of Technology for Innovation Ecosystems 187
G2.2 Big Data Analytics in Innovation Ecosystems 188
G3 Research Approach 189
G4 Towards a Typology of Big Data Analytics in Innovation Ecosystems 190
G5 Further research 192
Paper H – Hackathons als Gestaltungswerkzeug für plattform-basierte digitale Ökosysteme 193
H1 Einleitung 194
H2 Grundlagen 196
H2.1 Plattform-basierte digitale Ökosysteme 196
H2.2 Hackathons als Gestaltungswerkzeug 197
H3 Forschungsmethode 199
H4 Hackathons für die Gestaltung plattform-basierter Ökosysteme 202
H4.1 Markt-orientierte Plattform-Hackathons 202
H4.2 Technologie-orientierte Plattform-Hackathons 204
H5 Fazit 206
Literaturverzeichnis xv
Anhang li
Anhang 1 li / In the digital age, the ability to innovate and the efficient adoption of digital technologies are crucial for companies to gain competitive advantages. The use of digital technologies for innovation promises not only productivity gains but also increases customer satisfaction and makes companies more agile and resilient to crises. The focus here is on the application of big data analytics, but there is currently still a considerable need for research to understand how big data analytics can be used systematically in innovation ecosystems. On the one hand, there is a lack of research on the strategic contributions of big data analytics to innovation, particularly in the context of the interaction of various actors. On the other hand, the focus of existing research often only addresses partial aspects of the application of big data analytics and neglects broader considerations from an ecosystem perspective. For practice, the primary hurdles often lie not in the technology itself but in its adaptation within the value-creating structures of companies.
This dissertation aims to close this gap and examines the systematic application of big data analytics in innovation ecosystems, using a design science research approach as the overarching research method. In the summary and in the individual papers of the cumulative dissertation project, design-oriented research is used to integrate theoretical insights directly into the practical design and development of solutions. As a result, the dissertation provides an overarching framework for the application of big data analytics in innovation ecosystems, integrating the insights gathered from the CODIFeY research project and the individual contributions. The dissertation on the developed framework and the IT artifacts of the individual contributions contributes to a better understanding of the strategic use of digital technologies to promote innovation and competitive advantages, which offers added value both scientifically and practically.:Danksagung i
Einzelbeiträge iii
Inhaltsverzeichnis iv
Abkürzungsverzeichnis x
Abbildungsverzeichnis xii
Tabellenverzeichnis xiv
Kurzzusammenfassung 1
Abstract 2
I. Dachbeitrag 3
1 Einleitung 3
1.1 Motivation 3
1.2 Problem- und Fragestellung 5
1.3 Zielstellung 8
1.4 Aufbau des Dachbeitrags 9
2 Forschungsansatz 11
2.1 Wissenschaftstheoretische Grundpositionierung 11
2.2 Forschungsmethode 12
2.2.1 Design Science Research als übergeordnetes Forschungsparadigma 12
2.2.2 Das Projekt Community-basierte Dienstleistungs-Innovation für e-Mobility 14
2.2.3 Aufbau des kumulativen Dissertationsvorhabens 17
3 Stand der Wissenschaft und Forschung 24
3.1 Big Data Analytics 24
3.2 Datengetriebene Innovation 25
3.3 Innovationsökosysteme aus der Perspektive der Service Dominant Logic 27
4 Gestaltung eines Ordnungsrahmens für die Anwendung von Big Data Analytics in Innovationsökosystemen 30
4.1 Das Modell eines Innovationsökosystems aus Sicht der Service Dominant Logic 30
4.2 Ableitung der Dimensionen des Ordnungsrahmens für die Anwendung von Big Data Analytics in Innovationsökosystemen 35
5 Eine Systematisierung von Anwendungsfällen von Big Data Analytics in Innovationsökosystemen 39
5.1 Big Data Analytics als Mittel für Innovation 39
5.2 Big Data Analytics als Ergebnis von Innovation 44
5.3 Demonstration & Evaluation des Ordnungsrahmens 50
6 Fazit 52
II. Research Papers of the Dissertation 55
Paper A – Capturing the Bigger Picture? Applying Text Analytics to Foster Open Innovation 55
A1 Introduction 57
A2 Background and Terminology 60
A2.1 Complexities of Sustainability-Oriented Innovation 60
A2.2 Open Innovation as an Instrument for Participation 62
A2.3 Sustainable-Oriented Innovation and Open Innovation 64
A2.4 Silent Stakeholders 67
A2.5 Research Focus: Text Analytics in Direct Search Methods for Sustainability-Oriented Innovation 69
A3 Action Research Study 72
A3.1 Description of the Action Research Cycle 72
A3.2 Diagnosing the Project Background 73
A3.3 Action Planning and Taking—Application of Text Analytics 77
A4 Results 82
A4.1 Findings from the Overall Discourse Analysis 82
A4.2 Findings from Zooming into Single Topics 84
A4.3 Applicability in the Innovation Process for the Label Development 85
A5 Discussion 87
A6 Implications and Conclusions 88
Paper B – What the Hack? – Towards a Taxonomy of Hackathons 92
B1 Introduction 93
B2 A Process-centric Perspective on Open Innovation and Hackathons 95
B3 Research Approach 97
B3.1 Taxonomy Development 97
B3.2 Literature Review 98
B4 A Taxonomy of Hackathons 101
B4.1 Overview of the Taxonomy 101
B4.2 Strategic Design Decisions 102
B4.3 Operational Design Decisions 104
B5 Discussion 107
B6 Conclusion 109
Paper C – Combining Open Innovation and Knowledge Management in Communities of Practice - An Analytics Driven Approach 110
C1 Introduction 111
C2 Foundations 113
C2.1 Knowledge Management and Innovation 113
C2.2 Communities of Practice 114
C2.3 Analytics domains 114
C3 Research Methodology 117
C4 Conceptual Framework for the Integration of Open Innovation and Knowledge Management 118
C4.1 Conceptual Data Model 119
C5 Implementation & Evaluation of a Pilot Project 122
C5.1 The Research Project CODIFeY 122
C5.2 Evaluation and Preliminary Findings 124
C6 Conclusions 126
Paper D – Entwicklung eines Analytics Framework für virtuelle Communities of Practice 127
D1 Einführung 128
D2 Grundlagen 130
D2.1 Communities of Practice 130
D2.2 Analytics 131
D2.3 Design eines Analytics Frameworks für Communities of Practice 132
D3 Demonstration und Evaluation im Projekt CODIFeY 136
D4 Fazit 138
Paper E – Teaching Data Driven Innovation – Facing a Challenge for Higher Education 139
E1 Introduction 140
E2 Foundations and Theoretical Underpinning 142
E2.1 Data Driven Innovation 142
E2.2 Teaching Data-Driven Innovation 142
E2.3 Pedagogical Approach 143
E3 Research Method 145
E3.1 General Morphological Analysis 145
E3.2 Data Collection and Empirical Analysis 146
E4 Design of the Morphological Box 148
E4.1 Teaching Method 148
E4.2 Course Setting 149
E4.3 Course Content 149
E4.4 Innovation Approach 150
E4.5 Morphological Box for Teaching Data Driven Innovation 151
E5 Teaching Cases 153
E5.1 Case A: Data Driven Value Generation for the Internet of Things 153
E5.2 Case B: Data Driven Innovation Project in the Field of E-mobility 154
E6 Conclusion 156
Paper F – Cross-Disciplinary Collaboration for Designing Data-Driven Products and Services 157
F1 Introduction 158
F2 Foundations and Theoretical Background 161
F2.1 Data Literacy as a Foundation for the Design of Data-Driven Product and Services 161
F2.2 Collaborative Processes and Knowledge Transfer 162
F2.3 Knowledge Boundaries 162
F2.4 Boundary Objects 163
F2.5 Boundary Objects for Collaboration Processes and Knowledge Integration 164
F3 Research Approach 166
F4 Design of the Data Vignette 169
F4.1 Thematic View 169
F4.2 Structural View 173
F5 Evaluation of the Artifact 178
F5.1 Artificial Evaluation Using the Guidelines of Modelling 178
F5.2 Application of the DV - A First Pilot 179
F6 Conclusion 182
Paper G – Towards the Development of a Typology of Big Data Analytics in Innovation Ecosystems 184
G1 Introduction 185
G2 Foundations 187
G2.1 The Role of Technology for Innovation Ecosystems 187
G2.2 Big Data Analytics in Innovation Ecosystems 188
G3 Research Approach 189
G4 Towards a Typology of Big Data Analytics in Innovation Ecosystems 190
G5 Further research 192
Paper H – Hackathons als Gestaltungswerkzeug für plattform-basierte digitale Ökosysteme 193
H1 Einleitung 194
H2 Grundlagen 196
H2.1 Plattform-basierte digitale Ökosysteme 196
H2.2 Hackathons als Gestaltungswerkzeug 197
H3 Forschungsmethode 199
H4 Hackathons für die Gestaltung plattform-basierter Ökosysteme 202
H4.1 Markt-orientierte Plattform-Hackathons 202
H4.2 Technologie-orientierte Plattform-Hackathons 204
H5 Fazit 206
Literaturverzeichnis xv
Anhang li
Anhang 1 li
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