Title from PDF of title page. / Document formatted into pages; contains 71 pages. / Thesis (M.S.E.E.)--University of South Florida, 2003. / Includes bibliographical references. / Text (Electronic thesis) in PDF format. / ABSTRACT: This thesis concentrates on RF/microwave characterization and modeling of planar spiral inductors and pad stack parasitics. The inductors varied in size from 1.9 to 15.3 nH. Several approaches were examined for modeling the planar spiral inductors. The approach developed herein is built around an existing composite model (available in commercial computer-aided design software), with added series and shunt impedances at both the input and output of the existing composite model. Artificial neural network (ANN) software was used to determine the correction impedance values. Another approach investigated was to model the S-parameters of the inductor using a space- mapping model of the input parameters for the existing model. The correction impedance modeling approach was theoretically sound but the level of accuracy need for the ANN model was not obtainable. The space mapping approach had merit but a substrate and parameter scalable model could not be achieved. / ABSTRACT: A pad stack is a section of microstrip line that a surface mounted element is affixed to; these pad stacks are standardized for specific element sizes, so for example any 0805 (80 mils by 50 mils) element may have the same pad stack whether it is a capacitor, inductor or resistor. The pad stack models were necessary because a capacitor model originally developed at the University of South Florida did not include parasitic effects for different input connections. The pad stack parasitic models can be broken down into three types: dual-input, tri-input, and quad-input. Each of the dual- and tri- input models have input angles of either 0 degrees, 45 degrees, or 90 degrees. The models were developed using a combination of microstrip and lumped elements. / System requirements: World Wide Web browser and PDF reader. / Mode of access: World Wide Web.

Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009. / Committee Chair: Farrokh Ayazi; Committee Member: James D. Meindl; Committee Member: Joy Laskar; Committee Member: Mark G. Allen; Committee Member: Paul A. Kohl. Part of the SMARTech Electronic Thesis and Dissertation Collection.

One of the chief components in a RF/microwave circuit is the inductor. The performance of the inductor affects the performance of widely used circuits such as the voltage controlled oscillator (VCO), low noise amplifier, and filter in the RF front end. It is very important to design inductors for accurate values of inductances and sufficiently high quality factors for these microwave applications. A key challenge in achieving high unloaded Q for an inductor in a thin substrate is the ground separation. This thesis aims at addressing this issue and achieving high unloaded Q's in the range 150 - 200 for a ground separation of about 100 - 140 microns in the frequency range of 1 - 15 GHz. One port and inductors will be designed using Electromagnetic field solvers. Various topologies will be explored for 2D and 3D inductors with the aim of achieving the desired inductance density and Q parameters in a minimum area possible. In order to address the issue of ground separation, design modifications will include the use of patterned grounds to take advantage of the reduced parasitic capacitive coupling which enables a high Q factor. The objective of the thesis also includes demonstration of the usefulness of these high quality inductors in RF front ends. To this effect, proof of concept designs of LC band pass filters will be presented. To enable this design, capacitors will also be designed. An extensive library of the designed inductors will be presented as a part of the thesis. The designed components will be fabricated at the Packaging Research Center (PRC), Georgia Tech using organic substrate compatible processes. High frequency measurements will be made with the Vector Network Analyzer (VNA) along with suitable de - embedding to demonstrate the correlation between designed and fabricated results. Following this, circuit models will be built for the characterized inductors.

This dissertation reports a metal-transfer-molding (MTM) technique for simultaneous implementation of air-lifted RF passive components, as well as coplanar waveguide (CPW) structures, in a high performance and potentially cost-effective fashion. A metal transfer mechanism is introduced into the conventional micro-molding process to realize polymer-core RF passive components and integration. A system-on-package (SOP) integration scheme of front-end RF components can be realized by this process. Several air-lifted RF components based on MTM technology have been presented with excellent performance. As an integration application of the MTM technology, a novel wireless passive airflow sensor based on the RF evanescent-mode cavity resonators has been also presented. The sensor makes use of RF technology to measure wind velocity through changes in the resonant frequency with applied airflow. Compared with reported wireless sensors based on conventional RF cavity resonator, this design has advantages such as compact size and greatly improved sensitivity. Wireless interrogating has also been demonstrated for the passive sensor. Overall, the RF components developed in this thesis illustrate the great potential of MTM technology in both wireless communication and sensor areas.

Driven by ever growing demands of miniaturization, increased functionality, high performance and low cost for microelectronic products and packaging, embedded passives will be one of the key emerging techniques for realizing the system integration which offer various advantages over traditional discrete components. Novel materials for embedded capacitor applications are in great demand, for which a high dielectric constant (k), low dielectric loss and process compatibility with printed circuit boards are the most important prerequisites. To date, no available material satisfies all these prerequisites and research is needed to develop materials for embedded capacitor applications. Conductive filler/polymer composites are likely candidate material because they show a dramatic increase in their dielectric constant close to the percolation threshold. One of the major hurdles for this type of high-k composites is the high dielectric loss inherent in these systems. In this research, material and process innovations were explored to design and develop conductive filler/polymer nanocomposites based on nanoparticles with controlled parameters to fulfill the balance between sufficiently high-k and low dielectric loss, which satisfied the requirements for embedded decoupling capacitor applications. This work involved the synthesis of the metal nanoparticles with different parameters including size, size distribution, aggregation and surface properties, and an investigation on how these varied parameters impact the dielectric properties of the high-k nanocomposites incorporated with these metal nanoparticles. The dielectric behaviors of the nanocomposites were studied systematically over a range of frequencies to determine the dependence of dielectric constant, dielectric loss tangent and dielectric strength on these parameters.

No description available.

With the advent of wide bandgap (WBG) semiconductor devices, the electromagnetic interference (EMI) emissions are more pronounced due to high slew rates in the form of high dv/dt and high di/dt at higher switching frequencies compared to the traditional silicon technology. To comply with the stringent conducted emission requirements, EMI filters are adopted to attenuate the high frequency common mode (CM) and differential mode (DM) noise through the propagation path. However, self and mutual parasitic components are known to degrade the EMI filter performance. While parasitic cancellation techniques have been discussed at length in prior literature, most of them have focused mainly on single phase applications. As such this work focuses on extending the preexisting concepts to three-phase systems. Novel component placement, winding strategy as well as shielding and grounding techniques were developed to desensitize the influence of the parasitic effects on a three-phase multi-stage filter. The effectiveness of the three-phase filter structure employing the proposed methodologies has been validated via noise measurements at the line impedance stabilization network (LISN) in a 15kW rated motor drive system. Consequently, general design guidelines have been formulated for filter topologies with different inductor and capacitor form-factors. / Master of Science / The adoption of wide bandgap (WBG) semiconductor devices, such as Silicon Carbide (SiC) or Gallium Nitride (GaN) transistors, improves the power density with higher slew rates and switching frequencies compared to the traditional Silicon technology. However, the high switching speeds and high frequencies have generated higher electromagnetic interference (EMI) noise in the surroundings. To comply with the conducted emission requirements at the grid terminal, EMI filter is mandatory to attenuate the high frequency EMI noise that flows into grid. However, near field and the effect of parasitic components are known to degrade the filter performance at the higher end of frequency spectrum where the limit lines are typically stringent. While parasitic cancellation techniques have been discussed at length in prior literature, most of them has focused mainly on single phase applications. Therefore, this thesis aims to extend the pre-existing concepts to compensate the mutual and self-parasitic coupling components in a three-phase multi-stage filter. In this regard, novel component placement, winding strategy as well as shielding and grounding techniques were developed to compensate for the parasitic effects in a three- phase multi-stage filter. The effectiveness of the three-phase filter structure employing the proposed methodologies has been validated in a 15kW rated motor drive system. Consequently, general design guidelines have been formulated for filter design with minimal parasitic effects.

Aujourdhui, les énergies renouvelables deviennent progressivement des énergies à part entière qui rivalisent avec des énergies fossiles du point de vue coût et performance de production. Cependant, souvent leurs systèmes de conversion de lénergie en électricité souffre dun manque doptimisation qui en font encore des systèmes trop chers et présentant des déficiences importantes en rendement et en fiabilité. Pour cela, bien quil existe de plus en plus de travaux de recherches prouvant la viabilité de ce type de sources comme par exemple, lénergie photovoltaïque (PV) ou lénergie éolienne, beaucoup de réticentes existent pour installer ces systèmes à grande échelle autant en production de masse que chez des particuliers. A côté des autres laboratoires français, le LAAS-CNRS a choisi dapporter sa contribution sur la partie «Système» de la chaîne de conversion. En effet, du fait de lexistence de problèmes de non-optimisation électrique des systèmes et du manque déquipes de recherche sintéressant à ces axes, les points à résoudre se situaient alors autant sur la partie conversion électrique que thermique du générateur PV. Les premiers travaux entrepris se sont donc focalisés sur loptimisation de la partie conversion électrique. Pour cela, en sappuyant sur la création, le développement et lévolution constante du site de démonstration de 1kW crête PV entièrement instrumenté au sein même du LAAS, différentes architectures de conversion électriques dédiées au PV, ont été développées, notamment en collaboration avec lUniversité Rovira i Virgili de Tarragone (URV) et lUniversité Polytechnique Catalane de Barcelone (UPC). Très rapidement, nous nous sommes aperçus que, même si les systèmes PV faisaient des progrès considérables, ils ne pourraient à eux seuls représenter une source dénergie fiable. En effet, les variations de production étant fortement couplés aux données météorologiques, la production ne pouvait pas forcément être assurée lorsque lutilisation se n faisait sentir. Nous avons donc pensé à coupler les systèmes PV à dautres sources dénergie ainsi à travers des moyens de stockage. La maturité des études sur le photovoltaïque montre, quant à elle, de nouveaux débouchés, notamment sur les systèmes embarqués et les microsystèmes de très faibles puissances. Nous avons donc développé un nouvel axe de recherche depuis 2000 au sein du LAAS-CNRS sur les micro-sources et micro-convertisseurs intégrés dédiés aux microsystèmes. En effet, aujourdhui, les études menées sur loptimisation de convertisseurs statiques dénergie peuvent se généraliser à un certain nombre dapplications vis à vis de leur alimentation. Les objectifs sont de minimiser la taille et le volume tout en limitant les coûts de développement des nouveaux produits et en réduisant notamment les phases de prototypage réel. En effet, quel que soit le type dapplication visée (militaire, spatial, télécommunications, etc&), les nouvelles alimentations doivent être compactes, semi-intégrées ou bien, dans un futur proche, totalement intégrées. Pour cela, elles doivent être modélisables avec une grande précision, en vue doptimiser, dès leur conception, les contraintes de coût, de montée en fréquence et de puissance massique. En résumé, le but, dans les années futures, est datteindre de forts rendements de conversion sur les nouvelles alimentations devant avoir des tailles compatibles avec leurs applications, dans la droite ligne des travaux accomplis.

This dissertation reports, for the first time, on the design and implementation of tunable micromachined bandpass filters in the ultra high frequency (UHF) range that are fully integrated on CMOS-grade (resistivity=10-20 ohm.cm) silicon. Filters, which are designed in the Elliptic and coupled-resonator configuration, are electrostatically tuned using tunable microelectromechanical (MEM) capacitors with laterally movable interdigitated fingers. Tunable filters and high-quality factor (Q) integrated passives are made in silver (Ag), which has the highest conductivity of all materials in nature, to reduce the ohmic loss. The loss of the silicon substrate is eliminated by using micromachining techniques. The combination of the highest-conductivity metal and a low-loss substrate significantly improves the performance of lumped components at radio frequencies (RF), resulting in an insertion loss of 6 dB for a tunable lumped bandpass filter at 1075 MHz with a 3 dB-bandwidth of 63 MHz and tuning range of 123 MHz. The bandpass filters are encapsulated at the wafer level using a low-temperature, thermally released, polymer packaging process. This thesis details the design, fabrication, and measurement results of the filters and provides strategies to improve their performance. The performance of filter components, including the tunable capacitors and inductors, is characterized and compared to the state-of-the-art micromachined passive components. The silver inductors reported in this thesis exhibit the record high Q, and the silver bandpass filters show the minimum insertion loss that has been achieved on a CMOS-grade silicon substrate, to the best of our knowledge. Alternatively, tunable capacitors can be made in the bulk of silicon using a modified version of the high-aspect-ratio polysilicon and single crystal silicon (HARPSS) fabrication technique to obtain a larger capacitance density at the expense of a higher conductive loss. Using this process, a 15 pF two-port tunable capacitor is fabricated and tuned by 240% with the application of 3.5 V to the isolated actuator. Silver inductors can be post integrated with HARPSS tunable capacitors to obtain tunable filters in the very high frequency (VHF) range. The reported bandpass filters can be monolithically integrated with CMOS and have the potential to replace several transmit and receive acoustic filters currently used in cellular phones.

L’utilisation des composants passifs a connu une importante croissance ces dernières décennies notamment dans le domaine de la téléphonie mobile, de l’électronique embarquée. Les travaux présentés dans cette thèse s’inscrivent dans un cadre de projet entre les laboratoires LT2C de l’UJM et Ampère de l’INSA de LYON. L’objectif visé par cette thèse est la modélisation des micro-transformateurs de signaux utilisés pour isoler les parties puissance (Driver IC) et commande (JFET ou MOSFET). Les points abordés dans cette thèse sont le choix des structures de transformateurs qui répondent aux exigences du projet, le développement d’un modèle de transformateur qui prend en compte notamment les pertes et l’évolution de la perméabilité du matériau magnétique et les différents couplages capacitifs. Des simulations à l’aide de HFSS ont été réalisées afin de réaliser le design des structures retenues et valider le modèle développé. Des étapes de fabrications compatibles avec celle de la microélectronique ont été utilisées pour fabriquer des prototypes à une couche et à deux couches de matériau magnétique avec différentes configurations. Une caractérisation haute fréquence (2MHz-200MHz) à l’aide de l’analyseur vectoriel de réseaux a été réalisée et enfin une étude comparative entre les résultats de simulation et les résultats de mesure fait l’objet d’une présentation / The use of passive components has known a significant increasing in the recent decades particularly in the area of mobile telephony, portable or embarked systems. The work presented in this thesis is a part of a project between the two laboratories: LT2C of UJM and AMPERE of INSA of Lyon. The purpose of this thesis is to find a model for signal micro-transformers used to isolate the power part (Driver IC) from the control part of the project (JFET or MOSFET). The essential parts of this thesis concern the choice of transformer structures that deal with the requirements of the project, the development of a transformer model that takes into account the losses and the permeability evolution of the magnetic material versus frequency and the different capacitive couplings. Numerous simulations using HFSS were performed in order to design the chosen structures and to validate the developed transformer model. Different steps compatible with the microelectronics manufacturing have been used to manufacture prototypes with a single magnetic layer and two magnetic layers for the different configurations. High frequency characterization (2MHz-200MHz) using the vector network analyzer was performed and finally a comparative study between the results of simulation and measurements has been the subject of a presentation