Power is one of the today’s major constraints for both hardware and software design. Thus the need to understand the statistics and distribution of power consumption from a hardware and software perspective is high. Power models satisfy this requirement to a certain extent, by estimating the power consumption for a subset of applications, or by providing a detailed power consumption distribution of a system. Till date, many power models have been proposed for the desktop and mobile platforms. However, most of these models were created based on power measurements performed on the entire system when different microbenchmarks stressing different blocks of the system were run. Then the measured power and the profiled information of the subsystem stressing benchmarks were used to create a regression analysis based model. Here, the power/energy prediction accuracy of the models created in this way, depend on both the method and accuracy of the power measurements and the type of regression used in generating the model. This work tries to eliminate the dependency of the accuracy of the power models on the type of regression analysis used, by performing power measurements at a subsystem granularity. When the power measurement of a single subsystem is obtained while stressing it, one can know the exact power it is consuming, instead of obtaining the power consumption of the entire system - without knowing the power consumption of the subsystem of interest - and depending on the regression analysis to provide the answer. Here we propose a generic method that can be used to create power models of individual subsystems of mobile platforms, and validate the method by presenting an empirical power model of the OMAP4460 based Pandaboard-ES, created using the proposed method. The created model has an average percentage of energy prediction error of just around -2.7% for the entire Pandaboard-ES system.

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Enhancement of QoS in PS network as 5G communication network is non trivial endeavour which faces a host of new challenges beyond 3G and 4G communication networks. The number of nodes, the homogeneity of the access technologies, the conflicting network management objectives, resource usage minimization, and the division between limited physical resources and elastic virtual resources is driving a complete change in the vision and methodologies for efficient management of the available network resources. QoS is the measure of the reliability and performance of the networks' nodes and links, particularly as perceived by the end users of the services and application that are transported via PS network. Furthermore, QoS is a composite metric as it based on a number of multiple factors, which indicate the E2E characteristics and performance of the network condition, applications and services. Hence, reductions or improvements in the QoS level can brought about through a number of combined factors. This thesis tries to introduce a vision of Quality of Service (QoS) enhancement and management based on the 5th generation network requirements and solutions by: Firstly: Proposing a traffic flow management policy, which allocates and organises Machine Type Communication (MTC) traffic flow's network resources sharing within Evolved Packet System (EPS), with an access element as a Wireless Sensor Network (WSN) gateway for providing an overlaying access channel between the Machine Type Devices (MTDs) and EPS. This proposal addresses the effect and interaction in the heterogeneity of applications, services and terminal devices and the related QoS issues among them. The introduced work in this proposal overcomes the problems of network resource starvation by preventing deterioration of network performance. The scheme is validated through simulation, which indicates the proposed traffic flow management policy outperforms the current traffic management policy. Specifically, simulation results show that the proposed model achieves an enhancement in QoS performance for the MTC traffic flows, including a decrease of 99.45% in Packet Loss Rate (PLR), a decrease of 99.89% in packet End to End (E2E) delay, a decrease of 99.21% in Packet Delay Variation (PDV). Furthermore, it retains the perceived Quality of Experience (QoE) of the real time application users within high satisfaction levels, such as the Voice over Long Term Evolution (VoLTE) service possessing a Mean Opinion Score (MOS)of 4.349 and enhancing the QoS of a video conference service within the standardised values of a 3GPP body, with a decrease of 85.28% in PLR, a decrease of 85% in packet E2E delay and a decrease of 88.5% in PDV. Secondly: Proposing an approach for allocating existing 4G installed network radio access nodes to multiple Base Band Unit (BBU) pools, which is proposed to deploy 5G Cloud-Radio Access Network (C-RAN) and improve the offered Network QoS (NQoS). The proposed approach involves performing radio access nodes clustering based on the Particle Swarm Optimization (PSO) algorithm, model selection Bayesian Information Criterion (BIC), Measure of spread technique and Voronoi tessellation. The proposed scheme is used to consider a Dynamic C-RAN (DC-RAN) operation, that adaptively adjusts the main Radio Remote Head (RRH) coverage range according to the traffic load requirement as well as considering energy saving. The numerical results of the approach show that the optimized partition of the proposed network model is 41 BBU pools, with an average density of RRHs per pool area, which matches the primary average density of the radio access nodes per network area. Thirdly: Developing mathematical framework that investigates the Power Consumption (PC) profile for the interaction of Internet of Thing (IoT) Application QoS (AQoS) with NQoS in wireless Software Defined Network (SDN) as SDN for WIreless SEnsor network (SDN-WISE). This profile model offers flexibility for managing the structure of the Machine to Machine (M2M) system in IoT. It enables controlling the provided NQoS, precisely the achieved PHY layer transmission link throughput, combined with the AQoS, represented by IoT data stream payload size. The investigation is composed of two essential SDN traffic parts, they are control plane signalling and data plane traffic PCs and their relevance with QoS. The results show that 98% PC in data plane companion with a control plane PC of 2% in overall of the proposed system power, these figures were achieved with control plane signalling Transmission Time Interval (TTI) of 5 sec and a maximum data plane payload size of 92 Bytes as a worst case scenario.

abstract: Heterogeneous multiprocessor systems-on-chip (MPSoCs) powering mobile platforms integrate multiple asymmetric CPU cores, a GPU, and many specialized processors. When the MPSoC operates close to its peak performance, power dissipation easily increases the temperature, hence adversely impacts reliability. Since using a fan is not a viable solution for hand-held devices, there is a strong need for dynamic thermal and power management (DTPM) algorithms that can regulate temperature with minimal performance impact. This abstract presents a DTPM algorithm based on a practical temperature prediction methodology using system identification. The DTPM algorithm dynamically computes a power budget using the predicted temperature, and controls the types and number of active processors as well as their frequencies. Experiments on an octa-core big.LITTLE processor and common Android apps demonstrate that the proposed technique predicts temperature within 3% accuracy, while the DTPM algorithm provides around 6x reduction in temperature variance, and as large as 16% reduction in total platform power compared to using a fan. / Dissertation/Thesis / Masters Thesis Electrical Engineering 2015

Submitted by Fabio Sobreira Campos da Costa (fabio.sobreira@ufpe.br) on 2017-07-11T13:14:54Z No. of bitstreams: 2 license_rdf: 811 bytes, checksum: e39d27027a6cc9cb039ad269a5db8e34 (MD5) [UFPE-PPGEE] MSc_Emiliano.pdf: 3950976 bytes, checksum: 20ac0d1d3243534f93d5ec1a48edbdd9 (MD5) / Made available in DSpace on 2017-07-11T13:14:54Z (GMT). No. of bitstreams: 2 license_rdf: 811 bytes, checksum: e39d27027a6cc9cb039ad269a5db8e34 (MD5) [UFPE-PPGEE] MSc_Emiliano.pdf: 3950976 bytes, checksum: 20ac0d1d3243534f93d5ec1a48edbdd9 (MD5) Previous issue date: 2016-03-04 / Esta dissertação de mestrado investiga o consumo e a modelagem de energia para smartphones que usam o sistema operacional Android. A principal reclamação dos usuários e desafio aos fabricantes é a limitada duração da carga da bateria desses dispositivos. Para melhor entender o problema, esta dissertação faz ampla revisão da literatura visando identificar os principais componentes responsáveis pelo alto consumo de energia, os modelos de consumo de energia empregados e as estratégias de otimização propostas e utilizadas. Foi construída uma ferramenta em software e levado a cabo um conjunto de experimentos para medir o consumo de energia dos principais componentes. A dissertação apresenta um novo modelo de consumo de energia desenvolvido com técnicas de regressão estatísticas para descrever o padrão de consumo dos componentes. O modelo produzido foi comparado a outros encontrados na revisão da literatura por meio de simulações de consumo com base em dados coletados. Por fim, os resultados foram analisados e as conclusões apresentadas. / This M.Sc. dissertation investigates the power consumption and modeling for Android smartphones. The most common issue reported by users and a constant challenge to manufacurers is how to handle the limited duration of the battery charge for those devices. To better understand such a problem, this dissertations presents an extensive review of the literature to identify the key components that drains most of the power and which power consumption models and optimization strategies are currently being used to handle such a problem. That information was used to develop a software tool and a set of experiments to measure the energy consumption of those key components. A new power consumption model is proposed here based on statistical regression to describe those key components. The model presented was compared with those found in the technical literature using simulations based on the data collected. Finally, the results obtained are analyzed and conclusions drawn.

Continuous transportation demand growth in recent years has led to many traffic issues in urban areas. Among the most challenging ones are traffic congestion and the associated vehicular emissions. Efficient design of traffic signal control systems can be a promising approach to address these problems. This research develops a real-time signal control system, which optimizes signal timings at an under-saturated isolated intersection by minimizing total vehicular emissions. A combination of previously introduced analytical models based on traffic flow theory has been used. These models are able to estimate time spent per driving mode (i.e., time spent accelerating, decelerating, cruising, and idling) as a function of demand, vehicle arrival times, saturation flow, and signal control parameters. Information on vehicle activity is used along with the Vehicle Specific Power (VSP) model, which estimates emission rates per time spent in each operating mode to obtain total emissions per cycle. For the evaluation of the proposed method, data from two real-world intersections of Mesogion and Katechaki Avenues located in Athens, Greece and University and San Pablo Avenues, in Berkeley, CA has been used. The evaluation has been performed through both deterministic (i.e. under the assumption of perfect information for all inputs) and stochastic (i.e. without having perfect information for some inputs) arrival tests. The results of evaluation tests have shown that the proposed emission-based signal control system reduces emissions compared to traditional vehicle-based signal control system in most cases.

Current mobile network architecture is facing a big challenge as the traffic demands have been increasing dramatically these years. Explosive mobile data demands are driving a significant growth in energy consumption in mobile networks, as well as the cost and carbon footprints [1]. In 2010, China Mobile Research Institute proposed Cloud Radio Access Network (C-RAN) [2], which has been regarded as one of the most promising architecture to solve the challenge of operators. In C-RAN, the baseband units (BBU) are decoupled from the remote radio units (RRH) and centralized in one or more locations. The feasibility of combination of implementing the very tight radio coordination schemes and sharing baseband processing and cooling system resources proves to be the two main advantages of C-RAN compared to traditional RAN. More importantly, mobile operators can quickly deploy RRHs to expand and make upgrades to their networks. Therefore, the C-RAN has been advocated by both operators and equipment vendors as a means to achieve the significant performance gains required for 5G [3]. However, one of the biggest barriers has shown up in the deployment of C-RAN as the novel architecture imposes very high capacity requirement on the transport network between the RRHs and BBUs, which is been called fronthaul network. With the implementation of 5G wireless system using advanced multi-antenna transmission (MIMO), the capacity requirement would go further up, as well as the power consumption. One solution has been proposed to solve the problem is to have the baseband functions divided, partially staying with RRHs and other functions would be centralized in BBU pool. Different splitting solutions has been proposed in [4] [5] and [6]. In this thesis work, we choose four different splitting solutions to build four CRAN architecture models. Under one specific case scenario with the fixed number of LTE base stations, we calculate the transport capacity requirement for fronthaul and adopt three different fronthaul technology. The power consumption is calculated by adding up the power utilized by RRHs, fronthaul network and baseband processing. By comparing the numerical results, split 1 and 2 shows the best results while split 2 is more practical for dense cell area, since split 1 requires large fronthaul capacity. The fronthaul transport technology can be decided according to different density of base stations. TWDM-PON shows better energy performance as fronthaul network when the capacity requirement is high, compared to EPON. However, for larger number of BSs, mm-Wave fronthaul is a better solution in terms of energy efficiency, fiber saving and flexibility.

Orientador: Eduardo Kokubun / Banca: Fabio Yuzo Nakamura / Banca: Sebastião Gobbi / Resumo: Atualmente avaliação da aptidão física constitui importante ferramenta para prevenção e detecção de problemas físicos que podem interferir na autonomia e independência nas atividades da vida diária. Parâmetros de aptidão física estão direta e indiretamente relacionados com indicadores de saúde como atividade física habitual, qualidade de vida e avaliação antropométrica. O modelo de potência crítica nos fornece, de forma simples e não invasiva, dois parâmetros físicos, um aeróbio e outro anaeróbio. Este tem sido classicamente utilizado para descrever desempenho em atletas e não foi validado a testes não exaustivos, o que ampliaria sua aplicabilidade a populações com contra-indicação a testes máximos. Dois objetivos nortearam esse estudo. 1) Examinar se os testes de caminhada com intensidade autoselecionada fornecem estimativas confiáveis dos parâmetros do modelo e consistentes com a predição do modelo. 2) Examinar a relação entre os parâmetros do modelo da velocidade crítica com indicadores de atividade física relacionada à saúde. Um total de 39 indivíduos (32 a 80 anos) realizaram: 1) testes de caminhada de 3, 6 ou 9 minutos, ou até a exaustão em ritmo préfixado, para a determinação da velocidade crítica de caminhada (VCC) e capacidade de caminhada anaeróbia (CCA), 2) teste de caminhada na VCC e superior; 3) avaliação da qualidade de vida relacionada à saúde; 4) testes de aptidão física relacionada à saúde; 5) monitoramento da atividade física habitual (pedometria). Os resultados demonstraram bons ajustes do modelo aos testes de caminhada... (Resumo completo, clicar acesso eletrônico abaixo) / Abstract: Evaluation of physical fitness is an important tool to detect and prevent physical disabilities, which can impair the autonomy and the daily life activities. Components of physical fitness are related to health indexes much as physical activity, quality of life and anthropometrics measures. The critical power model provide two physical parameters (aerobic and anaerobic) in an easy and non-invasive way. Even it has been used to describe performance in athletes, it still has not validated to non-exhausted tests, which could be usefull to apply to people with contraindication on exhaustive tests. Two main objectives conducted this study: 1) To exam if self-paced walk tests could estimated reliable parameters of critical power and in accordance to prediction of the model; 2) To exam the relationship between the parameters provided by the critical power model with health related physical activity indexes. A total of 39 volunteers performed: 1) walking tests of 3, 6, or 9 minutes, or until exhaustion in a pre-determined pace. These tests aimed to determine the critical walking velocity (CWV) and the anaerobic walking capacity (AWC); 2) walking tests at and above CWV; 3) health related quality of life assessment; 4) health related physical fitness tests, and; 5) monitoring of habitual physical activity (by pedometers). The results showed good agreement of self-selected walking speed tests to the model (r2 = 0,996 + 0,005), and no difference between the strategies of data collection was detected. The test-retest intraclass... (Complete abstract click electronic access below) / Mestre

The importance of energy efficiency has grown alongside awareness of climate change due to the rapid increase of greenhouse gases. With the increasing trend regarding mobile subscribers, it is necessary to prevent an expansion of energy consumption via mobile networks. In this thesis, the energy optimization of the new radio access technology called 5G NR utilizing different sleep states to put base stations to sleep when they are not transmitting data is discussed. Energy savings and file latency with heterogeneous and super dense urban scenarios was evaluated through simulations with different network deployments. An updated power model has been proposed and the sensitivity of the new power model was analyzed by adjusting wake-up time and sleep factors. This showed that careful implementation is necessary when adjusting these parameter settings, although in most cases it did not change the end results by much. Since 5G NR has more potential in energy optimization compared to the previous generation mobile network 4G LTE, up to 4 sleep states was implemented on the NR base stations and one idle mode on LTE base stations. To mitigate unnecessary sleep, deactivation timers are used which decides when to put base stations to sleep. Without deactivation timers, the delay could increase significantly, while with deactivation timers the delay increase would only be a few percent. Up to 42.5% energy could be saved with LTE-NR non-standalone deployment and 72.7% energy with NR standalone deployment compared to LTE standalone deployment, while minimally impacting the delay on file by 1%.

Au cours de la dernière décennie, la conception des systèmes embarqués a évolué dans l'optique d'augmenter la puissance de calcul tout en conservant une faible consommation d'énergie. À titre d'exemple, les véhicules autonomes tels que les drones sont un domaine d'application représentatif qui combine de la vision, des communications sans fil avec d'autres noyaux de calculs intensifs, le tout avec un budget énergétique limité. Avec l'avènement des systèmes multicœurs sur puce (MpSoC), la simplification des processeurs a diminué la consommation d'énergie par opération, alors que leur multiplication a amélioré les performances. Cependant, l'apparition du phénomène de ''dark silicon'' a conduit à l'intégration d'accélérateurs matériels spécialisés au sein des systèmes multicœurs. C'est ainsi que sont nées les architectures massivement multicœurs hétérogènes (HMpSoC) combinant des processeurs généralistes (SW) et des accélérateurs matériels (HW). Pour ces architectures hétérogènes, les performances et la consommation d'énergie dépendent d'un large ensemble de paramètres tels que le partitionnement HW/SW, le type d'implémentation HW et le coût de communication entre les organes de calcul HW et SW conduisant ainsi à un immense espace de conception. Dans cette thèse, nous étudions des méthodes permettant la réduction de la complexité de développement et de mise en oeuvre d'applications efficaces en énergie sur HMpSoC. De nombreuses contributions sont proposées pour améliorer les outils d'exploration de l'espace de conception (DSE) avec des objectifs énergétiques. Tout d'abord, une définition formelle de la structure HMpSoC est introduite ainsi qu'une méthode de représentation générique axée sur la hiérarchie mémoire. Ensuite, un outil de modélisation rapide de l'énergie est proposé et validé sur plusieurs applications. Ce modèle énergétique sépare les sources d'énergie en trois catégories (calcul statique, dynamique et communications) et calcule leurs contributions sur la consommation globale de manière indépendante. Basée sur une étude précise des communications, cette approche calcule rapidement la consommation d'énergie pour une répartition donnée d'application sur un HMpSoC. Dans un deuxième temps, nous proposons une méthodologie permettant l'exploration énergétique d'accélérateurs sur HmpSoC. Cette méthode s'appuie sur le modèle de consommation précédent couplé à une formulation de programmation linéaire en nombre entier mixte (MILP). Cela permet de sélectionner efficacement les accélérateurs HW et le partitionnement HW/SW et ainsi d'obtenir une implémentation efficace en énergie pour une application tuilée. Les expériences réalisées ont montré la complexité du processus de validation d'outils/algorithmes de DSE sur une large gamme d'applications et d'architectures. Afin de résoudre ce problème, nous proposons un simulateur d'architectures HMpSoC intégrant un modèle de consommation permettant d'observer l'exécution d'applications. La structure de l'architecture cible est décrite à l'aide d'un fichier de configuration basé sur le modèle de représentation générique précédent. Ce fichier est chargé dynamiquement lors du démarrage du simulateur. De plus, ce simulateur est associé à un générateur d'applications permettant la création d'un large ensemble d'applications représentatives du domaine. Ce générateur se base sur un ensemble de schémas de calcul et de communication élémentaire qu'il combine pour obtenir une application complète. Les applications ainsi obtenues peuvent être enrichies par des informations de placement et automatiquement exécutées sur le simulateur. Cet ensemble d'outils a pour objectif de faciliter la validation de nouveaux algorithmes ciblant le placement efficace en énergie d'application sur une large gamme d'architectures HMpSoC. / During the last decade, the design of embedded systems was pushed to increase computational power while maintaining low energy consumption. As an example, autonomous vehicles such as drones are a representative application domain which combines vision, wireless communications and other computation intensive kernels constrained with a limited energy budget. With the advent of Multiprocessor System-on-Chip (MpSoC) architectures, simplification of processor cores decreased power consumption per operation, while the multiplication of cores brought performance improvement. However, the ''dark silicon'' issue led to the benefit of augmenting programmable processors with specialized hardware accelerators and to the rise of Heterogeneous MpSoC (HMpSoC) combining both software (SW) and hardware (HW) computational resources. For these heterogeneous architectures, performance and energy consumption depend on a large set of parameters such as the HW/SW partitioning, the type of HW implementation or the communication cost between HW and SW cores therefore leading to a huge design space. In this thesis, we study how to reduce the development and implementation complexity of energy-efficient applications on HMpSoC. Multiple contributions are proposed to enhance Design Space Exploration (DSE) tools with energy objectives. First, a formal definition of HMpSoC structure is introduced alongside with a generic representation focused on the memory hierarchy. Then, a fast power modelling tool is proposed and validated on several applications. This power model separates the power sources in three families (static, dynamic computation and dynamic communication) and computes their contributions on global consumption independently. With a fine grain communications study, this approach rapidly computes energy consumption for a given application mapping on a HMpSoC. In a second time, we propose a methodology for energy-driven accelerator exploration on HMpSoC. This method builds upon the previous power model coupled with an Mixed Integer Linear Programming (MILP) formulation and enables to efficiently select HW accelerators and HW/SW partitioning which achieve energy efficient-mapping of a tiled application. The experiments involved in these contributions show the complexity of DSE validation process on a wide range of applications and architectures. To address these issues, we introduce a HMpSoC simulator embedding a power model to monitor application execution. Properties of targeted architectures are described, at run-time with the previous generic representation model. Furthermore, this simulator is coupled with an application generator framework that could build an infinite set of representative applications following predefined computation models. The obtained applications could then be enriched with mapping directive and executed on the simulator. This combination enables to ease the research and validation of new DSE algorithms targeting energy-aware application mapping on a wide range of HMpSoC architectures.