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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
121

Implementação de modelos de redes de Petri em hardware de lógica reconfigurável

Antiqueira, Perci Ayres 15 December 2011 (has links)
Neste trabalho de pesquisa, foi realizado um estudo dos principais tipos de ferramentas para modelagem de hardware buscando-se verificar as vantagens da utilização de Redes de Petri para a modelagem de sistemas dinâmicos e concorrentes e de sua implementação em hardware. Observou-se que apesar de existirem ferramentas para esta finalidade, existem pontos que podem ser trabalhados para facilitar o acesso a esta tecnologia. Assim, foi desenvolvido um método para facilitar a implementação de sistemas modelados em Redes de Petri, em hardware de lógica reconfigurável. Para isto, utilizou-se um software de captura onde, a partir do gráfico do modelo em Rede de Petri, é gerado um arquivo de descrição no formato PNML - Linguagem de Marcação para Rede de Petri (Petri Net Markup Language). A partir desta descrição, é gerado um arquivo de descrição de hardware no formato VHDL - Linguagem de Descrição de Hardware VHSIC (VHSIC Hardware Description Language), que pode ser gravado em um circuito de lógica reconfigurável. Para possibilitar esta etapa, foi realizado o desenvolvimento de uma ferramenta que gera um arquivo em linguagem VHDL a partir da descrição no formato PNML. A ferramenta desenvolvida é descrita em detalhes, mostrando todas as etapas e critérios utilizados na conversão. Para validar o método, é mostrado um exemplo de aplicação com a implementação em FPGA - Matriz de Portas Programável em Campo (Field Programmable Gate Arrow), de uma Rede de Petri modelando uma planta industrial hipotética. Finalmente é feita uma comparação de desempenho entre o modelo executado em hardware com o modelo executado em software. / In this research work, was performed a study of main types of hardware modeling tools searching to verify the advantages of utilizing for modeling dynamic and concurrent systems and for its hardware implementation. It was observed that even though there are tools for this purpose, exists some points that may be worked out to facilitate access to this technology. So, was developed a method for facilitate implementation of systems modeled in Petri nets, in reconfigurable logic hardware. For that, was utilized a capture software where, from the graphic of the Petri net model, is generated a description in PNML (Petri Net Markup Language) format. From this description, is generated a hardware description file in VHDL (VHSIC Hardware Description Language) format, that may be loaded in a reconfigurable logic circuit. To make possible this stage, was performed the development of tool that generate a file in VHDL language from the description in PNML format. The developed tool is described in details, showing all stages and criteria utilized in the conversion. To validate the method, is showed an application example for this toll with the implementation in FPGA (Field Programmable Gate Arrow), of a Petri net modeling a hypothetic industrial plant. Finally, a performance comparison is made between the model executed in hardware and the model executed in software.
122

Sistema web did?tico para a supervis?o de redes fieldbus

Cavalcanti, Bruno J?come 31 January 2011 (has links)
Made available in DSpace on 2014-12-17T14:55:46Z (GMT). No. of bitstreams: 1 BrunoJC_DISSERT_1-60.pdf: 4138236 bytes, checksum: 7d92583d3159abe9ed3a9cb5f3d51992 (MD5) Previous issue date: 2011-01-31 / Coordena??o de Aperfei?oamento de Pessoal de N?vel Superior / Technological evolution of industrial automation systems has been guided by the dillema between flexibilization and confiability on the integration between devices and control supervisory systems. However, there are few supervisory systems whose attributions can also comprehend the teaching of the communication process that happens behind this technological integration, where those which are available are little flexible about accessibility and reach of patterns. On this context, we present the first module of a didactic supervisory system, accessible through Web, applied on the teaching of the main fieldbus protocols. The application owns a module that automatically discovers the network topology being used and allows students and professionals of automation to obtain a more practical knowledgment by exchanging messages with a PLC, allowing those who are involved to know with more details the communication process of an automation supervisory system. By the fact of being available through Web, the system will allow a remote access to the PLC, comprehending a larger number of users. This first module is focused on the Modbus protocol (TCP and RTU/ASCII) / A evolu??o tecnol?gica dos sistemas de automa??o industrial tem sido norteada pelo dilema entre flexibiliza??o e confiabilidade na integra??o entre equipamentos e sistemas supervis?rios de controle. No entanto, s?o poucos os sistemas supervis?rios cujas atribui??es tamb?m abrangem o ensino do processo de comunica??o que ocorre por tr?s dessa integra??o tecnol?gica, sendo os existentes pouco flex?veis no que se refere ao acesso e ? abrang?ncia de padr?es. Este trabalho apresenta um sistema supervis?rio did?tico, acess?vel via Web, que ? utilizado no ensino dos principais protocolos Fieldbus. O aplicativo proposto possui um m?dulo de descoberta autom?tica da topologia da rede usada e permite que alunos e/ou profissionais da ?rea de automa??o obtenham um conhecimento mais pr?tico desses protocolos ao auxiliar na constru??o e envio de quadros pr?prios da rede Fieldbus considerada, propiciando aos envolvidos um conhecimento mais detalhado do processo de comunica??o que ocorre entre um sistema supervis?rio de automa??o e os dispositivos escravos utilizados na rede. Pelo fato de ser uma aplica??o Web, al?m de contemplar o modo de ensino presencial, o sistema proposto permite o acesso remoto ao CLP, comportando um n?mero bem maior de usu?rios e tornando mais abrangente seu universo de aplica??o. Este primeiro m?dulo ? voltado para o protocolo Modbus (abrangendo suas varia??es TCP e Serial RTU/ASCII)
123

Modelagem de programas e sua verificação para controladores programáveis. / Modeling of programs and its verification for programmable logic controllers.

Cleber Alves Sarmento 16 January 2008 (has links)
Os sistemas produtivos (SPs) podem utilizar controladores programáveis (CPs) como dispositivos de realização do controle. Neste contexto, programas de controle executados por estes CPs podem ser desenvolvidos de forma que não estejam em conformidade com as especificações de projeto, o que poderá provocar o surgimento de erros funcionais associados à execução de tais programas de controle, erros estes que podem levar os SPs sob controle a um estado que poderá implicar em acidentes envolvendo equipamentos, pessoas e o meio-ambiente. Esta questão tem motivado o surgimento de diversas abordagens para identificar a existência de erros em programas de controle de CPs, de forma a permitir a correção destes erros e garantir, conseqüentemente, maior confiabilidade operacional. O presente trabalho tem por objetivo identificar a existência de erros em programas de controle baseados em LD (Ladder Diagram). Para isto, propõe-se um procedimento de desenvolvimento de modelos baseados em máquinas de estados finitos estendidas (MEFEs), que são gerados a partir do mapeamento de cada um dos rungs contidos no programa de controle que se deseja identificar erros. Uma vez desenvolvidos os modelos em MEFEs, torna-se possível a utilização de uma ferramenta computacional de verificação, própria para estabelecer se os modelos verificados satisfazem determinadas proposições estabelecidas em lógica temporal. Uma proposição em lógica temporal está relacionada a um estado específico do programa de controle modelado, sendo que o objetivo da verificação é o de estabelecer se a proposição estipulada é atendida ou não. Se um determinado estado específico for, por exemplo, um estado indesejado do programa de controle modelado, e este estado for possível de ser alcançado como resultado do processo de verificação realizado, isto impactará na não conformidade do programa de controle com as especificações comportamentais estipuladas na forma de proposição em lógica temporal, indicando haver, portanto, um erro neste programa de controle modelado. Palavras-chave: Controladores programáveis. Linguagem de programação LD. Modelagem e verificação de máquinas de estados finitos estendidas (MEFEs). / Productive systems (PS) can use programmable logic controllers (PLCs) as the devices of accomplishment of the control. In this context, control programs executed by these PLCs can be developed in a way so that they can be in non-conformity with the project specifications, and this fact may result in functional errors related to the control programs execution. These errors can take the PS under control to a state which can lead into accidents involving equipment, people and the environment. This fact has motivated the appearance of different approaches so as to identify the existence of these errors in PLC control programs so that they can be corrected and assure a greater operational reliability. This work aims at identifying the existence of errors in control programs based on Ladder Diagram (LD). In order to accomplish that, a modeling procedure that generates extended finite state machines (EFSMs) is proposed from the mapping of each one of the rungs in the control program whose errors are to be identified. Once the models based on EFSMs are developed it becomes possible to use a computational verification tool, specifically designed to determine if the verified models fulfill determined propositions established in temporal logic. A proposition in temporal logic is related to a specific state of the modeled control program and the objective of the verification is to establish whether the proposition is fulfilled or not. If a determined specific state, for example, is an unwanted state of the modeled control program and if this state is reachable as a result of the verification process, this will impact in the non-conformity of the control program with the behavior specifications established in a temporal logic proposition, indicating an error in this modeled control program.
124

CNCs de arquitetura aberta na manufatura: análise e síntese / CNCs open architecture in manufacturing: analysis and synthesis

Osvaldo Luís Asato 13 November 2000 (has links)
Este trabalho apresenta uma Análise sobre os Comandos Numéricos Computadorizados de Arquitetura Aberta aplicado na automação de Máquina-ferramentas e no uso da manufatura. É realizado uma classificação das Arquiteturas Abertas (em relação ao hardware, software, funcionalidade e flexibilidade) e uma comparação entre os CNC\'s convencionais e os CNC\'s de Arquitetura Aberta. / This work presents an Open Architecture CNCs analysis. An Open Architecture classification using hardware, software, functionality and flexibility are presented. A comparison table with conventional CNCs and this new class of CNCs are elaborated.
125

Test de conformité de contrôleurs logiques spécifiés en grafcet / Conformance test of logic controllers from Grafcet specification

Provost, Julien 08 July 2011 (has links)
Les travaux présentés dans ce mémoire de thèse s'intéressent à la génération et à la mise en œuvre de séquences de test pour le test de conformité de contrôleurs logiques. Dans le cadre de ces travaux, le Grafcet (IEC 60848 (2002)), langage de spécification graphique utilisé dans un contexte industriel, a été retenu comme modèle de spécification. Les contrôleurs logiques principalement considérés dans ces travaux sont les automates programmables industriels (API). Afin de valider la mise en œuvre du test de conformité pour des systèmes de contrôle/commande critiques, les travaux présentés proposent: - Une formalisation du langage de spécification Grafcet. En effet, l'application des méthodes usuelles de vérification et de validation nécessitent la connaissance du comportement à partir de modèles formels. Cependant, dans un contexte industriel, les modèles utilisés pour la description des spécifications fonctionnelles sont choisis en fonction de leur pouvoir d'expression et de leur facilité d'utilisation, mais ne disposent que rarement d'une sémantique formelle. - Une étude de la mise en œuvre de séquences de test et l'analyse des verdicts obtenus lors du changement simultané de plusieurs entrées logiques. Une campagne d'expérimentation a permis de quantifier, pour différentes configurations de l'implantation, le taux de verdicts erronés dus à ces changements simultanés. - Une définition du critère de SIC-testabilité d'une implantation. Ce critère, déterminé à partir de la spécification Grafcet, définit l'aptitude d'une implantation à être testée sans erreur de verdict. La génération automatique de séquences de test minimisant le risque de verdict erroné est ensuite étudiée. / The works presented in this PhD thesis deal with the generation and implementation of test sequences for conformance test of logic controllers. Within these works, Grafcet (IEC 60848 (2002)), graphical specification language used in industry, has been selected as the specification model. Logic controllers mainly considered in these works are Programmable Logic Controllers (PLC). In order to validate the carrying out of conformance test of critical control systems, this thesis presents: - A formalization of the Grafcet specification language. Indeed, to apply usual verification and validation methods, the behavior is required to be expressed through formal models. However, in industry, the models used to describe functional specifications are chosen for their expression power and usability, but these models rarely have a formal semantics. - A study of test sequences execution and analysis of obtained verdicts when several logical inputs are changed simultaneously. Series of experimentation have permitted to quantify, for different configurations of the implantation under test, the rate of erroneous verdicts due to these simultaneous changes. - A definition of the SIC-testability criterion for an implantation. This criterion, determined on the Grafect specification defines the ability of an implementation to be tested without any erroneous verdict. Automatic generation of test sequences that minimize the risk of erroneous verdict is then studied.
126

Návrh, simulace a realizace funkčních modulů testbedu Průmysl 4.0 / Design and implementation of Industry 4.0 testbed functional modules

Podrabský, Tomáš January 2018 (has links)
In this work I deal with the project of an automated robotic bartender, whose task is to show model concepts such as virtual commissioning, digital factory or industry 4.0. The work resolves two parts (cells) for the overall construction. Individual cells are solved from the design and realization of the construction through the virtual verification of operation to the design and realization of the control itself for the given cells. The construction solution was created in SolidEdge ST10. Virtual verification will be solved in the Tecnomatix Process Simulate program and the implementation of PLC and HMI control by Siemens is programmed in the TIA Portal. Wiring diagrams were drawn in the student version of the EPLAN design environment. Other colleagues work on other parts of the barman project.
127

Řízení odprášení tavicích pecí na recyklaci hliníkového odpadu / Controling the dust exhaust of smeltery for recyclation of aluminum waste

Jakubský, Ondřej January 2009 (has links)
The work deals with controlling and visualizing technology of dust exhaust of smeltery for recyclation of aluminum waste. In the first part of the work are analyzed the different ways of automatic control. Based on the analysis is proposed control system configuration, algorithm of control, communication interfaces and sensors of alarm, measurement and regulation. The second part deals with visualization and remote administration of control system. On the basis of selection for the visualization software is designed and implemented a system that provides visualization of technology, the archiving of measured operating values, events and errors.
128

DATA TRANSFER PERFORMANCE ANALYSIS FROM PROGRAMMABLE LOGIC TO PROCESSING SYSTEM OF ZYNQ 7000

Tilottoma Barua (9188531) 30 July 2020 (has links)
<div>Field Programmable Gate Arrays(FPGAs) were invented in the 1980s. Since then the use of FPGAs in many fields has been growing rapidly. Due to the inherent reconfiguration and relatively low development cost FPGA technology has become one of the important components in data processing and communication system.</div><div>The recent development of computing technology affects not only the software but also requires integrating and utilizing a custom logic design on a dedicated hardware platform.</div><div>In this context,this research work analyzes and compares on-chip interfaces of HW/SW communication in the Zynq-7000 all programmable SoC based platform. Several experiments were carried out to evaluate the performance of data communication between the processing system and programmable logic through general purpose(GP), high performance ports (HP) and accelerator coherency port (ACP). The results identified the most effective interfaces for transferring data from the PL to PS and store the data to DRAM memory.</div><div>One conclusion of this work is that, the selection of suitable ports depends on application requirements. For low-bandwidth application GP port is appropriate. For high-speed applications, the high performance port(HP) and Accelerator Coherency Port (ACP) are suitable and works better.The results of this thesis are useful in high performance embedded system design.<br></div><div><br></div><div><br></div>
129

Identifying and analysing forensic artefacts of specific attacks on a Programmable Logic Controller / Identifiera och analysera kriminaltekniska artefakter för specifika attacker på en Programmerbar Logisk Styrenhet

Forsberg, Rebecka January 2022 (has links)
In Industrial Computer Systems, Programmable Logic Controllers (PLCs) are essential components since they control physical processes. Altering these could have enormous consequences as they can control processes in nuclear plants, gas pipelines and water supplies. Over the years, PLCs have become more and more connected since it facilitates their configuration and programming remotely. More connected does also means that they could be more vulnerable to attacks. Therefore, it would be desirable to be able to do a forensic investigation and interpret the artefacts if an incident happens, especially since PLCs control such vital functions. There exists little research about this area, but it does not discuss how to evaluate or interpret possible artefacts forensic investigation could reveal. This thesis aims to answer what artefacts are left in the system after two specific attacks. The result showed that some artefacts is left. One of the attacks does not leave so much specific artefacts that one could conclude how the attack happened, but for the other one, it was possible to conclude how they got remote access to the system. However, these artefacts were possible to cover up by deleting the IP address that was added in order to get remote access to the system. In other words, the only persistent artefacts left in the system after the attacks and cover-ups was metadata about created, modified, and removed files. Future work would be to expand and include more attacks to get a better overview of the overall forensic abilities of the PLC. / I industriella datorsystem är PLC (Programmable Logic Controllers) viktiga komponenter eftersom de styr fysiska processer. Att ändra dessa kan få enorma konsekvenser eftersom de kan styra processer i kärnkraftverk, gasledningar och vattenförsörjning. Under årens lopp har PLC:er blivit mer och mer uppkopplade eftersom det underlättar deras konfiguration och programmering på distans. Mer uppkopplade betyder också att de kan vara mer sårbara för attacker. Därför vore det önskvärt att kunna göra en kriminalteknisk undersökning och tolka bevisningen om en incident inträffar, särskilt eftersom PLC:er kontrollerar sådana vitala funktioner. Det finns lite forskning om detta område, men den diskuterar inte hur man ska utvärdera eller tolka eventuella bevis som den kriminalteknisk undersökningen kan avslöja. Denna avhandling syftar till att svara på vilka artefakter som finns kvar i systemet efter två specifika attacker. Resultatet visade att en del bevis finns kvar. En av attackerna lämnar inte så mycket specifika bevis att man kunde dra slutsatsen hur attacken gick till, men för den andra gick det att dra slutsatsen hur de fick fjärråtkomst till systemet. Dessa artefakter var dock möjliga att dölja genom att radera IP-adressen som lades till för att få fjärråtkomst till systemet. Med andra ord, det enda ihållande bevisningen som fanns kvar i systemet efter attackerna och mörkläggningarna var metadata om skapade, modifierade och borttagna filer. Framtida arbete skulle vara att expandera och inkludera fler attacker för att få en bättre överblick över PLC:s övergripande forensiska förmågor.
130

Comparing PLC, Software Containers and Edge Computing for future industrial use: a literature review

Basem, Mumthas January 2022 (has links)
Industrial automation is critical in today's industry. The majority of new scientific and technological advancements are either enabling technologies or industrial automation application areas. In the past, the two main forms of control systems were distributed control systems (DCS) and programmable logic controllers (PLCs). PLCs have been referred as the "brain" of production systems because they provide the capacity to meet interoperability, reconfigurability, and portability criteria. Today's industrial automation systems rely heavily on control software to ensure that the automation process runs smoothly and efficiently. Furthermore, requirements like flexibility, adaptability, and robustness add to the control software's complexity. As a result, new approaches to building control software are required. The International Electrotechnical Commission attempted to meet these new and impending demands with the new IEC 61499 family of standards for distributed automation systems. The IEC 61499 standard specifies a high-level system design language for distributed data and control. With the advancement of these technologies like edge/fog computing and IIoT, how the control software in future smart factory managed is discussed here. This study aims to do a systematic literature review on PLC, software containers, edge/fog computing and IIoT for future industrial use. The objective is to identify the correspondence between the functional block (IEC 61499) and the container technology such as Docker. The impact of edge computing and the internet of things in industrial automation is also analysed. Since the aim is to do a comparative study, a qualitative explorative study is done, with the purpose to gather rich insight about the field. The analysis of the study mainly focused on four major areas such as deployment, run time, performance and security of these technologies. The result shows that containerisation or container based solutions is the basis for future automation as it outperforms virtual machines in terms of deployment, run time, performance and security.

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