Thesis (MScIng)--University of Stellenbosch, 2004. / ENGLISH ABSTRACT: The preliminary development of a FM radio receiver module is discussed. An existing narrowband system operating between 48MHz and 50MHz will be replaced. Digital components were investigated, compared and used with analogue techniques to build a more flexible two-way radio receiver system. A direct digital synthesizer was considered as a replacement for the current synthesized phased lock loop local oscillator and much attention was given to the local oscillator and mixer design, characteristics and measurement procedures. A detailed study of receiver systems was undertaken to determine the specifications needed for every receiver component to achieve satisfactory receiver performance in the end. Receiver characteristics as well as receiver measurement procedures are defined. A software tool was developed to aid the design process, establishing computationally whether the receiver specifications are met prior to the final design. The complete design process, from fundamental specifications through to the developed final receiver module is discussed. A modular design approach was used to guarantee easy manufacturing, substitution and testing. This approach comprises the break-down of the receiver into well defined components that are each matched to 50O. The separate components of the system were designed, measured and characterized to make it possible to replace only a single component instead of the entire system when a part becomes redundant. / AFRIKAANSE OPSOMMING: Die grondslag vir die ontwikkeling van ‘n FM radio ontvanger module word in hierdie dokument gelê. ‘n Bestaande noubandstelsel wat tussen 48MHz and 50MHz ontvang word vervang deur hierdie nuwe stelsel wat aangewend sal kan word in die bestaande tweerigtingradio se omhulsel. Digitale komponente is ondersoek, vergelyk en gebruik saam met analoogtegnieke om ‘n meer buigsame radiostelsel te bewerkstellig. ‘n Direkte digitale sintitiseerder is oorweeg as ‘n vervanging vir die huidige fasesluitlus ossillator met heelwat klem op die oscillator-en mengerontwerp, komponent spesifikasies en metingsprosedures. ‘n Diepgaande studie van ontvangerstelsels is gedoen om te bepaal wat die tipiese spesifikasies vir elke ontvangerstadium is, sodat die finale ontvanger se spesifikasies behaal kan word. Ontvanger eienskappe en meetprosedures word volledig gedefinieer. ‘n Sagtewareprogram is ontwikkel om die ontvanger-ontwerpsproses te vergemaklik deur vooraf te kan vasstel watter ontvangerspesifikasies bereik sal kan word al dan nie. Die volledige ontwerpsproses, vanaf fundamentele spesifikasies tot by die finale ontvanger word omskryf. ‘n Modulere-ontwerp prosedure is gebruik ter versekering van die maklike vervaardiging, vervanging en toetsing van elke komponent. Die radio is tydens ontwerp opgebreek in boublokkies wat elkeen aangepas word na 50O. Elke aparte boublokkie van die ontvangerstelsel is afsonderlik ontwerp, gemeet en volledig gespesifiseer om dit moontlik te maak om slegs een komponent te vervang in plaas van die hele stelsel wanneer ‘n enkele komponent nie meer beskikbaar is nie.

Thesis (D.Sc.)--University of the Witwatersrand, Faculty of Science, 1959.

Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1978. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Includes bibliographical references. / B.S.

Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1982. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Vita. / Includes bibliographical references. / by David Michael Papurt. / Ph.D.

Photocopy of typescript. / Digitized by Kansas Correctional Industries

published_or_final_version / Electrical and Electronic Engineering / Doctoral / Doctor of Philosophy

Power minimization in wireless transceivers has become increasingly critical in recent years with the emergence of standards for short-distance applications in the 900 MHz and 2.4 GHz industrial, scientific and medical (ISM) radio bands. The demand for long battery life and better portability in such applications has led to extensive research on low power radio architectures. This dissertation introduces receiver topologies for low-power systems and presents a theoretical performance analysis of the topologies. Two fully integrated receiver down-converters that demonstrate the concept are implemented in a 0.13-[mu]m CMOS technology. These topologies employ merged mixers and IF amplifiers in order to reduce power dissipation for a given dynamic range performance. In the described topologies, the input stage of a mixer is used to simultaneously provide conversion gain and baseband amplification. This is achieved by applying the down-converted IF signal to input of the mixer. Consequently, the effective conversion gain of the design is greatly enhanced with current requirement primarily determined by the input transconductor. Potential degradation mechanisms related to instability and second-order distortion are identified and solved by the use of appropriate circuit techniques. Noise and linearity performance of the down-converters is analyzed and compared to that of conventional cascaded design counterparts. The potential for enhancement of IIP3 performance through cancellation of nonlinear products is discussed. Potential extensions of the above work including feedback-based architectures that exploit multiple loops for further maximizing the power efficiency of receiver front-ends are also presented.

No description available.

In the energy-limited wireless sensor node applications, wake-up radios are required to reduce the average power consumption of the node. Energy-detecting receivers are the best fit for such low power operations. This thesis presents the energy-detecting receiver design; challenges; techniques to enhance sensitivity, selectivity; and multi-access operation. Self-mixers instead of the conventional envelope detectors are proposed and proved to be optimal for signal detection. A fully integrated wake-up receiver uses the self-mixer and time-encoded baseband signal processing to provide a sensitivity of -79.1dBm at 434MHz with 420pW of power, providing an 8dB better sensitivity at 10dB lower power consumption compared to the SoA. A novel approach using narrowband interferers as local oscillators will be presented to further enhance sensitivity and selectivity, effectively operating the energy-detector receiver as a direct down-conversion receiver. Additionally, a clockless continuous-time analog correlator will be introduced to enhance the selectivity to wide-band AM interferers. The architecture uses pulse-position-encoded analog signal processing with VCOs as integrators and pulse-controlled relaxation delays; it operates as a code-domain matched filter to de-spread asynchronous wake-up codes. This code-domain matched filtering also provides code-division multiple access (CDMA) for simultaneous wakeups. Additional enhancement in the link can be achieved using directional antennas, providing spatial gain and selectivity. Certain applications can leverage a nearby reflector similar to a Yagi antenna to enhance the directivity. A low power directional backscatter tag is proposed, it uses multiple antennas acting as a reflectarray by configuring constant phase gradients depending on the direction of arrival (DoA) of the signal. Thus, instead of harvesting energy, the same energy and the surrounding environment can be leveraged to enhance functionality (e.g. interferer as LO, using a backscatter tag on a wall) for low power operation. Innovations spanning both system and circuit architectures that leverage the ambient energy and environment to enable power-efficient solutions for next-generation wake-up radios are presented in this work.

The ever-increasing demand for wireless throughput requires modern handset receivers to aggregate signals from multiple non-contiguously allocated RF carriers. This poses significant receiver design challenges, including concurrent signal reception, RF input interface, out-of-band (OB) linearity, and suppression of spurious responses. Commercial solutions use external antenna switches and off-chip RF multiplexers to provide non-tunable, narrowband filtering and impedance matching. The RF signal is then divided into separate signal chains, each with a dedicated receiver for signal reception. Although this solution allows the selection of any carrier combinations supported by the available RF filters, as the number of aggregation band combinations increases, the scale of the passive front-end module grows rapidly, leading to increased system complexity, extra signal loss, and degraded performance. This thesis presents the design and implementation of two receiver architectures that support reconfigurable operations and flexible, concurrent reception from two inter-band carriers with a tuned RF interface. We first present a multi-branch receiver with modulated mixer clocks (MMC). It unifies the functions of single-carrier and dual-carrier reception, as well as compressive-sampling spectrum scanning into a single architecture. With continuous-wave-modulated mixer clocks, the receiver supports concurrent reception from two distinct bands and realizes tuned impedance matching that greatly improves the OB linearity. With pseudo-noise-modulated mixer clocks, the receiver supports spectrum scanning. Disabling modulation reverts the receiver into a single-carrier receiver with good OB linearity. The 65nm CMOS prototype is developed that operates from 300 to 1300MHz and offers 2.7dB minimum NF, -1.3dBm B1dB, and +8.0dBm IIP3 for single-carrier reception. Concurrent dual-carrier reception is demonstrated that offers -8.4dBm B1dB and sub-6dB NF with the two carriers separated from 200 to 600MHz apart. For spectrum scanning, the receiver achieves a 66dB dynamic range with -75dBm sensitivity over a 630MHz RF span. In addition, a discussion of the higher-order MMC technique is included to improve the receiver’s spurious and noise performance by suppressing the higher-order responses and mitigating the noise-folding effect. Next, we present an IF-filterless, double-conversion receiver. The concurrent, narrowband RF interface is realized with two layers of passive mixing in its mixer-first branches, which translate the low-pass, baseband impedance twice to two distinct bands and improve the OB linearity. Branches with DDS-modulated LNTAs for multi-phase, switched-Gm mixing offer rejection of spurious responses and improved noise performance. The 65nm CMOS prototype is developed that operates from 100 to 1200MHz. For single-carrier reception, the receiver delivers 4.8dB minimum NF, +7.9dBm B1dB, and +22.8dBm IIP3. For concurrent signal reception, two arbitrarily-allocated RF carriers, separated from 200 to 600MHz apart, can be received concurrently. The receiver delivers a +1.9dBm B1dB and supports 8-/16-phase DDS modulation with a 30dB spurious rejection across its operating range. In addition, a theoretical study of a modified, mixer-first branch is included. By re-arranging the connections of the baseband termination resistors, the baseband noise can be fully cancelled, thus improving the receiver’s noise performance.