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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
11

UML basierte Zeitmodellierung für eingebettete Echtzeitsysteme

Dimitrow, Wassil 30 June 2006 (has links) (PDF)
Die Arbeit stellt eine Methodik zur modellbasierten Spezifikation und Analyse des Zeitverhaltens eines Systems mit UML (Unified Modeling Language) vor. Durch Stereotypen und Tags des Profile for Schedulability, Performance and Time (SPT) werden die erforderlichen Eigenschaften beschrieben. Als Eingangsinformation dient das UML-Modell des zu entwerfenden Systems. Die Analyse liefert eine Aussage über die Einhaltung von Zeitconstraints als Ganzes. Bei Verletzungen erfolgen elementbezogene Kommentare. Damit wird mit standardisierten Mitteln eine Analyse des zeitbezogenen Systemverhaltens vor den Partitionierungsentscheidungen möglich. Die Modellierung erfolgt im Tool Real-time Studio (RtS) der Firma Artisan Software Tools, Inc.
12

RAUK: Automatic Schedulability Analysis of RTIC Applications Using Symbolic Execution

Håkansson, Mark January 2022 (has links)
In this thesis, the proof-of-concept tool RAUK for automatically analyzing RTIC applications for schedulability using symbolic execution is presented. The RTIC framework provides a declarative executable model for building embedded applications, which behavior is based on established formal methods and policies. Because of this, RTIC applications are amenable for both worst-case execution time (WCET) and scheduling analysis techniques. Internally, RAUK utilizes the symbolic execution tool KLEE to generate test vectors covering all feasible execution paths in all user tasks in the RTIC application. Since KLEE also checks for possible program errors e.g. arithmetic or array indexing errors, it can be used via RAUK to verify the robustness of the application in terms of program errors. The test vectors are replayed on the target hardware to record a WCET estimation for all user tasks. These WCET measurements are used to derive a worst-case response time (WCRT) for each user task, which in turn is used to determine if the system is schedulable using formal scheduling analysis techniques. The evaluation of this tool shows a good correlation between the results from RAUK and manual measurements of the same tasks, which showcases the viability of this approach. However, the current implementation can add some substantial overhead to the measurements, and sometimes certain types of paths in the application can be completely absent from the analysis. The work in this thesis is based on previous research in this field for WCET estimation using KLEE on an older iteration of the RTIC framework. Our contributions include a focus on an RTIC 1.0 pre-release, a seamless integration with the Rust ecosystem, minimal changes required to the application itself, as well as an included automatic schedulability analyzer. Currently, RAUK can verify simple RTIC applications for both program errors and schedulability with minimal changes to the application source code. The groundwork is laid out for further improvements that are required to function on larger and more complex applications. Solutions for known problems and future work are discussed in Chapters 6, 7 respectively.
13

Global scheduling on temperature-constrained multiprocessor real-time systems

Koo, Ja-Ryeong 10 October 2008 (has links)
In this thesis, we study temperature-constrained multiprocessor real-time systems, where real-time guarantees must be met without exceeding safe temperature levels within the processors. We focus on Pfair scheduling algorithms, especially ERfair scheduling scheme (a work-conserving extension to Pfair scheduling) as our main multiprocessor real-time scheduling methodology. Then, we study the benefits of simple reactive speed scaling as described in the real-time multiprocessor systems. In this thesis, in support of the temperature-awareness, we extend the applicability of the reactive speed scaling to global scheduling schemes for multiprocessors. We propose temperature-aware scheduling and processor selection schemes motivated by existing (thermally non-optimal) ERfair scheduling in order to reduce thermal stress and therefore increase the processor utilization. Then, we show that the proposed algorithm and reactive scheme can enhance the processor utilization compared with any constant speed scheme on real-time multiprocessor systems. Additionally, we show how the maximum schedulable utilization (MSU) for partitioning heuristics can be determined on the temperature-constrained multiprocessor real-time systems.
14

UML basierte Zeitmodellierung für eingebettete Echtzeitsysteme

Dimitrow, Wassil 30 June 2006 (has links)
Die Arbeit stellt eine Methodik zur modellbasierten Spezifikation und Analyse des Zeitverhaltens eines Systems mit UML (Unified Modeling Language) vor. Durch Stereotypen und Tags des Profile for Schedulability, Performance and Time (SPT) werden die erforderlichen Eigenschaften beschrieben. Als Eingangsinformation dient das UML-Modell des zu entwerfenden Systems. Die Analyse liefert eine Aussage über die Einhaltung von Zeitconstraints als Ganzes. Bei Verletzungen erfolgen elementbezogene Kommentare. Damit wird mit standardisierten Mitteln eine Analyse des zeitbezogenen Systemverhaltens vor den Partitionierungsentscheidungen möglich. Die Modellierung erfolgt im Tool Real-time Studio (RtS) der Firma Artisan Software Tools, Inc.
15

Real-Time Services in Packet-Switched Networks for Embedded Applications

Fan, Xing January 2007 (has links)
Embedded applications have become more and more complex, increasing the demands on the communication network. For reasons such as safety and usability, there are real-time constraints that must be met. Also, to offer high performance, network protocols should offer efficient user services aimed at specific types of communication. At the same time, it is desirable to design and implement embedded networks with reduced cost and development time, which means using available hardware for standard networks. To that end, there is a trend towards using switched Ethernet for embedded systems because of its hight bit rate and low cost. Unfortunately, since switched Ethernet is not specifically designed for embedded systems, it has several limitations such as poor support for QoS because of FCFS queuing policy and high protocol overhead. This thesis contributes towards fulfilling these requirements by developing (i) real-time analytical frameworks for providing QoS guarantees in packet-switched networks and (II) packet-merging techniques to reduce the protocol overhead. We have developed two real-time analytical frameworks for networks with FCFS queuing in the switches, one for FCFS queuing in the source nodes and one for EDF queuing in the source nodes. The correctness and tightness of the real-time analytical frameworks for different network components in a singel-switch neetwork are given by strict theoretical proofs, and the performance of our end-to-end analyses is evaluated by simulations. In conjunction with this, we have compared our results to Network Calculus (NC), a commonly used analytical scheme for FCFS queuing. Our comparison study shows that our anlysis is more accurate than NC for singel-switch networks. To reduce the protocol overhead, we have proposed two active switched Ethernet approaches, one for real-time many-to-many communication and the other for the real-time short message traffic that is often present in embedded applications. A significant improvement in performance achieved by using our proposed active networks is demonstrated. Although our approaches are exemplified using switched Ethernet, the general approaches are not limited to switched Ethernet networks but can easily be moified to other similar packet-switched networks.
16

Real-time scheduling of dataflow graphs

Bouakaz, Adnan 27 November 2013 (has links) (PDF)
The ever-increasing functional and nonfunctional requirements in real-time safety-critical embedded systems call for new design flows that solve the specification, validation, and synthesis problems. Ensuring key properties, such as functional determinism and temporal predictability, has been the main objective of many embedded system design models. Dataflow models of computation (such as KPN, SDF, CSDF, etc.) are widely used to model stream-based embedded systems due to their inherent functional determinism. Since the introduction of the (C)SDF model, a considerable effort has been made to solve the static-periodic scheduling problem. Ensuring boundedness and liveness is the essence of the proposed algorithms in addition to optimizing some nonfunctional performance metrics (e.g. buffer minimization, throughput maximization, etc.). However, nowadays real-time embedded systems are so complex that real-time operating systems are used to manage hardware resources and host real-time tasks. Most of real-time operating systems rely on priority-driven scheduling algorithms (e.g. RM, EDF, etc.) instead of static schedules which are inflexible and difficult to maintain. This thesis addresses the real-time scheduling problem of dataflow graph specifications; i.e. transformation of the dataflow specification to a set of independent real-time tasks w.r.t. a given priority-driven scheduling policy such that the following properties are satisfied: (1) channels are bounded and overflow/underflow-free; (2) the task set is schedulable on a given uniprocessor (or multiprocessor) architecture. This problem requires the synthesis of scheduling parameters (e.g. periods, priorities, processor allocation, etc.) and channel capacities. Furthermore, the thesis considers two performance optimization problems: buffer minimization and throughput maximization.
17

Planificación, análisis y optimización de sistemas distribuidos de tiempo real estricto

Gutiérrez García, José Javier 27 October 1995 (has links)
La Tesis presenta el desarrollo de una metodología de análisis y diseño de sistemas distribuidos de tiempo real estricto, y su aplicación a una implementación práctica en lenguaje Ada.Se han optimizado los métodos existentes para la planificación y análisis de sistemas distribuidos de tiempo real mediante un algoritmo heurístico para la asignación de prioridades, y la aplicación del algoritmo de servidor esporádico a la planificación de redes de comunicación de tiempo real. También se ha ampliado el campo de aplicación del análisis a sistemas más complejos en los que existe sincronización por intercambio de eventos o paso de mensajes.Se ha demostrado que la metodología propuesta se puede implementar en sistemas de tiempo real prácticos, a través de su aplicación a sistemas distribuidos programados en lenguaje Ada. / The Thesis presents a methodology to analyze and design distributed real-time systems, and its application to a practical implementation.Existing methods for scheduling and analyzing distributed real-time systems have been optimized through a new heuristic algorithm for assigning priorities, and with the application of the sporadic server algorithm for scheduling real-time communication networks. The area of application of the analysis has been extended to more complex systems, like those with synchronization through event exchange or message passing.It has been demonstrated that the proposed methodology can be implemented in practical real-time systems, through the application to a distributed system programmed in the Ada language.
18

Diseño de aplicaciones de tiempo real para plataformas abiertas

Barros Bastante, Laura 02 October 2012 (has links)
Se propone una metodología de desarrollo de aplicaciones de tiempo real estricto que van a ser ejecutadas en plataformas distribuidas abiertas. En esta metodología, el diseñador de la aplicación no conoce la carga de trabajo de la plataforma que será ejecutada concurrentemente junto con la aplicación que diseña. La metodología se basa en el paradigma de reserva de recursos, y utiliza como base el concepto de plataforma virtual, tanto para describir el uso de los recursos que una aplicación requiere, como para ejecutar la aplicación satisfaciendo sus requisitos temporales. La plataforma virtual es utilizada en el proceso de negociación con el servicio de reserva de recursos de la plataforma física, con objeto de obtener una configuración de la aplicación que haga compatible su ejecución con la carga de trabajo que ya se está ejecutando en dicha plataforma. La metodología aborda todas las fases del desarrollo de una aplicación: describe la información que debe asociarse al código de la aplicación para poder ser configurado, así como el proceso que permite analizar independientemente su planificabilidad en base a la plataforma virtual; especifica el proceso de despliegue de la aplicación y define la información que se utiliza para negociar su ejecución con el servicio de reserva de recursos de la plataforma física y para generar los datos de configuración que deben ser asignados al código cuando se ejecute. Todos estos procesos son dirigidos por modelos, por lo que la tesis aborda la definición de las transformaciones de modelos requeridas, así como la formulación de los metamodelos formales utilizados en ellas. Por otro lado, aunque la tecnología es independiente de la plataforma de ejecución, se especifica la funcionalidad que debe ofrecer el servicio de reserva de recursos presente en la misma para dar soporte a la metodología propuesta, y se analiza su compatibilidad con algunas implementaciones actualmente disponibles / This thesis proposes a methodology for the development of hard real-time applications that will be executed in open distributed platforms. When this methodology is applied, the application designer does not know the workload of the platform that will execute concurrently with the designed application. The methodology is based on the resource reservation paradigm, and relies on the concept of virtual platform, both to describe the resources usage required by an application to execute, and to run the application guaranteeing the fulfillment of the specified timing requirements. The virtual platform is also used on the negotiation process with the resource reservation service of the physical platform in order to obtain a configuration of the application that supports its execution together with the current workload running on that platform. The methodology deals with all the phases of the application design: it describes the information that must be associated to the application code in order to obtain a proper configuration, as well as the process that allows an independent schedulability analysis of the application based on its virtual platform; it specifies the application deployment process and defines the information that is used to negotiate the execution of the application with the resource reservation service of the physical platform, and to generate the configuration data that must be assigned to the code when it is executed. The methodology follows a model-driven perspective, so the thesis addresses the required models transformations, as well as the formulation of the metamodels used in them. Moreover, although the technology is independent from the execution platform, the functionality that must be provided by the resource reservation service to support the proposed technology is specified and its compatibility with other implementations is analyzed.
19

Real-time scheduling of dataflow graphs / Ordonnancement temps-réel des graphes flots de données

Bouakaz, Adnan 27 November 2013 (has links)
Les systèmes temps-réel critiques sont de plus en plus complexes, et les exigences fonctionnelles et non-fonctionnelles ne cessent plus de croître. Le flot de conception de tels systèmes doit assurer, parmi d’autres propriétés, le déterminisme fonctionnel et la prévisibilité temporelle. Le déterminisme fonctionnel est inhérent aux modèles de calcul flot de données (ex. KPN, SDF, etc.) ; c’est pour cela qu’ils sont largement utilisés pour modéliser les systèmes embarqués de traitement de flux. Un effort considérable a été accompli pour résoudre le problème d’ordonnancement statique périodique et à mémoire de communication bornée des graphes flot de données. Cependant, les systèmes embarqués temps-réel optent de plus en plus pour l’utilisation de systèmes d’exploitation temps-réel et de stratégies d’ordonnancement dynamique pour gérer les tâches et les ressources critiques. Cette thèse aborde le problème d’ordonnancement temps-réel dynamique des graphes flot de données ; ce problème consiste à assigner chaque acteur dans un graphe à une tâche temps-réel périodique (i.e. calcul des périodes, des phases, etc.) de façon à : (1) assurer l’ordonnançabilité des tâches sur une architecture et pour une stratégie d’ordonnancement (ex. RM, EDF) données ; (2) exclure statiquement les exceptions d’overflow et d’underflow sur les buffers de communication ; et (3) optimiser les performances du système (ex. maximisation du débit, minimisation des tailles des buffers). / The ever-increasing functional and nonfunctional requirements in real-time safety-critical embedded systems call for new design flows that solve the specification, validation, and synthesis problems. Ensuring key properties, such as functional determinism and temporal predictability, has been the main objective of many embedded system design models. Dataflow models of computation (such as KPN, SDF, CSDF, etc.) are widely used to model stream-based embedded systems due to their inherent functional determinism. Since the introduction of the (C)SDF model, a considerable effort has been made to solve the static-periodic scheduling problem. Ensuring boundedness and liveness is the essence of the proposed algorithms in addition to optimizing some nonfunctional performance metrics (e.g. buffer minimization, throughput maximization, etc.). However, nowadays real-time embedded systems are so complex that real-time operating systems are used to manage hardware resources and host real-time tasks. Most of real-time operating systems rely on priority-driven scheduling algorithms (e.g. RM, EDF, etc.) instead of static schedules which are inflexible and difficult to maintain. This thesis addresses the real-time scheduling problem of dataflow graph specifications; i.e. transformation of the dataflow specification to a set of independent real-time tasks w.r.t. a given priority-driven scheduling policy such that the following properties are satisfied: (1) channels are bounded and overflow/underflow-free; (2) the task set is schedulable on a given uniprocessor (or multiprocessor) architecture. This problem requires the synthesis of scheduling parameters (e.g. periods, priorities, processor allocation, etc.) and channel capacities. Furthermore, the thesis considers two performance optimization problems: buffer minimization and throughput maximization.
20

Ordonnancement temps réel dur multiprocesseur tolérant aux fautes appliqué à la robotique mobile / Fault tolerant multiprocessor hard real-time scheduling for mobile robotics

Marouf, Mohamed 01 June 2012 (has links)
Nous nous sommes intéressés dans cette thèse au problème d'ordonnancement temps réel dur multiprocesseur tolérant aux fautes pour des tâches non préemptives périodiques strictes pouvant être combinées avec des tâches préemptives. Nous avons proposé des solutions à ce problème et les avons implantées dans le logiciel SynDEx puis nous les avons testées sur une application de suivi de véhicules électriques CyCabs. Nous avons d'abord présenté un état de l'art sur les systèmes temps réel embarqués et plus précisément sur l'ordonnancement classique monoprocesseur et multiprocesseur de tâches préemptives périodiques. Comme nous nous intéressons aux applications de contrôle/commande temps réel critiques, les traitements de capteurs/actionneurs et les traitements de commande de procédés ne doivent pas avoir de gigue. Pour ces raisons nous avons aussi présenté un état de l'art sur l'ordonnancement des tâches non-préemptives périodiques strictes. Par ailleurs nous avons présenté un état de l'art sur la tolérance aux fautes. Comme nous nous sommes intéressés aux fautes matérielles, nous avons présenté les deux types de redondances : logicielle et matérielle. Les analyses d'ordonnançabilité existantes de tâches non préemptives périodiques strictes dans le cas monoprocesseur ayant de faibles taux de succès d'ordonnancement, nous avons proposé une nouvelle analyse d'ordonnançabilité. Nous avons présenté une stratégie d'ordonnancement qui consiste à ordonnancer une tâche candidate avec un ensemble de tâches déjà ordonnancée. Nous avons utilisé cette stratégie pour ordonnancer des tâches harmoniques et non harmoniques, et nous avons proposé des nouvelles conditions d'ordonnançabilité. Afin d'améliorer le taux de succès d'ordonnancement de tâches non préemptives périodiques strictes, nous avons proposé de garder certaines tâches non préemptives périodiques strictes et d'y ajouter des tâches préemptives périodiques non strictes ne traitant ni les entrées/sorties ni le contrôle/commande. Nous avons ensuite étudié le problème d'ordonnancement multiprocesseur selon une approche partitionnée. Ce problème est résolu en utilisant trois algorithmes. Le premier algorithme effectue une analyse d'ordonnançabilité monoprocesseur et assigne chaque tâche sur éventuellement plusieurs processeurs. Le deuxième algorithme transforme le graphe de tâches dépendantes en un graphe déroulé où chaque tâche est répétée un nombre de fois égal au rapport entre le PPCM des autres périodes et sa période. Le troisième algorithme exploite les résultats des deux algorithmes précédents pour choisir sur quel processeur ordonnancer une tâche et calculer sa date de début d'exécution. Nous avons ensuite proposé d'étendre l'étude d'ordonnançabilité temps réel multiprocesseur précédente pour qu'elle soit tolérante aux fautes de processeurs et de bus de communication. Nous avons proposé un algorithme qui permet de transformer le graphe de tâches dépendantes en y ajoutant des tâches et des dépendances de données répliques et des tâches de sélection permettant de choisir la réplique de tâches allouée à un processeur non fautif. Nous avons étudié séparément les problèmes de tolérance aux fautes pour des processeurs, des bus de communication, et enfin des processeur et des bus de communication. Finalement nous avons étendu les trois algorithmes vus précédemment d'analyse d'ordonnançabilité, de déroulement et d'ordonnancement afin qu'ils soient tolérants aux fautes. Nous avons ensuite présenté les améliorations apportées au logiciel SynDEx tant sur le plan de l'analyse d'ordonnançabilité et l'algorithme d'ordonnancement, que sur le plan de la tolérance aux fautes. Finalement nous avons présenté les travaux expérimentaux concernant l'application de suivi de CyCabs. Nous avons modifié l'architecture des CyCabs en y intégrant des microcontrôleurs dsPICs et nous avons testé la tolérance aux fautes de dsPICs et du bus CAN sur une application de suivi de CyCab. / In this thesis, we studied the fault-tolerant multiprocessor hard real-time scheduling of non-preemptive strict periodic tasks which could be combined with preemptive tasks. We proposed solutions that we implemented into the SynDEx software, then we tested these solutions on an electric vehicle following. First, we present a state of the art on real-time embedded systems and more specificaly on the classical uniprocesseur and multiprocessor scheduling of preemptive periodic tasks. Since we were interested in critical real-time control applications, sensor/actuators computations and processes control must not have jitter. For these reasons, we also presented a state of the art of the scheduling of non-preemptive strict periodic tasks. Also, we presented a state of the art on fault-tolerance. As we were interested in hardware faults, we presented two types of redundancies: software and hardware. Presently, existing schedulability analyses of non-preemptive strict periodic tasks have low schedulability success ratios, thus we proposed a new schedulability analysis. We first presented a scheduling strategy which consists in scheduling a candidate task whereas a task set is already scheduled. We used this strategy to solve the problem of scheduling harmonic and non-harmonic tasks, and we proposed new schedulability conditions. In order to improve the scheduling success ratio of non-preemptive strict periodic tasks, we proposed to keep some non preemptive strict periodic tasks and to add preemptive periodic tasks which are neither dedicated to input/output nor to control. Then, we studied the multiprocessor scheduling problem using the partitioned approach. In order to solve this problem we proposed three algorithms. The first algorithm performs a uniprocessor schedulability analysis and assigns each task according to a schedulability condition to possibly several processors. The second algorithm transforms the dependent task graph into an unrolled graph where each task is repeated a number of times equal to the ratio between the LCM of all tasks periods and its period. The third algorithm exploits the two precedent algorithms to choose, with a cost function, on which processor it will schedule a task previously assigned to several processors, and it computes the first start times of each task. Then, we extended the multiprocessor schedulability analysis to be tolerant to processor and bus media faults. We proposed an algorithm which transforms the dependent task graph by adding redundant tasks, redundant dependencies, and selecting tasks. The latter allow to choose the redundant task allocated to non faulty processors. We studied separately the processor fault-tolerance problem, the bus fault-tolerant problem, and finally both processor and bus fault-tolerant problem. Finally, we extended the schedulability analysis algorithms, the unrolling algorithm and the scheduling algorithm to be fault-tolerant. Then, we presented the improvements provided to the SynDEx software for the schedulability analysis algorithm, the scheduling algorithm and the fault-tolerance algorithm. Finally, we conducted some experiments on the electric vehicle following called CyCab. We modified the hardware architecture of the CyCab to integrate dsPICs microcontrolers, and we tested dsPICs and CAN buses fault-tolerant on the CyCabs following.

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