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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
51

X-band High Power Ferrite Phase Shifters

Altan, Hakki Ilhan 01 October 2010 (has links) (PDF)
Ferrite phase shifters are key components of passive phased array antenna systems. In a modern radar system, microwave components in the transmit path should handle high microwave power levels. Also low loss operation in phase shifters is critical, since radar range depends on the microwave power transmitted from the antennas. In this respect, ferrite phase shifters provide required performance characteristics for phased array radar systems. In this thesis, Reggia-Spencer type and twin-toroid type ferrite phase shifters operating at X-Band are designed, simulated, fabricated and measured. Measurements of the fabricated ferrite phase shifters are compared with simulation results. Electromagnetic simulations are performed using CST.
52

Hochfrequenzschaltungen zur Einstellung von Amplitude und Phase

Mayer, Uwe 04 June 2012 (has links) (PDF)
Die vorliegende Arbeit ist der analytischen Untersuchung und Weiterentwicklung von Methoden und Schaltungen zur Einstellung der Signalphase und -amplitude gewidmet. Hierbei wird zum Ziel gesetzt, die Leistungsfähigkeit dieser Schaltungen als analoge Hochfrequenz-Baugruppen in Empfangs- und Sendeschaltkreisen mit einem vergleichbaren oder geringerem schaltungstechnischen Aufwand und Strombedarf zu verbessern und dies anhand von Implementierungsbeispielen zu bestätigen. Die Dämpfungsglied-Topologien , T, überbrücktes T und X werden modelliert und hinsichtlich der Phasenbeeinflussung analysiert, sodass eine Bewertung ihrer Eignung durchgeführt werden kann. Weiterhin wird ein innovativer Ansatz zur Linearisierung der Steuerkennlinie vorgestellt und mit Hilfe einer Beispielschaltung mit einem Phasenfehler von 3 ° und einem Steuerlinearitätsfehler von 0,35 dB innerhalb der 1 dB Grenzfrequenz und einem Steuerbereich von 20 dB nachgewiesen. Die Arbeit bietet darüber hinaus eine analytische Betrachtung zu aktiven steuerbaren Verstärkern, welche die besondere Eignung der Gilbert-Zelle aufzeigt und eine geeignete Ansteuerschaltung ableitet. Am Beispiel nach diesem Prinzip entworfener Schaltkreise werden Phasenfehler von nur 0,4 ° innerhalb eines besonders hohen Stellbereichs von 36 dB demonstriert, wodurch eine Vergrößerung des Stellbereichs um den Faktor 4 und eine Verbesserung des Phasenfehlers um den Faktor 2 im Vergleich zum Stand der Technik erreicht wurde. Es wird der Zirkulator-Phasenschieber maßgeblich durch eine neuartige geeignete Ansteuerung verbessert. Damit werden die sonst für die Amplitudenbeeinflussung im Wesentlichen verantwortlichen Varaktoren überflüssig, ohne dabei den schaltungstechnischen Aufwand zu erhöhen. Eine Messung der entsprechenden Schaltung bestätigt dies mit einem Amplitudenfehler von nur 0,9 dB für einen Phasenstellbereich von 360 °, was einer Verringerung des Fehlers um den Faktor 3 im Vergleich zu herkömmlichen Zirkulator-Phasenschiebern entspricht. Abschließend wird der Funktionsnachweis mehrerer entworfener Vektor-Modulatoren mit einer effektiven Genauigkeit von bis zu 6 bit in Einzelschaltungen, Hybridaufbauten und schließlich im Rahmen eines vollständig integrierten Empfängerschaltkreises erbracht. Dieser erzielt eine Verdopplung der Reichweite bei einer um nur 35% höheren Leistungsaufnahme gegenüber einem herkömmlichen Kommunikationsverfahren (SISO). / The present work is dedicated to the investigation and enhancement of amplitude and phase control methods and circuits. The aim is to enhance the performance of these circuits in modern radio frequency transceivers with a comparable or even lower effort and power consumption. A prove of concept will be delivered with implementation examples. By means of models of the passive attenuator topologies , T, bridged-T and X, a thorough analysis is performed in order to compare them regarding their impact on the signal phase. Additionally, a novel approach to increase the control linearity of the attenuators is proposed and verified by measurements, showing a phase error of 3 ° and a control linearity error of 0,35 dB at the 1 dB corner frequency, successfully. The work also presents an investigation on variable gain amplifiers and reveals the superior performance of the Gilbert cell with respect to low phase variations. A cascode biasing circuit that supports these properties is proposed. Measurements prove this concept with relative phase errors of 0,4 ° over a wide attenuation control range of 36 dB thus cutting the error by half in a four times wider control range. The circulator based phase shifting approach is chosen and improved significantly by means of tuning the transconductor instead of the varactors thus removing their impact on signal amplitude. The approach is supported by measurements yielding an amplitude error of only 0,9 dB within a phase control range of 360 ° which corresponds to an improvement by a factor of three compared to recent circulator phase shifters. Finally, the design of several vector modulator topologies is shown with hardware examples of single chips, hybrid printed circuit boards and highly integrated system level ICs demonstrating a full receiver. By using improved variable gain amplifiers, an effective vector modulator resolution of 6 bit without calibration is achieved. Furthermore, a multiple-input multiple-output system is demonstrated that doubles the coverage range of common SISO systems with only 35% of additional power consumption.
53

Voltage scaling interfaces for multi-voltage digital systems / Interfaces de escalonamento de tensão para sistemas digitais de multiplas tensões

Llanos, Roger Vicente Caputo January 2015 (has links)
Os Sistemas Digitais de Múltiplas Tensões exploram o conceito de dimensionamento da tensão de alimentação através da aplicação de diferentes fontes para regiões específicas do chip. Cada uma destas regiões pertence a um domínio de energia e pode ter duas ou mais configurações de voltagens. Independentemente dos distintos níveis de energia em diferentes domínios de tensão, os blocos devem processar sinais com níveis lógicos coerentes. Nestes sistemas, os Conversores de Nível (LS do inglês Level Shifters) são componentes essenciais que atuam como interfaces de escalonamento da tensão entre domínios de energia, garantindo a correta transmissão dos sinais. Com a apropriada interface de escalonamento de tensão e sua correta implementação, pode-se evitar o consumo excessivo de potência dinâmica e estática. Portanto, a concepção e implementação de conversores de nível deve ser um processo consciente que garanta o menor sobrecusto no tamanho, consumo de energia, e tempo de atraso. Neste trabalho estudam-se as principais características das interfaces de escalonamento de tensão e se introduce um conversor de tensão com eficiência energética e área reduzida, adequado para a conversão de baixo a alto nível. Apresentam-se os conversores de nível com o melhor desempenho encontrados na literatura, os quais são categorizados em dois principais grupos: Dois trilhos (Dual-rail) e Único trilho (Single-rail), de acordo ao número de linhas de alimentação necessárias. O circuito proposto foi comparado com a topologia tradicional de cada grupo, o Differential Cascode Voltage Switch (DCVS) e o conversor de Puri respectivamente. Simulações na tecnologia CMOS 130nm da IBMTM mostram que a topologia proposta requer até 93,79% menos energia em determinadas condições. Esta apresentou 88,03% menor atraso e uma redução de 39,6% no Produto Potência-Atraso (PDP), quando comparada com a topologia DCVS. Em contraste com o conversor Puri, obteve-se uma redução de 32,08% no consumo de energia, 13,26% diminuição no atraso e 15,37% inferior PDP. Além disso, o conversor de nível proposto foi o único capaz de trabalhar a 35% da tensão nominal de alimentação. / Multiple Voltage Digital Systems exploit the concept of voltage scaling by applying different supplies to particular regions of the chip. Each of those regions belongs to a power domain and may have two or more supply voltage configurations. Regardless of distinct energy levels on different power domains, the blocks shall process signals with coherent logic levels. In these systems, the Level Shifters (LS) are essential components that act as voltage scaling interfaces between power domains, guaranteeing the correct signal transmission. With the appropriate voltage scaling interface and its proper implementation, we can avoid excessive static and dynamic power consumption. Therefore, the design and implementation of level shifters should be a conscientious process and must guarantee the lowest overhead in size, energy consumption, and delay time. In this work, we study the main characteristics of voltage scaling interfaces and introduce an energy-efficient level shifter with reduced area, and suitable for low-to-high level conversion. We present the level shifters with the best performance that we found in the literature and categorize them into two main groups: Dual-rail and Single-rail, according to the number of power rails required. The proposed circuit was compared to the traditional topology of each group, Differential Cascode Voltage Switch (DCVS) and Puri’s level shifter respectively. Simulations on an IBMTM 130nm CMOS technology show that the proposed topology requires up to 93.79% less energy under certain conditions. It presented 88.03% smaller delay and 39.6% less Power-Delay Product (PDP) when compared to the DCVS topology. In contrast with the Puri’s level shifter, we obtained a reduction of 32.08% in power consumption, 13.26% smaller delay and 15.37% lower PDP. Besides, our level shifter was the only one capable of working at 35% of the nominal supply voltage.
54

Applications of Kinetic Inductance: Parametric Amplifier & Phase Shifter, 2DEG Coupled Co-planar Structures & Microstrip to Slotline Transition at RF Frequencies

January 2016 (has links)
abstract: Kinetic inductance springs from the inertia of charged mobile carriers in alternating electric fields and it is fundamentally different from the magnetic inductance which is only a geometry dependent property. The magnetic inductance is proportional to the volume occupied by the electric and magnetic fields and is often limited by the number of turns of the coil. Kinetic inductance on the other hand is inversely proportional to the density of electrons or holes that exert inertia, the unit mass of the charge carriers and the momentum relaxation time of these charge carriers, all of which can be varied merely by modifying the material properties. Highly sensitive and broadband signal amplifiers often broaden the field of study in astrophysics. Quantum-noise limited travelling wave kinetic inductance parametric amplifiers offer a noise figure of around 0.5 K ± 0.3 K as compared to 20 K in HEMT signal amplifiers and can be designed to operate to cover the entire W-band (75 GHz – 115 GHz).The research cumulating to this thesis involves applying and exploiting kinetic inductance properties in designing a W-band orthogonal mode transducer, quadratic gain phase shifter with a gain of ~49 dB over a meter of microstrip transmission line. The phase shifter will help in measuring the maximum amount of phase shift ∆ϕ_max (I) that can be obtained from half a meter transmission line which helps in predicting the gain of a travelling wave parametric amplifier. In another project, a microstrip to slot line transition is designed and optimized to operate at 150 GHz and 220 GHz frequencies, that is used as a part of horn antenna coupled microwave kinetic inductance detector proposed to operate from 138 GHz to 250 GHz. In the final project, kinetic inductance in a 2D electron gas (2DEG) is explored by design, simulation, fabrication and experimentation. A transmission line model of a 2DEG proposed by Burke (1999), is simulated and verified experimentally by fabricating a capacitvely coupled 2DEG mesa structure. Low temperature experiments were done at 77 K and 10 K with photo-doping the 2DEG. A circuit model of a 2DEG coupled co-planar waveguide model is also proposed and simulated. / Dissertation/Thesis / Masters Thesis Electrical Engineering 2016
55

Voltage scaling interfaces for multi-voltage digital systems / Interfaces de escalonamento de tensão para sistemas digitais de multiplas tensões

Llanos, Roger Vicente Caputo January 2015 (has links)
Os Sistemas Digitais de Múltiplas Tensões exploram o conceito de dimensionamento da tensão de alimentação através da aplicação de diferentes fontes para regiões específicas do chip. Cada uma destas regiões pertence a um domínio de energia e pode ter duas ou mais configurações de voltagens. Independentemente dos distintos níveis de energia em diferentes domínios de tensão, os blocos devem processar sinais com níveis lógicos coerentes. Nestes sistemas, os Conversores de Nível (LS do inglês Level Shifters) são componentes essenciais que atuam como interfaces de escalonamento da tensão entre domínios de energia, garantindo a correta transmissão dos sinais. Com a apropriada interface de escalonamento de tensão e sua correta implementação, pode-se evitar o consumo excessivo de potência dinâmica e estática. Portanto, a concepção e implementação de conversores de nível deve ser um processo consciente que garanta o menor sobrecusto no tamanho, consumo de energia, e tempo de atraso. Neste trabalho estudam-se as principais características das interfaces de escalonamento de tensão e se introduce um conversor de tensão com eficiência energética e área reduzida, adequado para a conversão de baixo a alto nível. Apresentam-se os conversores de nível com o melhor desempenho encontrados na literatura, os quais são categorizados em dois principais grupos: Dois trilhos (Dual-rail) e Único trilho (Single-rail), de acordo ao número de linhas de alimentação necessárias. O circuito proposto foi comparado com a topologia tradicional de cada grupo, o Differential Cascode Voltage Switch (DCVS) e o conversor de Puri respectivamente. Simulações na tecnologia CMOS 130nm da IBMTM mostram que a topologia proposta requer até 93,79% menos energia em determinadas condições. Esta apresentou 88,03% menor atraso e uma redução de 39,6% no Produto Potência-Atraso (PDP), quando comparada com a topologia DCVS. Em contraste com o conversor Puri, obteve-se uma redução de 32,08% no consumo de energia, 13,26% diminuição no atraso e 15,37% inferior PDP. Além disso, o conversor de nível proposto foi o único capaz de trabalhar a 35% da tensão nominal de alimentação. / Multiple Voltage Digital Systems exploit the concept of voltage scaling by applying different supplies to particular regions of the chip. Each of those regions belongs to a power domain and may have two or more supply voltage configurations. Regardless of distinct energy levels on different power domains, the blocks shall process signals with coherent logic levels. In these systems, the Level Shifters (LS) are essential components that act as voltage scaling interfaces between power domains, guaranteeing the correct signal transmission. With the appropriate voltage scaling interface and its proper implementation, we can avoid excessive static and dynamic power consumption. Therefore, the design and implementation of level shifters should be a conscientious process and must guarantee the lowest overhead in size, energy consumption, and delay time. In this work, we study the main characteristics of voltage scaling interfaces and introduce an energy-efficient level shifter with reduced area, and suitable for low-to-high level conversion. We present the level shifters with the best performance that we found in the literature and categorize them into two main groups: Dual-rail and Single-rail, according to the number of power rails required. The proposed circuit was compared to the traditional topology of each group, Differential Cascode Voltage Switch (DCVS) and Puri’s level shifter respectively. Simulations on an IBMTM 130nm CMOS technology show that the proposed topology requires up to 93.79% less energy under certain conditions. It presented 88.03% smaller delay and 39.6% less Power-Delay Product (PDP) when compared to the DCVS topology. In contrast with the Puri’s level shifter, we obtained a reduction of 32.08% in power consumption, 13.26% smaller delay and 15.37% lower PDP. Besides, our level shifter was the only one capable of working at 35% of the nominal supply voltage.
56

Desenvolvimento de defasadores baseados em MEMS e linhas de transmissão de ondas lentas para aplicações em 60 GHz. / Development of phase shifters based on shielded CPW and MEMS for 60 GHz.

Franz Sebastian Bedoya Llano 28 November 2017 (has links)
Este trabalho, desenvolvido junto ao Grupo de Novos Materiais e Dispositivos (GNMD) pertencente ao Laboratório de Microeletrônica (LME) da Universidade de São Paulo, apresenta a modelagem de um defasador passivo miniaturizado com baixas perdas para aplicações em ondas milimétricas (mmW-milimeter waves). Este defasador é baseado em um conceito inovador utilizando sistemas micro-eletromecânicos (MEMS) distribuídos e linhas de transmissão coplanares de ondas lentas. Este conceito é proposto no projeto Jovem Pesquisador FAPESP (Processo no. 2011/18167-3), ao qual este projeto está vinculado. A defasagem neste tipo de dispositivo é conseguida pela liberação das fitas da camada de blindagem de uma linha de transmissão tipo S-CPW (Shielded-Coplanar Waveguide). As fitas liberadas podem ser movimentadas eletrostaticamente, o que praticamente não consome energia. Este projeto pretende projetar um defasador para fabricação com a tecnologia do Laboratório de Microeletrônica da Escola Politécnica da Universidade de São Paulo. Adicionalmente, este trabalho apresenta resultados experimentais de um processo de fabricação IN-HOUSE baseado na metodologia de integração por flip-chip. A tecnologia de integração implementada é baseada na soldagem de um chip sobre um substrato, no qual são construídos uma nova geração de pilares de cobre finos, cujo espaçamento entre pilares é menor que 100 ?m. Essa redução nas dimensões pode ser usada com a nova geração de dispositivos de comunicações na faixa das mmW. Em termos de fabricação, foram obtidos pilares de cobre altamente miniaturizados com uma altura significativa e uniforme que permite a integração com o chip. Além do mais, os resultados obtidos representam avanços significativos no processo de fabricação que será usado como tecnologia de integração híbrida em um interposer baseado em substrato de alumina nanoporosa (MnM-Metallic Nanowire Membrane). Esse interposer desempenha um papel indispensável no GNMD, já que atualmente estão sendo estudadas suas propriedades elétricas e já foram construídos dispositivos sobre o substrato com resultados promissores. / This work, performed at the New Materials and Devices Group (GNMD) of the Microelectronics Laboratory of the Polytechnic School of the University of São Paulo, presents the modeling of a miniaturized passive phase shifter with low losses for applications in millimeter waves. It is based on an innovated concept, which uses distributed MEMS phase shifters and slow-wave coplanar wave guides. Such concept is proposed under the FAPESP Youth Researcher project (Process number 2011/18167-3). The phase shifter on this kind of device is achieved by releasing the shielding layer of the Shielded-Coplanar Waveguide. The released ribbons are electrostatically displaced, which does not consume energy. The aim of this project is to design a phase shifter for fabrication with the technology available at the Microelectronics Laboratory. Additionally, this work presents experimental results of a flip-chip fabrication process. This technology is based on next generation of fine pitch copper pillar bumping, with pillar pitch of less than 100 ?m that support next generation of communication devices at the millimeter wave frequency range. From the fabrication point-of-view, highly miniaturized copper pillars with appropriate thicknesses were obtained. Furthermore, the results obtained represent a significant advance in the fabrication process that will be used as a hybrid integration technology on an interposer based on a nanoporous alumina substrate (MnM-Metallic Nanowire Membrane).
57

Conception et validation de déphaseurs large bande intégrant des MEMS-RF dans un environnement hostile / Design and validation of wide band phase shifters based on MEMS-RF in harsh environments

Harck, Alexandre 07 November 2014 (has links)
Ces travaux de recherches s’inscrivent dans le cadre d’une amélioration du bilan de liaison des données de télémesures sur les lanceurs spatiaux. Pour cela, un dispositif d’antenne à pointage électronique a été choisi. Celui-ci utilise un réseau de quatre antennes patchs alimentés par un prototype composé d’un diviseur de puissance 1 vers 4 et de quatre déphaseurs. Les états de phases choisis pour chacun des déphaseurs sont 0°, 90° et 180°. Après une étude bibliographique, les meilleurs déphaseurs pouvant assurer cette fonction sont les déphaseurs à base de coupleur hybride. Grâce à l’utilisation de MEMS-RF dans ces circuits, il est n’est pas nécessaire de rajouter des amplificateurs de puissance, car ces composants sont faibles pertes RF et linéaires. Plusieurs topologies de déphaseurs à base de coupleur hybride utilisant ces commutateurs ont été étudiés. D’après cette étude, il a été possible de réduire la taille des circuits sans détériorer les performances RF, ce qui nous a permis d’en choisir deux d’entre eux. Un commande à distance est nécessaire pour ces dispositifs alors une boîte à relais a été choisie pour assurer ce rôle. Le premier prototype est composé d’un diviseur de puissance qui a été commandé et de quatre déphaseurs fabriqués. Le deuxième prototype est entièrement intégré sur puce, ce qui a permis de réduire la surface du dispositif ainsi que d’améliorer les pertes RF. Ces travaux ont donc pu montrer la faisabilité de fabriquer un prototype simple, faible pertes, et linéaire. / These research works is within the context of an improved link budget telemetry data on space launchers. For this device, an electronically steerable antenna was chosen. It uses an array of four patch antennas supplied by a prototype composed of a power splitter 1 to 4 and four phase shifters. For each selected phase shifters, the phase states are 0 °, 90 ° and 180 °.After a bibliographical study, the best phase shifters that can perform this function are the shifters based on hybrid coupler. Thanks to the use of RF-MEMS in these circuits, it is not necessary to add power amplifiers because these components are linear and present low RF losses. Several topologies of phase shifters based on hybrid coupler using RF-MEMS were studied. According to this study, it was possible to reduce the size of circuits without damaging the RF performance, which allowed us to choose two of them. A remote control is needed for these devices to relay box then was chosen for this role. The first prototype consists of a power divider which was commissioned and produced phase shifters. The second prototype is fully integrated on-chip, which has reduced the device surface and improves the RF losses.These studies were able to demonstrate the feasibility to produce a simple linear prototype with low RF losses.
58

Nouvelles antennes pourr radar millimétriques / New antenna for millimetre wave radar

Bin Zawawi, Muhammad Nazrol 24 April 2015 (has links)
L’objectif de cette thèse est de concevoir un réseau réflecteur à dépointage électronique à 20 GHz pour des applications de communication avec des drones (Unmanned Aerial System). Le principe de fonctionnement des réseaux réflecteurs est similaire à celui d’une antenne parabolique. La principale différence concerne la forme du réflecteur. En effet les panneaux des réseaux réflecteurs sont plans contrairement à la parabole. Le panneau réflecteur se compose de cellules élémentaires qui sont utilisées pour contrôler la phase réfléchie de l’onde d’incidente. Le contrôle de la phase au niveau de la cellule élémentaire nous permet de focaliser le diagramme de rayonnement dans la direction souhaitée. Dans cette thèse, la solution retenue est l’utilisation de diodes PIN. Cette dernière a fait l’objet de nombreuses études que ce soit au niveau laboratoire mais également industriel et possède des atouts intéressant en terme de performance et de coût. L'étude montre que d'avoir un niveau de correction élevée ne garantit pas la meilleure performance parce qu'il faut aussi considérer les pertes dans l'élément actif lui-même (dans notre cas, il s’agit des pertes dans les diodes PIN). Dans l’avenir, il serait nécessaire de modifier la position de la diode afin de rendre la fabrication plus aisée. Dans ce cas il faudra retravailler sur les lignes de polarisation et aussi les géométries du stub et des vias. Il sera peut-être nécessaire de déplacer la diode à l'extérieur du substrat en face l'arrière de la cellule par exemple. Quand les réseaux réflecteurs seront fabriqués, ils pourront être directement testés avec le contrôleur de diode fabriqué. / The objective of this project is to design and fabricate a reconfigurable reflectarray with beam scanning capability at 20 GHz for unmanned aerial system (UAS) communication link. Reflectarray is a type of antenna that shares similar functionality to parabolic reflector antenna. The main difference is the physical and geometry appearance of the antenna where reflectarray has flat reflecting panel instead of parabolic reflector. The reflecting panel consists of elementary cell, which is used to control the reflected phase of the incident wave. By controlling the reflected phase on each elementary cell, the radiation pattern of the antenna can be focused to any desired direction. PIN diode technology is chosen as the preferred solution in the context of this project because it is already proven working in the industry and research fields. In house reflectarray simulator has been developed from the simulation, having high correction order will not necessarily improve the performance because the loss inside in active element must also be considered. In the short-term period, the modification on the elementary cell diode polarization line will enable the reflectarray to be fabricated and measured because the current design cannot be fabricated by the manufacturer contrary to their first statement due to position of the diode in the middle of substrates. The modification requires the p-i-n diode to be moved at the backside of the elementary cell and some geometry adjustments are needed for the phase delay line and the via. Once the reflectarray is fabricated, it can be tested directly with the diode controller that is already validated and shown to be working well.
59

Разработка компактного дискретного фазовращателя ДМВ-диапазона : магистерская диссертация / Development of a compact discrete phase shifter for the UHF range

Овчинников, Е. Ю., Ovchinnikov, E. Y. January 2021 (has links)
Объектом исследования является дискретный фазовращатель ДМВ диапазона. Цель работы - разработка фазовращателя с требуемыми в техническом задании параметрами. В процессе работы был рассчитан и смоделирован фазовращатель в среде проектирования «АWR Design Environment», разработана электрическая принципиальная схема и перечень элементов, создан макет устройства и проведены его измерения. Моделирование ФВ проводилось с применением методов электромагнитного анализа и использованием в качестве основных активных элементов их S-параметров и Spice-моделей. В результате проведенной работы был создан макет фазовращателя с требуемыми параметрами. Результаты работы будут применены при создании фазированной антенной решетки метеорологического радиолокатора. / The object of the research is a discrete phase shifter of the UHF range. The purpose of the work is to develop a phase shifter with the parameters required in the technical specification. In the process of work, the phase shifter was calculated and modeled in the AWR Design Environment, an electrical schematic diagram and a list of elements were developed, a device model was created and its measurements were carried out. PV modeling was carried out using the methods of electromagnetic analysis and using their S-parameters and Spice-models as the main active elements. As a result of the work carried out, a prototype of a phase shifter with the required parameters was created. The results of the work will be used to create a phased array of a meteorological radar.
60

Design and modelling of beam steering antenna array for mobile and wireless applications using optimisation algorithms : simulation and measrement of switch and phase shifter for beam steering antenna array by applying reactive loading and time modulated switching techniques, optimised using genetic algorithms and particle swarm methods

Abusitta, Musa M. January 2012 (has links)
The objectives of this work were to investigate, design and implement beam steering antenna arrays for mobile and wireless applications using the genetic algorithm (GA) and particle swarm optimisation (PSO) techniques as optimisation design tools. Several antenna designs were implemented and tested: initially, a printed dipole antenna integrated with a duplex RF switch used for mobile base station antenna beam steering was investigated. A coplanar waveguide (CPW) to coplanar strip (CPS) transition was adopted to feed the printed dipole. A novel RF switch circuit, used to control the RF signal fed to the dipole antenna and placed directly before it, was proposed. The measured performance of the RF switch was tested and the results confirmed its viability. Then two hybrid coupled PIN diode phase shifters, using Branchline and Rat-Race ring coupler structures, were designed and tested. The generation of four distinct phase shifts was implemented and studied. The variations of the scattering parameters were found to be realistic, with an acceptable ±2 phase shift tolerance. Next, antenna beam steering was achieved by implementing RF switches with ON or OFF mode functions to excite the radiating elements of the antenna array. The switching control process was implemented using a genetic algorithm (GA) method, subject to scalar and binary genes. Anti-phase feeding of radiating elements was also investigated. A ring antenna array with reflectors was modelled and analysed. An antenna of this type for mobile base stations was designed and simulation results are presented. Following this, a novel concept for simple beam steering using a uniform antenna array operated at 2.4 GHz was designed using GA. The antenna is fed by a single RF input source and the steering elements are reactively tuned by varactor diodes in series with small inductors. The beam-control procedure was derived through the use of a genetic algorithm based on adjusting the required reactance values to obtain the optimum solution as indicated by the cost function. The GA was also initially used as an optimisation tool to derive the antenna design from its specification. Finally, reactive loading and time modulated switching techniques are applied to steer the beam of a circular uniformly spaced antenna array having a source element at its centre. Genetic algorithm (GA) and particle swarm optimisation (PSO) processes calculate the optimal values of reactances loading the parasitic elements, for which the gain can be optimised in a desired direction. For time modulated switching, GA and PSO also determine the optimal on and off times of the parasitic elements for which the difference in currents induced optimises the gain and steering of the beam in a desired direction. These methods were demonstrated by investigating a vertically polarised antenna configuration. A prototype antenna was constructed and experimental results compared with the simulations. Results showed that near optimal solutions for gain optimisation, sidelobe level reduction and beam steering are achievable by utilising these methods. In addition, a simple switching process is employed to steer the beam of a horizontally polarised circular antenna array. A time modulated switching process is applied through Genetic Algorithm optimisation. Several model examples illustrate the radiation beams and the switching time process of each element in the array.

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