I investigated life history traits and secondary production of populations of Goniobasis proxima in four streams from July 2005 to June 2006. Measurements of canopy cover, conductivity, alkalinity, temperature, and nitrate-nitrogen (NO3-N), as well as snail size, density, and occupied substrate were taken monthly for each stream. Snail growth rates were determined in an aquarium for 10 size classes and secondary production was estimated as the summed product of size class growth rates and field biomass measurements. Size class production estimates tracked biomass with intermediate to larger sized snails dominating production, despite smaller snails growing faster. Production estimates across streams ranged from 1,400 mg m-2 yr-1 to 22,183 mg m-2 yr-1 with noticeable summer highs and winter lows. Annual turnover was slow (0.43-0.49) owing to slow growth and long development time. Snails preferred leaves/wood as a substrate to occupy over rock and sand and showed no appreciable grazing effect on the epilithon community. / Master of Science

This study focuses on the ability, or inability, to replicate or compare the design of text-related research from the perspective of the independent or dependent variables employed in such designs. Prior text-related research has used variables that were not clearly described or defined, could not be directly compared from one study or time period to the next, or were applied inappropriately. Measurements of typography-related and substrate-related variables may have absolute or relative values, and confusion can arise if the variables are not clearly identified and defined. The study is an integrative review with mixed methods research design investigating 44 books and two websites (part 1), and 83 journal articles and four theses/dissertations (part 2). The integrative review shows that the sources investigated present neither essential information on typographic and substrate characteristics nor consistent definitions of legibility and readability in order to allow comparable replication from one study to another. Findings are displayed in Chapter 4. Discussion and the related details are presented in Chapter 5. / PHD

Poças de maré são depressões ou cavidades do substrato do entre-marés, formadas tanto em costões rochosos quanto em planícies de maré durante maré baixa. Estudos comparando a ictiofauna de poças arenosas de planícies de maré e de poças rochosas são inexistentes, sendo o presente estudo o primeiro a ser desenvolvido neste âmbito, a fim de colocar em pauta a relevância de poças arenosas para a ecologia e conservação de áreas costeiras. Nossos objetivos neste estudo foram (I) realizar o levantamento das espécies de peixes presentes em poças de maré arenosas e rochosas em uma enseada subtropical, a Baía do Araçá (São Paulo/Brasil); (II) comparar a composição e abundância da ictiofauna entre poças arenosas e rochosas; e (III) identificar quais e como os fatores ambientais estão relacionados à composição e abundância da ictiofauna dessas poças. A estrutura da ictiofauna (composição e abundância de espécies) e fatores ambientais (área, profundidade, salinidade, temperatura, oxigênio dissolvido, porcentagem de cobertura algal e distância das poças até o canal) foram analisados a partir de quatro campanhas realizadas durante 2014. Nas poças arenosas, a ictiofauna foi amostrada utilizando redes de mão, solução de eugenol e picaré seguindo um protocolo de amostragem especialmente desenvolvido para essa categoria de poça; nas poças rochosas, utilizamos eugenol e redes de mão. Verificamos que as poças arenosas foram maiores, mais rasas e mais distantes do canal, sendo estes os fatores ambientais que mais distinguem os dois tipos de poça. A composição e abundância de espécies diferiram entre os tipos de poça e ao longo do ano, sendo em arenosas Gerreidae e Gobiidae as principais famílias e em rochosas Gobiidae e Blenniidae. Os fatores ambientais que estruturaram a ictiofauna em cada tipo de poça foram: nas arenosas, a área, profundidade, cobertura algal e distância até o canal; e nas rochosas, temperatura, oxigênio dissolvido e distância do canal. Além do enfoque que vem sendo dado à ictiofauna de poças rochosas, enfatizamos a importância de estudar aquela de poças arenosas por sua elevada riqueza e abundância em espécies, incluindo larvas de diversas famílias. / Tide pools are depressions or cavities of the intertidal substrate formed in both rocky shores and tidal flats during low tide. Studies on fish populations conducted at sandy pools in tidal flats and their comparison with rock pools do not exist. This study is the first one dealing with such questions, emphasizing the relevance of sandy pools for the ecology and conservation of coastal areas. The objectives of this study were (I) to carry out a survey of fish species in sandy and rocky tide pools in a subtropical bay, the Aracá Bay (São Paulo/Brazil); (II) to compare the composition and abundance of fish fauna between sandy and rocky pools; and (III) to investigate which and how environmental factors are related to the composition and distribution of fish fauna of these pools. The structure of fish populations (composition and abundance of species) and environmental factors (area, depth, salinity, temperature, dissolved oxygen, algal coverage percentage and distance from the pools to the channel) were carried out in four campaigns during 2014. In sandy pools, the fish fauna was sampled using hand nets, eugenol and beach seine, following a sampling protocol specially developed for that purpose; in rocky pools, we used eugenol and hand nets. The sandy pools were larger, shallower and farther from the channel, than the rocky ones. The composition and abundance of fish species differed between the types of pools and throughout the year: Gerreidae and Gobiidae were the main families in the sandy pools and Gobiidae and Blenniidae in the rocky ones. The environmental factors that structured the fish fauna in each type of pool were: in sandy area, depth, algal coverage and distance to the channel; in rocky pools, temperature, dissolved oxygen and channel distance. In contrast to the focus that has been given for rocky pools, we emphasize the importance of sandy pools studies because its great richness and abundance of species, including larvae of many families.

Poças de maré são depressões ou cavidades do substrato do entre-marés, formadas tanto em costões rochosos quanto em planícies de maré durante maré baixa. Estudos comparando a ictiofauna de poças arenosas de planícies de maré e de poças rochosas são inexistentes, sendo o presente estudo o primeiro a ser desenvolvido neste âmbito, a fim de colocar em pauta a relevância de poças arenosas para a ecologia e conservação de áreas costeiras. Nossos objetivos neste estudo foram (I) realizar o levantamento das espécies de peixes presentes em poças de maré arenosas e rochosas em uma enseada subtropical, a Baía do Araçá (São Paulo/Brasil); (II) comparar a composição e abundância da ictiofauna entre poças arenosas e rochosas; e (III) identificar quais e como os fatores ambientais estão relacionados à composição e abundância da ictiofauna dessas poças. A estrutura da ictiofauna (composição e abundância de espécies) e fatores ambientais (área, profundidade, salinidade, temperatura, oxigênio dissolvido, porcentagem de cobertura algal e distância das poças até o canal) foram analisados a partir de quatro campanhas realizadas durante 2014. Nas poças arenosas, a ictiofauna foi amostrada utilizando redes de mão, solução de eugenol e picaré seguindo um protocolo de amostragem especialmente desenvolvido para essa categoria de poça; nas poças rochosas, utilizamos eugenol e redes de mão. Verificamos que as poças arenosas foram maiores, mais rasas e mais distantes do canal, sendo estes os fatores ambientais que mais distinguem os dois tipos de poça. A composição e abundância de espécies diferiram entre os tipos de poça e ao longo do ano, sendo em arenosas Gerreidae e Gobiidae as principais famílias e em rochosas Gobiidae e Blenniidae. Os fatores ambientais que estruturaram a ictiofauna em cada tipo de poça foram: nas arenosas, a área, profundidade, cobertura algal e distância até o canal; e nas rochosas, temperatura, oxigênio dissolvido e distância do canal. Além do enfoque que vem sendo dado à ictiofauna de poças rochosas, enfatizamos a importância de estudar aquela de poças arenosas por sua elevada riqueza e abundância em espécies, incluindo larvas de diversas famílias. / Tide pools are depressions or cavities of the intertidal substrate formed in both rocky shores and tidal flats during low tide. Studies on fish populations conducted at sandy pools in tidal flats and their comparison with rock pools do not exist. This study is the first one dealing with such questions, emphasizing the relevance of sandy pools for the ecology and conservation of coastal areas. The objectives of this study were (I) to carry out a survey of fish species in sandy and rocky tide pools in a subtropical bay, the Aracá Bay (São Paulo/Brazil); (II) to compare the composition and abundance of fish fauna between sandy and rocky pools; and (III) to investigate which and how environmental factors are related to the composition and distribution of fish fauna of these pools. The structure of fish populations (composition and abundance of species) and environmental factors (area, depth, salinity, temperature, dissolved oxygen, algal coverage percentage and distance from the pools to the channel) were carried out in four campaigns during 2014. In sandy pools, the fish fauna was sampled using hand nets, eugenol and beach seine, following a sampling protocol specially developed for that purpose; in rocky pools, we used eugenol and hand nets. The sandy pools were larger, shallower and farther from the channel, than the rocky ones. The composition and abundance of fish species differed between the types of pools and throughout the year: Gerreidae and Gobiidae were the main families in the sandy pools and Gobiidae and Blenniidae in the rocky ones. The environmental factors that structured the fish fauna in each type of pool were: in sandy area, depth, algal coverage and distance to the channel; in rocky pools, temperature, dissolved oxygen and channel distance. In contrast to the focus that has been given for rocky pools, we emphasize the importance of sandy pools studies because its great richness and abundance of species, including larvae of many families.

Abstract The main objective of this thesis was to research the integration of novel materials and fabrication processes into Low Temperature Co-fired Ceramic (LTCC) technology; enabling fabrication of Radio Frequency (RF) and microwave components with advanced performance. The research focuses on two specific integration cases, which divide the thesis into two sections: the integration of tunable dielectric structures and the integration of air filled waveguides. The first section of the thesis describes the development and characterization of low sintering temperature Barium Strontium Titanate (BST) thick film paste. Sintering temperature of BST is decreased from approximately 1350 °C down to 900 °C by lithium doping and pre-reaction of the doped composition. This allows the co-sintering of the developed BST paste with commercial LTCC materials. Additionally two integration techniques to embed tunable components in an LTCC substrate using the developed BST paste are also presented and the electrical performance of the components is evaluated. The highest measured tunability value was 44% with a bias field of 5.7 V/µm. The permittivity of the films varied between 790 and 190, and the loss tangent varied between 0.004 and 0.005, all measured unbiased at 10 kHz. The developed LTCC compatible BST paste and the presented integration techniques for tunable components have not been previously published. In the second section of the thesis, a fabrication method for the LTCC integrated air-filled rectangular waveguides with solid metallic walls is presented. The fabrication method is described in detail and implemented in a set of waveguides used for characterization. A total loss of 0.1–0.2 dB/mm was measured over a frequency band of 140–200 GHz. The electrical performance of the waveguides is evaluated and their use demonstrated in an integrated LTCC antenna operating at 160 GHz.

<p>Microelectronics is heading towards larger and larger systems implemented on a single chip. In wireless communication equipment, e.g., cellular phones, handheld computers etc., both analog and digital circuits are required. If several integrated circuits (ICs) are used in a system, a large amount of the power is consumed by the communication between the ICs. Furthermore, the communication between ICs is slow compared with on-chip communication. Therefore, it is favorable to integrate the whole system on a single chip, which is the objective in the system-on-chip (SoC) approach.</p><p>In a mixed-signal SoC, analog and digital circuits share the same chip. When digital circuits are switching, they produce noise that is spread through the silicon substrate to other circuits. This noise is known as substrate noise. The performance of sensitive analog circuits is degraded by the substrate noise in terms of, e.g., lower signal-to-noise ratio and lower spurious-free dynamic range. Another problem is the design of the clock distribution net, which is challenging in terms of obtaining low power consumption, sharp clock edges, and low simultaneous switching noise.</p><p>In this thesis, a noise reduction strategy that focus on reducing the amount of noise produced in digital clock buffers, is presented. The strategy is to use a clock with long rise and fall times. It is also used to relax the constraints on the clock distribution net, which also reduce the design effort. Measurements on a test chip show that the strategy can be implemented in an IC with low cost in terms of speed and power consumption. Comparisons between substrate coupling in silicon-on-insulator (SOI) and conventional bulk technology are made using simple models. The objective here is to get an understanding of how the substrate coupling differs in SOI from the bulk technology. The results show that the SOI has less substrate coupling when no guard band is used, up to a certain frequency that is highly dependent of the chip structure. When a guard band is introduced in one of the analyzed test structures, the bulk resulted in much higher attenuation compared with SOI. An on-chip measurement circuit aiming at measuring simultaneous switching noise has also been designed in a 0.13 µ SOI process.</p> / Report code: LiU-Tek-Lic-2005:33.

In order to assess and optimize layout strategies for minimizing substrate noise, it is necessary to have fast and accurate techniques for computing contact coupling resistances associated with the substrate. In this talk, we describe an extraction method capable of full-chip analysis which combines modest geometric approximations, a novel integral formulation, and an FFT-accelerated preconditioned iterative method. / Singapore-MIT Alliance (SMA)

In many consumer products, e.g., cellular phones and handheld computers, both digital and analog circuits are required. Nowadays, it is possible to implement a large subsystem or even a complete system, that earlier required several chips, on a single chip. A system on chip (SoC) has generally the advantages of lower power consumption and a smaller fabrication cost compared with multi-chip solutions. The switching of digital circuits generates noise that is injected into the silicon substrate. This noise is known as substrate noise and is spread through the substrate to other circuits. The substrate noise received in an analog circuit degrades the performance of the circuit. This is a major design issue in mixed-signal ICs where analog and digital circuits share the same substrate. Two new noise reduction methods are proposed in this thesis work. The first focuses n reducing the switching noise generated in digital clock buffers. The strategy is to use a clock with long rise and fall times in conjunction with a special D flip-flop. It relaxes the constraints on the clock distribution net, which also reduce the design effort. Measurements on a test chip implemented in a 0.35 μm CMOS technology show that the method can be implemented in an IC with low cost in terms of speed and power consumption. A noise reduction up to 50% is obtained by using the method. The measured power consumption of the digital circuit, excluding the clock buffer, increased 14% when the rise and fall times of the clock were increased from 0.5 ns to 10 ns. The corresponding increase in propagation delay was less than 0.5 ns corresponding to an increase of 50% in propagation delay of the registers. The second noise reduction method focuses on reducing simultaneous switching noise below half the clock frequency. This frequency band is assumed to be the signal band of an analog circuit. The idea is to use circuits that have as close to periodic power supply currents as possible to obtain low simultaneous switching noise below the clock in the frequency domain. For this purpose we use precharged differential cascode switch logic together with a novel D flip-flop. To evaluate the method two pipelined adders have been implemented on transistor level in a 0.13 μm CMOS technology, where the novel circuit is implemented with our method and the reference circuit with static CMOS logic together with a TSPC D flip-flop. According to simulation results, the frequency components in the analog signal band can be attenuated from 10 dB up to 17 dB using the proposed method. The cost is mainly an increase in power consumption of almost a factor of three. Comparisons between substrate coupling in silicon-on-insulator (SOI) and conventional bulk technology are made using simple models. The objective is to get an understanding of how the substrate coupling differs in SOI from the bulk technology. The results show that the SOI has less substrate coupling if no guard band is used, up to a certain frequency that is dependent of the test case. Introducing a guard band resulted in a higher attenuation of substrate noise in bulk than in SOI. An on-chip measurement circuit aiming at measuring simultaneous switching noise has been designed in a 0.13 μm SOI CMOS technology. The measuring circuit uses a single comparator per channel where several passes are used to capture the waveform. Measurements on a fabricated testchip indicate that the measuring circuit works as intended. A small part of this thesis work has been done in the area of digit representation in digital circuits. A new approach to convert a number from two’s complement representation to a minimum signed-digit representation is proposed. Previous algorithms are working either from the LSB to the MSB (right-to-left) or from the MSB to the LSB (left-to-right). The novelty in the proposed algorithm is that the conversion is done from left-to-right and right-to-left concurrently. Using the proposed algorithm, the critical path in a conversion circuit can be nearly halved compared with the previous algorithms. The area and power consumption, of the implementation of the proposed algorithm, are somewhere between the left-to-right and right-to-left implementations. / Articles I, II, III, IV, VII and IX are published with permisson from IEEE dated 07/05/18. Copyright IEEE.

No description available.

Miniaturization and functionality have always governed advances in electronic system technology. To truly achieve the goal of a multi mega-functional system, advances must be made not just at the IC level, but at the system level too. This concept of tighter integration at the system level is called System-on-Package (SOP). While SOP has a wide range of applications, this work targets the mobile application space. The main driver in the mobile application space is package profile. Reduction in thickness is very critical for enabling next-generation ultra-high density mobile products. In order to pack more functionality into a smaller volume, it is absolutely imperative that package profiles are reduced. The NEMI roadmap projects that the package profile should be reduced to 200µm from the current 500µm by 2014. This work attempts to demonstrate the feasibility of ultra-thin substrates (<200µm) using a new advanced material system tailored for high-frequency mobile applications. The main barriers to adoption of thin substrates include processing challenges, concerns about via and through hole reliability and warpage. Each of these factors is studied and a full-fledged test vehicle built to demonstrate the reliability of thin substrates using the advanced low-loss RXP-4/RXP-1 material system. Finite element models are developed to provide an understanding of the factors that affect the reliability of these substrates. Finally, IC assembly is demonstrated on these substrates.