X-ray fluorescence is a fast, non-destructive method to measure substances. This method can be used to detect elements in an environmental sample for elemental analysis. Commercially available XRF units exists, but their scope of application is limited. In the university lab, a more generalized XRF setup is available. At present, the environmental samples can only be sampled and brought into the laboratory for testing. During the sample transport, some changes may occur in the sample. At the same time, in the laboratory test, the sample parameters in the current environment cannot be obtained in real time. So we consider the design of a battery power supply. At the same time, there are different ways to reduce power consumption. This paper considers usability and reduction of power consumption in various aspects to bring the X-ray source and spectrometer to the environment for element detection. We have to choose the battery to achieve the best length of operating time. The system design includes the selection of a DC/DC converter boost regulator to adjust the battery output to meet the input voltage requirements of the X-ray source and of the X-ray spectrometer.

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The future voltage regulator module (VRM) challenges of high bandwidth control with fast transient response, high current output, simple implementation, and efficient 48V solution are tackled in this dissertation. With the push for control bandwidth to meet design specifications for microprocessor VRM with larger and faster load transients, control can be saturated and lost for a significant period of time during transient. During this time, undesirable transient responses such as large undershoot and ringback occurs. Due to the loss of control, the existing tools to study the dynamic behavior of the system, such as small signal model, are insufficient to analyze the behavior of the system during this time. In order to have a better understanding of the system dynamic performance, the operation the VRM is analyzed in the state-plane for a clear visual understanding of the steady-state and transient behaviors. Using the state-plane, a simplified state-plane trajectory control is proposed for constant on-time (COT) control to achieve the best transient possible for applications with adaptive voltage positioning (AVP). When the COT control is lost during a load step-up transient, the state-plane trajectory control will extend on-time to provide the a near optimal transient response. By observing the COT control law in the state-plane, a simplified state-plane trajectory control with analog implementation is proposed to achieve the best transient possible with smooth transitions in and out of the steady-state COT control. The concept of the simplified state-plane trajectory control is then extended to multiphase COT. For multiphase operation, additional operating behavior, such as phase overlapping during transient and interleaving during steady-state, need to be taken into consideration to design the desired state-plane trajectory control. A simple state-plane trajectory control with improved Ton extension is proposed and verified using multiphase COT control. After tackling the state-plane trajectory control for current mode COT, the idea is then extended to V2 COT. V2 COT is a more advanced current mode control which requires a more advanced state-plane trajectory control to COT. By calculating the intersection of the extended on-stage trajectory during transient and the ideal off trajectory in the form of a current limiting wall, a near optimal transient response can be achieved. For V2 COT with state-plane trajectory control, implementations using inductor vs. capacitor current, effect of component tolerance, and effect of IC delay are studied. The proposed state-plane trajectory control is then extended to enhanced V2 COT. Aside from tackling existing VRM challenges, the future datacenter 48V VRM challenge of a high efficiency, high power density solution to meet the VRM specifications is studied. The sigma converter is proposed for the 48V VRM solution due to exhibition of high efficiency and high-power density from hardware evaluation. An accurate model for the sigma converter is derived using the new modeling approach of modularizing the small signal components. Using the proposed model, the sigma converter is shown to naturally have very low output impedance, making the sigma converter suitable for microprocessor applications. The sigma converter is designed and optimized to achieve AVP and very fast transient response using both voltage-mode and current-mode controls. / Doctor of Philosophy / Microprocessors, such as central processing unit (CPU) and graphics processing unit (GPU) are the basis of today's electronics. In the recent decades, the demand for more powerful and faster data processing lead to a significant increase in power consumption by these microprocessors. Even with the introduction of multi-core processors and adaptive voltage positioning (AVP) to reduce the average power provided by the power supplies, the microprocessor can still draw a large amount of instantaneous power in a short period of time. With the microprocessors demanding high amount of current at fast slew-rate, the challenges for the next generation of microprocessor power supply, or voltage regulator modules (VRM), are fast response speed to ensure proper operation of the microprocessors, and high efficiency VRM to minimize the overall system power consumption. The challenge of a VRM with fast response speed is tackled first. To meet the AVP and transient requirements of microprocessor, the VR need to utilize high-bandwidth control methods. Of the control methods used by the industry, high control bandwidth can be easily achieved using constant on-time (COT) control. With the ever-increasing output current level and transient slew-rate requirements, COT control can saturate and lose its steady-state control for a period of time during load step-up transient. During this time, the system will operate with a fixed frequency control until COT control is recovered. Although the method is widely used in the industry, the method is too slow to meet the transient requirements. Many state-of-art methods have been proposed to resolve the load step-up transient issue of COT. However, of the methods proposed, it is difficult to optimize the transient improvement while having a simple analog implementation to ensure a fast response for the wide operating range and aggressive transient conditions observed in microprocessor VRM application. In this dissertation, COT control is studied using the state-plane to provide a clear visual understanding of the transient behavior of the control. Using the state-plane, a state-plane trajectory control is proposed to achieve near optimal load step-up transient response. The concept is then extended to multiphase VRM, which is typically used for high current applications. The state-plane trajectory control concept is then further extended to V2 COT control for VRM without AVP, such as those used by GPU and smartphone CPU. For the proposed state-plane trajectory controls, hardware implementation, evaluation, and experimental results are provided. After tackling the challenge of a VRM with fast response speed, the challenge of an efficient VRM is then tackled. In recent years, a significant amount of research has been put into studying VRM for a power delivery architecture which uses a 48V bus instead of the 12V bus. By using the 48V bus, less redundancy in the power delivery path can greatly increase the overall system efficiency if the VRM stage retains its efficiency. However, the increase in input voltage for the VRM provides an additional challenge to maintain high efficiency for the VRM stage itself. To maintain good efficiency, it is difficult to increase converter switching frequency beyond 300kHz. This limitation on switching frequency will limit the ability to achieve high bandwidth design and fast transient requirements. A 48V VRM using a different topology, the sigma converter, has demonstrated high-efficiency and high-power density, but the converter behavior and control methodology for VRM application is unclear. In this dissertation, the modeling and control of the sigma converter are studied using the proposed small-signal model. By evaluating the proposed small-signal model, the sigma converter can naturally have very low output impedance, making it an ideal candidate for 48V VRM. Then, the design guideline of the sigma converter with current-mode control is provided. With the work discussed in this dissertation, further study of the sigma converter with COT and state-plane trajectory control can be conducted in the future.

Point-of-load (POL) converters are used extensively in IT products. Every piece of the integrated circuit (IC) is powered by a point-of-load (POL) converter, where the proximity of the power supply to the load is very critical in terms of transient performance and efficiency. A compact POL converter with high power density is desired because of current trends toward reducing the size and increasing functionalities of all forms of IT products and portable electronics. To improve the power density, a 3D integrated POL module has been successfully demonstrated at the Center for Power Electronic Systems (CPES) at Virginia Tech. While some challenges still need to be addressed, this research begins by improving the 3D integrated POL module with a reduced DCR for higher efficiency, the vertical module design for a smaller footprint occupation, and the hybrid core structure for non-linear inductance control. Moreover, as an important category of the POL converter, the voltage regulator (VR) serves an important role in powering processors in today's electronics. The multi-core processors are widely used in almost all kinds of CPUs, ranging from the big servers in data centers to the small smartphones in almost everyone's pocket. When powering multiple processor cores, the energy consumption can be reduced dramatically if the supply voltage can be modulated rapidly based on the power demand of each core by dynamic voltage and frequency scaling (DVFS). However, traditional discrete voltage regulators (VRs) are not able to realize the full potential of DVFS since they are not able to modulate the supply voltage fast enough due to their relatively low switching frequency and the high parasitic interconnect impedance between the VRs and the processors. With these discrete VRs, DVFS has only been applied at a coarse timescale, which can scale voltage levels only in tens of microseconds (which is normally called a coarse-grained DVFS). In order to get the full benefit of DVFS, a concept of an integrated voltage regulator (IVR) is proposed to allow fine-grained DVFS to scale voltage levels in less than a microsecond. Significant interest from both academia and industry has been drawn to IVR research. Recently, Intel has implemented two generations of very high frequency IVR. The first generation is implemented in Haswell processors, where air core inductors are integrated in the processor's packaging substrate and placed very closely to the processor die. The air core inductors have very limited ability in confining the high frequency magnetic flux noise generated by the very high switching frequency of 140MHz. In the second generation IVR in Broadwell processors, the inductors are moved away from the processor substrate to the 3DL PCB modules in the motherboard level under the die. Besides computers, small portable electronics such as smartphones are another application that can be greatly helped by IVRs. The smartphone market size is now larger than 400 billion US dollars, and its power consumption is becoming higher and higher as the functionality of smartphones continuously advances. Today's multi-phase VR for smartphone processors is built with a power management integrated circuit (PMIC) with discrete inductors. Today's smartphone VRs operate at 2-8MHz, but the discrete inductor is still bulky, and the VR is not close enough to the processor to support fine-grained DVFS. If the IVR solution can be extended to the smartphone platform, not only can the battery life be greatly improved, but the total power consumption of the smartphone (and associated charging time and charging safety issues) can also be significantly reduced. Intel's IVR may be a viable solution for computing applications, but the air core inductor with un-confined high-frequency magnetic flux would cause very severe problems for smartphones, which have even less of a space budget. This work proposes a three-dimensional (3D) integrated voltage regulator (IVR) structure for smartphone platforms. The proposed 3D IVR will operate with a frequency of tens of MHz. Instead of using an air core, a high-frequency magnetic core without an air gap is applied to confine the very high frequency flux. The inductor is designed with an ultra-low profile and a small footprint to fit the stringent space requirement of smartphones. A major challenge in the development of the very high frequency IVR inductor is to accurately characterize and compare magnetic materials in the tens of MHz frequency range. Despite the many existing works in this area, the reported measured properties of the magnetics are still very limited and indirect. In regards to permeability, although its value at different frequencies is often reported, its saturation property in real DC-biased working conditions still lacks investigation. In terms of loss property, the previous works usually show the equivalent resistance value only, which is usually measured with small-signal excitation from an impedance/network analyzer and is not able to represent the real magnetic core loss under large-signal excitation in working conditions. The lack of magnetic properties in real working conditions in previous works is due to the significant challenges in the magnetic characterization technique at very high frequencies, and it is a major obstacle to accurately designing and testing the IVR inductors. In this research, an advanced core loss measurement method is proposed for very high frequency (tens of MHz) magnetic characterization for the IVR inductor design. The issues of and solutions for the permeability and loss measurement are demonstrated. The LTCC and NEC flake materials are characterized and compared up to 40MHz for IVR application. Based on the characterized material properties, both single-phase and multi-phase integrated inductor are designed, fabricated and experimentally tested in 20MHz buck converters, featuring a simple single-via winding structure, small size, ultra-low profile, ultra-low DCR, high current-handling ability, air-gap-free magnetics, multi-phase integration within one magnetic core, and lateral non-uniform flux distribution. It is found that the magnetic core operates at unusually high core loss density, while it is thermally manageable. The PCB copper can effectively dissipate inductor heat with 3D integration. In addition, new GaN device drivers and magnetic materials are evaluated and demonstrated with the ability to increase the IVR frequency to 30MHz and realize a higher density with a smaller loss. In summary, this research starts with improving the 3D integrated POL module, and then explores the use of the 3D integration technique along with the very high frequency IVR concept to power the smartphone processor. The challenges in a very high frequency magnetic characterization are addressed with a novel core loss measurement method capable of 40MHz loss characterization. The very high frequency multi-phase inductor integrated within one magnetic component is designed and demonstrated for the first time. A 20MHz IVR platform is built and the feasibility of the concept is experimentally verified. Finally, new GaN device drivers and magnetic materials are evaluated and demonstrated with the ability to increase the IVR frequency to 30MHz and realize higher density with smaller loss. / Ph. D. / This research focuses on reducing the size, footprint, and power loss of the power supply for the CPUs in different applications, ranging from the big servers in data centers to the small smartphones in almost everyone’s pocket. To achieve this goal, novel characterization, design, and integration technique is developed, especially for the bulky magnetic components, with much faster (~10X) switching speed than the nowadays practice. This research opens the door to the development of the next generation of CPUs’ power supply with very high switching speed, simple structure, high integration level, and high current handling ability.

Integrace a derivace jsou obvykle známy pro celočíselný řád (tj. první, druhý, atd.). Existuje ale zobecnění pro zlomkové (neceločíselné) řády, které lze implementovat pomocí elektronických obvodů zlomkového řádu (případně provést jejich aproximaci) a které poskytuje nový stupeň volnosti pro návrh elektronických obvodů. Obvody zlomkového řádu jsou obvykle aproximovány diskrétními součástkami pomocí RC struktur s velkými rozsahy odporů a kapacit, a tím se jeví nepraktické pro použití v integrovaných obvodech. Tato práce prezentuje implementaci obvodů zlomkového řádu v integerovaných obvodech a jejich praktické využití v této oblasti. Jsou použity prvky se soustředěnými parametry (např. RC žebřík) i prvky s rozprostřenými parametery (např. R-PMOScap, skládající se z nesalicidovaného proužku polykrystalického křemíku nad hradlovým oxidem); je použita pouze technologie typu analogvý CMOS bez dodatečných procesních kroků. Užití obvodů zlomkového řádu bylo demonstrováno realizací několika integrovaných napěťových regulátorů, v nichž obvody zlomkového řádu realizují řízení zlomkového řádu za účelem dosažení silné stejnosměrné regulace a dobré stability regulační smyčky - i bez použití kompenzační nuly nebo příliš vysoké externí kapacity (některé napěťové regulátory dovolují i zatěžovací kapacitou v rozsahu nula až nekonečno).

It is well known that a crucial factor determining the transmission capacity with regards to the voltage stability limit of a stressed power system, is the limitation of field and stator current of overexcited generators. These limiters are commonly referred to as overexcitation limiters (OEL) and stator current limiters (SCL). This thesis investigates the representation of overexcitation limiters and stator current limiters in the Swedish power system and how they could be implemented in the power system simulator PSS/E. Dynamic simulations in PSS/E are performed to investigate and validate differences between model types and parameters. The thesis compares different types of limiters and presents a representative set of parameters based on the documentation and implements them into PSS/E. The result from the study is a recommendation to migrate to limiter model MAXEX2 for generators without stator current limiters. The MAXEX2 model uses an inverse time characteristic which is becoming more common in installed voltage regulators. This feature makes it possible for extended use of generators before limiter action is applied. The MAXEX2 model is also possible to tune into a fixed time delay to represent older types of limiters.

L'apparition de convertisseurs multicellulaires parallèles entrelacés et magnétiquement couplés a conduit ces dernières années à améliorer les performances des convertisseurs (densité de puissance, efficacité, dynamique,...). Il existe plusieurs topologies d'entrelacement qui utilisent des Transformateurs Interphases. L'objectif principal de cette étude est de trouver parmi ces topologies celles qui sont les mieux adaptées à un contexte d'intégration d'électronique de puissance pour minimiser la taille et réduire les pertes. Une première étape de modélisation a permis d'effectuer une étude comparative de quelques topologies. Un procédé de permutation des phases d'alimentation a été présenté afin de réduire les ondulations du courant de phases et les pertes ohmiques. Les résultats obtenus valident qualitativement l'avantage de la solution retenue par rapport à la solution standard. Enfin, la réalisation pratique d'un prototype de convertisseur modulaire utilisant des Transformateurs Inter-phases est abordé. Il s'agit d'un régulateur chargé d'alimenter les microprocesseurs (1,2V/100A) (Voltage Regulator Module (VRM)) à 5 modules. Les résultats expérimentaux montrent l'avantage de l'utilisation des Transformateurs Inter-phases par rapport à la solution classique.

Esta dissertação tem por objetivo o desenvolvimento, e implantação em computador, de uma metodologia para tratamento do problema de restabelecimento de energia em sistemas de distribuição de grande porte (com milhares de linhas, barras de carga e chaves seccionadoras), que permita a obtenção de Planos de Restabelecimento de Energia (PREs) adequados considerando a existência de reguladores de tensão, bancos de capacitores e de diferentes tipos de chaves seccionadoras. A metodologia proposta deverá considerar as características de operação de diferentes tipos de chaves seccionadoras (existência de telecomando, possibilidade de abertura com carga e/ou em curto circuito, etc.) para obtenção de PREs. Vale lembrar que usualmente as metodologias desenvolvidas para obtenção de PREs consideram a existência apenas de chaves automáticas e não automáticas, não considerando outras características de funcionamento das chaves seccionadoras. Tendo em vista que o problema a ser tratado é combinatório, com múltiplos objetivos e restrições, a metodologia proposta será baseada em Algoritmos Evolutivos, em técnicas de otimização multi-objetivo e na estrutura de dados denominada Representação Nó-Profundidade (RNP). A RNP será utilizada para representar computacionalmente, de forma eficiente, a topologia elétrica dos sistemas de distribuição. Para validar a metodologia proposta serão realizadas simulações computacionais com sistemas de distribuição reais de grande porte. / This dissertation aims to develop a methodology to provide adequate Energy Restoration Plans (ERPs) in contingency situations to large-scale distribution systems (with thousands of lines, load buses and sectionalizing switches), considering the existence of voltage regulators, capacitors banks and different types of sectionalizing switches. The proposed methodology considers the operational characteristics of different types of sectionalizing switches (existence of remote control, possibility of open-load and/or short-circuit, etc.) for the purpose of obtaining ERPs. Usually the developed methodologies consider only the existence of remotely controlled and manually controlled switches, excluding other operational characteristics of the sectionalizing switches. As the service restoration problem is combinatory with multiple objectives and constraints, the proposed methodology is based on Evolutionary Algorithms, multiobjective optimization techniques and on the data structure named Node-Depth Encoding. The Node-Depth Encoding is used to computationally represent, in an efficient way, the topology of the distribution systems. The proposed methodology is validated through computational simulations performed in real large-scale distribution systems.

Esta dissertação tem por objetivo o desenvolvimento, e implantação em computador, de uma metodologia para tratamento do problema de restabelecimento de energia em sistemas de distribuição de grande porte (com milhares de linhas, barras de carga e chaves seccionadoras), que permita a obtenção de Planos de Restabelecimento de Energia (PREs) adequados considerando a existência de reguladores de tensão, bancos de capacitores e de diferentes tipos de chaves seccionadoras. A metodologia proposta deverá considerar as características de operação de diferentes tipos de chaves seccionadoras (existência de telecomando, possibilidade de abertura com carga e/ou em curto circuito, etc.) para obtenção de PREs. Vale lembrar que usualmente as metodologias desenvolvidas para obtenção de PREs consideram a existência apenas de chaves automáticas e não automáticas, não considerando outras características de funcionamento das chaves seccionadoras. Tendo em vista que o problema a ser tratado é combinatório, com múltiplos objetivos e restrições, a metodologia proposta será baseada em Algoritmos Evolutivos, em técnicas de otimização multi-objetivo e na estrutura de dados denominada Representação Nó-Profundidade (RNP). A RNP será utilizada para representar computacionalmente, de forma eficiente, a topologia elétrica dos sistemas de distribuição. Para validar a metodologia proposta serão realizadas simulações computacionais com sistemas de distribuição reais de grande porte. / This dissertation aims to develop a methodology to provide adequate Energy Restoration Plans (ERPs) in contingency situations to large-scale distribution systems (with thousands of lines, load buses and sectionalizing switches), considering the existence of voltage regulators, capacitors banks and different types of sectionalizing switches. The proposed methodology considers the operational characteristics of different types of sectionalizing switches (existence of remote control, possibility of open-load and/or short-circuit, etc.) for the purpose of obtaining ERPs. Usually the developed methodologies consider only the existence of remotely controlled and manually controlled switches, excluding other operational characteristics of the sectionalizing switches. As the service restoration problem is combinatory with multiple objectives and constraints, the proposed methodology is based on Evolutionary Algorithms, multiobjective optimization techniques and on the data structure named Node-Depth Encoding. The Node-Depth Encoding is used to computationally represent, in an efficient way, the topology of the distribution systems. The proposed methodology is validated through computational simulations performed in real large-scale distribution systems.

This thesis focuses on the design of an electrical drive system for the purpose of high precision motion control. A modern electrical drive is usually equipped with a current regulated voltage source along with powerful motion controller system utilizing one or more micro-controllers and/or digital signal processors (DSPs). That is, the motor drive control is mostly performed by a dedicated digital-motion controller system. Such a motor drive mostly interfaces with its host processor via various serial communication protocols such as Profibus, CAN+, RS-485 etc. for the purpose of receiving commands and sending out important status/control signals. Considering that the motor drives lie at the heart of every (multi-axis) motion control system, the aim of this thesis is to explore the design and implementation of a conventional DC motor drive system suitable for most industrial applications that require precision and accuracy. To achieve this goal, various underlying control concepts and important implementation details are rigorously investigated in this study. A low power DC motor drive system with a power module, a current regulator and a motion controller is built and tested. Several design revisions on these subsystems are made so as to improve the overall performance of the drive system itself. Consequently, important &ldquo / know-how&rdquo / required for building high performance (and high power) DC motor drives is gained in this research.