Invasive and non-invasive methods of BTI monitoring and wearout preemption have been proposed. We propose a novel, simple to use, test structure for NBTI /PBTI monitoring. The proposed structure has an AC and a DC stress mode. Although during stress mode, both PMOS and NMOS devices are stressed, the proposed structure isolates the PBTI and NBTI degradation during test mode. A methodology of converting any data-path into ring oscillator (DPRO) is also presented. To avoid the performance overhead of attaching monitoring circuitry to functional block, a non-invasive scheme for BTI monitoring is presented for sleep transistor based logic families. Since, BTI is a critical issue for memories, a scheme for BTI monitoring of 6T SRAM cell based memories is also presented. We make use of the concept of a DPRO and show how a memory system can be made to oscillate in test mode. The frequency of oscillation is a function of the devices in the cell. After validation of the proposed schemes using extensive simulations, we have also validated the results on silicon. We also introduce the concept of wearout mitigation at the compiler level. Using an example of a register file, we present a preemptive method of wearout mitigation using a compiler directed scheme.

L’industrie microélectronique arrive à concevoir des transistors atteignant dimensions de l’ordre de la dizaine de nanomètres. Et ce faisant elle tend atteindre ses limites en terme de réduction des dimensions des transistors CMOS. Or à ces dimensions, la fiabilité et la variabilité des dispositifs prennent une ampleur critique en ce qui concerne les prédictions de durée de vie et de garantie des composants. Parmi les aspects critiques, la dégradation NBTI (Négative Bias Temperature Instability) représente l’un des plus gros défis en termes de fiabilité. Cette dégradation tire son origine d’un piégeage de charge dans l’oxyde de grille et est responsable pour une grande partie de la dégradation des transistors. A l’aide d’un important travail expérimental, nous avons caractérisé à l’aide de mesure rapide les cinétiques de dégradation et de relaxation de la dégradation NBTI, puis nous avons travaillé sur la modélisation des phases de stress et de relaxation. Nous sommes parvenues à créer un modèle pour le stress et la relaxation que nous avons éprouvé sur un certain nombre de nœuds technologiques allant du 14nm FDSOI au 180nm Bulk. Nous avons aussi évalué l’impact de certains changements de procédées de fabrication sur la dégradation NBTI.Enfin nous proposons une étude poussée de la variabilité induite par le NBTI et du modèle DCM (Defect centric Model) permettant de modéliser cette variabilité. Nous proposons alors une correction mathématique de ce modèle, et la possibilité de le réécrire afin de pouvoir l’utiliser pour un plus grand nombre de défauts. Enfin nous mettrons ce modèle en échec sur les prédictions qu’il fait de défauts et nous proposons un nouveau modèle sous la forme d’un DCM à deux défauts ou DDCM (Dual Defect Centric Model).Mots-clés : Microélectronique, FDSOI, Bulk, variabilité, NBTI, caractérisation électrique, modélisation. / The microelectronics industry is able to design transistors reaching dimensions of the order of ten nanometers. And doing this, we reaching the limits in terms of size reduction of CMOS transistors. At these dimensions, the reliability and variability of the devices is critical in terms of lifetime prediction and component warranty. Among the critical aspects, NBTI (Negative Bias Temperature Instability) degradation represents one of the biggest challenges in terms of reliability. This degradation coming from a charge trapping in the gate oxide is responsible for a large part of the degradation of the transistors. Performing a huge experimental work based on the characterization of the kinetic of degradation and relaxation of the NBTI degradation with rapid measurements, allowing us to work on the modeling of the stress and relaxation phases of NBTI degradation. We have successfully create a model for stress and relaxation of the NBTI degradation. These models were then tested on several technological nodes from 14nm FDSOI to 180nm Bulk. We also study the impact of some process changes on NBTI degradation. Finally, we propose a detailed study of the variability induced by the NBTI and the DCM model (Defect centric Model) allowing to model this variability. We also propose a mathematical correction of this model but also another mathematical expression of this model allowing to use it for a large number of defects. Enfin, nous prouvons que DCM est défectueux dans sa prédiction du nombre de défauts et nous proposons un nouveau modèle sous la forme d'un DCM avec deux défauts ou DDCM (Dual Defect Centric Model).

En continuant à suivre la loi de Moore, les transistors ont atteint des dimensions de plus en plus réduites. Cependant pour les largeurs inférieures à 100nm, des effets parasites dits de canaux courts sont apparus. Il a ainsi fallu développer de nouvelles architectures, à savoir les transistors 3D, aussi appelés trigates, finfets ou encore nanofils. Le remplacement des transistors planaires utilisés depuis les années 60 par ces dispositifs tridimensionnels constitue une réelle rupture technologique et pose de sérieuses questions quant à la fiabilité de ces nouveaux composants électroniques. Parmi les spécificités des dispositifs 3D, on peut notamment citer l’utilisation de différents plans cristallins du silicium, les potentiels effets d’angle ou encore le confinement des porteurs de charge. Les principaux mécanismes de fiabilité doivent, à ce titre, être étudiés afin de prédire le vieillissement de tels dispositifs. Ainsi, l’évolution du transistor MOS et les limites de l’architecture planaire sont rappelées dans un premier temps. Les différents mécanismes de dégradation ainsi que les méthodes de caractérisation sont également exposés. Les défauts d’oxyde jouant un rôle important en fiabilité, l’impact sur la tension de seuil VT d’une charge élémentaire q selon sa localisation spatiale a été simulé. On a ainsi pu constater que l’influence de ces défauts change selon leur position mais aussi selon les dimensions du transistor lui-même. Par la suite, le manuscrit se concentre sur la dégradation BTI (Bias Temperature Instabilities). Une comparaison entre les transistors trigates et d’autres quasi planaires a ainsi été effectuée en mettant en évidence les effets de la largeur du MOSFET. Un autre mécanisme important de fiabilité est intitulé dégradation par porteurs chauds ou HC, hot carriers en anglais. Les principaux modèles développés sur les architectures planaires ont été rappelés puis vérifiés pour les transistors 3D. Lors de stress HC, les niveaux de courant sont tels que des effets d’auto-échauffement apparaissent et dégradent les paramètres électriques du dispositif. Cette contribution a alors dû être décorrélée de la contrainte porteurs chauds afin d’obtenir uniquement la dégradation HC. De manière similaire au BTI, les effets de la largeur du transistor ont également été analysés pour ce mécanisme de fiabilité. Enfin, l’effet des contraintes mécaniques dans le canal, telles que le strained-SOI ou l’apport de germanium, a été étudié non seulement du point de vue des performances mais également de la fiabilité. Nous avons alors pu en déduire le meilleur compromis performance/fiabilité réalisable. / By continuing to follow Moore’s law, transistors have reached ever smaller dimensions. However, from 100nm gate length, parasitic effects called short channel effects appear. As a result new architectures named trigate, nanowires or finfets have been developed. The transition from planar technology used for the last fifty years to 3D devices is a major technological breakthrough. The special features of these architectures like conduction over various crystalline planes, corner effects or carrier confinement effects raise numerous questions about their reliability. Main reliability mechanisms have to be study in order to evaluate 3D transistor aging. In this way, MOS transistor evolution and planar architecture limits have first been reminded. The electrical degradation mechanisms and their characterization methods have also been exposed. As oxide defects represent an important part of device reliability, impact on threshold voltage VT of an elementary charge q has been simulated in accordance to its spatial localization. Thus we can notice that the defect influence on VT change with at once its position and the device dimensions. Next, this manuscript focuses on Bias Temperature Instabilities (BTI). A parallel has been done between narrow Trigate devices and wide ones which can be considered as planar transistors and a width effect on NBTI (Negative BTI) degradation has been highlighted. Another major reliability mechanism is called hot carrier degradation. Its principle models developed on planar architecture have been remembered and their validity on Trigate transistors has been verified. During HC stress, current density can be so high that self-heating effects appear and degrade device electrical parameters. Therefore this contribution has been decorrelate from HC degradation in order to obtain the result of HC stress only. As in BTI chapter, width effect has also been evaluated for this reliability mechanism. Finally strain effects in channel region have been analyzed from both performance and reliability point of view. As a conclusion the best tradeoff between these two items has been determined.

Made available in DSpace on 2014-06-12T15:07:24Z (GMT). No. of bitstreams: 1 license.txt: 1748 bytes, checksum: 8a4605be74aa9ea9d79846c1fba20a33 (MD5) Previous issue date: 2009 / Este estudo avaliou a efetividade do monitoramento populacional de Aedes aegypti por armadilhas de oviposição (ovitrampa), em Olinda-PE, e propôs um sistema alternativo para estimativa de ovos nas armadilhas. Nos bairros de Bultrins, Amparo e Amaro Branco foram instaladas 102 ovitrampas-sentinelas (OVT-S), de novembro/2007 a outubro/2008. As OVT-S, tratadas com larvicida a base de Bacillus thuringiensis israelensis (Bti), permaneceram fixas nas áreas, sendo inspecionadas a cada ciclo de 30 dias. As palhetas recolhidas em campo foram enviadas ao laboratório para secagem, a temperatura ambiente, e posterior leitura ao microscópio esterioscópico para contagem de ovos. Dois métodos foram testados, o Sistema Tradicional de contagem (STC), baseado na contagem direta de cada ovo e o Sistema Simplificado de Leitura (SSL), baseado na estimativa visual da quantidade de ovos/palheta, nas seguintes categorias pré-definidas (<50 ovos, &#8805;50<200 ovos, &#8805; 200<500 ovos e &#8805;500 ovos). Os resultados do monitoramento revelaram que o Índice de Positividade de Ovitrampas (IPO) para a área variou de 85% a 100% e não diferiu estatisticamente entre os bairros. O número médio de ovos de Aedes spp oscilou de 100,2 a 783,2 ovos/OVT-S/ciclo. Pela análise de amostras pareadas, a densidade populacional de Aedes spp. obtida para Amaro Branco foi significativamente maior (Fr = 8,18; Gl= 2 e p-valor= 0,0169) do que a de Bultrins. Os mapas situacionais de densidade de ovos gerados pela estimativa Kernel permitiram visualizar a na distribuição heterogênea da infestação por Aedes spp. nos bairros estudados e revelou que as densidades populacionais do mosquito foram mais elevadas no período de maior concentração de chuvas (março a agosto/2008). A análise espaçotemporal demonstrou que cada bairro apresentou um padrão peculiar de pontos quentes (local de grande concentração populacional do mosquito), que se manteve em quase todos os períodos de avaliação, independente do regime pluviométrico, sugerindo que estes pontos possam apresentar condições mais favoráveis aos criadouros larvais do que os demais espaços dos bairros. A infestação pareceu estar mais concentrada na porção terminal sul em Amparo, enquanto que em Amaro Branco os pontos quentes avançaram da ponta sul ao centro da área e em Bultrins estavam ainda mais dispersos pelo bairro. O comportamento observado para Bultrins concorda, de certa forma, com as informações geradas pelos indicadores entomológicos usados para estimar o percentual de imóveis positivos para A.aegypti, adotados pelo Programa nacional (PNCD). Por outro lado, estes mesmos indicadores não tiveram sensibilidade para detectar a presença de Aedes albopictus nos três bairros estudados, fato confirmado pela pesquisa com ovitrampas. A identificação de larvas a partir de ovos coletados nas ovitrampas demonstrou, entretanto, que A. aegypti era a espécie mais freqüente (95%) e abundante nos bairros. Os resultados de leitura pelos dois sistemas foram concordantes para 96% das palhetas analisadas. Os operadores levaram respectivamente, cerca de 50 s e 8 min. para ler uma palheta com 63 e 980 ovos pelo sistema tradicional contagem (STC) e um tempo de 36 s e 21 s pelo SSL. O monitoramento OVT-S acoplado ao sistema SSL se mostrou de um método sensível e de simples operacionalização para a vigilância de A. aegypti. Adicionalmente, a metodologia usada neste estudo permitiu identificar áreas prioritárias em Olinda, onde as ações de controle vetorial devem ser intensificadas

Bacillus-derived larvicides, which selectively target mosquito (Diptera: Nematocera: Culicidae) populations to reduce nuisance and health risks, were applied in the South March Highlands Conservation Forest near residential neighbourhoods in Ottawa, Ontario. The objective was to assess effects of application on the nontarget mosquito relative, Chironomidae (Diptera: Nematocera: Chironomidae), and other nontarget aquatic taxa captured using emergence traps. A secondary objective was to assess physicochemical variables that influence Chironomidae emergence. Study ponds received an application of Bacillus thuringiensis var. israeliensis, a subset also received an application of Bacillus sphaericus, and a group of control ponds were left untreated over 3 years (2016-2018). Weekly sampling included trap collections and measurements of water temperature, pH, water depth, conductivity, dissolved oxygen, ammonia, nitrate, and sulphate. Drought in 2016, high precipitation throughout 2017, and seasonal precipitation in 2018 influenced variable physicochemical conditions. Principal component analyses identified differences between sampling groups and between years. Redundancy analyses correlated insect emergence with pond pH, average water depth and water temperature and indicated a strong relationship between Chironomidae emergence and average water depth. Although significantly less Chironomidae annual emergence was observed at treated sites in 2017 and 2018, zero-inflated negative binomial generalized linear mixed modelling failed to detect a significant Bti treatment effect when controlling for within group variation. Rather, variations in pH, mean water depth and water temperature were identified as drivers of Chironomidae emergence. Culicidae emergence was reduced to zero briefly following treatment in 2017 and 2018. The model detected a marginal negative treatment effect on Culicidae in 2017 only, and a positive treatment effect in 2018 at the onset of a secondary hydroperiod, in the absence of treatment. Variations in pH and water temperature were also identified to be drivers of Culicidae emergence. Modelling failed to detect treatment effects on any of the nontarget taxa abundance, including Diptera, Lepidoptera, Ephemeroptera, Odonata, Coleoptera, Hymenoptera, and Arachnida. An inverse relationship between insectivore and prey taxa abundance was observed. In 2018, taxa richness increased between years and trended higher at treated sites and a positive relationship between insectivore and prey taxa richness was observed. In 2017, Shannon-Weiner index and Simpson’s index of diversity were higher at untreated sites, and in 2018 diversity indices were higher at treated sites, with taxa richness increasing between years and higher evenness trending at treated sites. Our data suggest that treatment effects were potentially shrouded by natural variability of physicochemical variables, especially due to the varying hydroperiod observed over the three years of sampling. Additional work is needed to capture average conditions and separate confounding variables from treatment effects. This study provides an inventory of the current wetland insect community in the South March Highlands Conservation Forest landscape that offers a reference for ongoing mosquito management.

La réduction des dimensions des transistors a augmenté la sensibilité des circuits numériques aux variations PVT et, plus récemment, aux effets de vieillissement, notamment BTI et HCI. De larges marges de sécurité sont donc nécessaires pour assurer un fonctionnement correct du circuit, ce qui entraîne une perte d'énergie importante. Les solutions actuelles pour améliorer l'efficacité énergétique sont principalement basées sur des solutions de type «Adaptive Voltage and Frequency Scaling (AVFS)». Cependant, ce type de solution ne peut anticiper les variations avant qu'elles ne se produisent. Cette approche doit donc être amélioré pour traiter les problèmes de fiabilité liés au vieillissement. Cette thèse propose une nouvelle méthodologie pour générer des modèles simplifiés pour estimer la fréquence maximale du circuit Fmax. Un premier modèle est créé pour estimer le délai de propagation du (des) chemin(s) critique(s) en fonction des variations PVT. Les effets BTI et HCI sont ensuite modélisés via une modification des paramètres du premier modèle. Construit à partir des modèles au niveau transistor, le modèle de vieillissement obtenu prend en compte tous les facteurs qui influent sur le vieillissement, à savoir, la topologie des circuits, l'application, la tension et la température. La méthodologie proposée est validée sur deux architectures en technologie 28nm FD-SOI. Les modèles peuvent être alimentés par des moniteurs de température et de tension, ce qui permet une évaluation précise de l'évolution de Fmax. Toutefois, ces moniteurs sont sensibles au vieillissement. Aussi, une méthode de recalibrage pour compenser les effets du vieillissement a été développée pour un moniteur numérique de température et de tension. Des exemples d'applications en ligne sont donnés. Les modèles sont également utilisés pour simuler des circuits complexes sous des variations de vieillissement, par exemple un circuit multi-cœur et un système AVFS. Cela permet d'évaluer différentes stratégies concernant la performance, l'énergie et la fiabilité. / The continuous scaling of transistor dimensions has increased the sensitivity of digital circuits to PVT variations and, more recently, to aging effects such as BTI and HCI. Large voltage guard bands, corresponding to worst-case operation, are thus necessary and leads to a considerable energy loss. Current solutions to increase energy efficiency are mainly based on Adaptive Voltage and Frequency Scaling (AVFS). However, as a reactive solution, it cannot anticipate the variation before it occurs. It has, thus, to be improved for handling long-term reliability issues. This thesis proposes a new methodology to generate simplified but nevertheless accurate models to estimate the circuit maximum operating frequency Fmax. A first model is created for the modelling of the propagation delay of the critical path(s) as a function of PVT variations. Both BTI/HCI effects are then modelled as a shift in the parameters of the first model. Built on the top of device-level models, it takes into account all factors that impact global aging, namely, circuit topology, workload, voltage and temperature variations. The proposed modelling approach is evaluated on two architectures implemented in 28nm FD-SOI technology. The models can be fed by temperature and voltage monitors. This allows an accurate assessment of the circuit Fmax evolution during its operation. However, these monitors are prone to aging. Therefore, an aging-aware recalibration method has been developed for a particular V T monitor. Examples of on-line applications are given. Finally, the models are used to simulate complex circuits under aging variations such a multi-core circuit and an AVFS system. This allows the evaluation of different strategies regarding performance, energy and reliability.

Dans la chaine de développement des circuits, une attention particulière doit être portée sur le comportement en fiabilité des dispositifs MOS comme briques de base des circuits avancés CMOS lors du développement d’une technologie. Au niveau du dispositif, les comportements des différents mécanismes de dégradation sont caractérisés. A l’opposé dans le prototype final, le produit est caractérisé dans des conditions accélérées de vieillissement, mais seuls des paramètres macroscopiques peuvent être extraits. Un des objectifs de cette thèse a été de faire le lien entre le comportement en fiabilité d’un circuit ou système et ses briques élémentaires. Le second point important a consisté à développer des solutions de tests dites ‘intelligentes’ afin d’améliorer la testabilité et le gain de place des structures, pour mettre en évidence le suivi du vieillissement des circuits et la compensation des dégradations. Une autre famille de solutions a consisté à reproduire directement dans la structure l’excitation ou la configuration réelle vue par les dispositifs ou circuits élémentaires lors de leur vie d’utilisation (lab in situ). / In the circuit development, specific attention must be paid to the MOS device reliability as a building block as well as a prototype reference circuit (CMOS) during the technology development. At device level, the different degradation mechanisms are characterized. In the final prototype, the product is characterized in accelerated aging conditions, but only the macroscopic parameters can be extracted. One objective of this thesis has been to link the circuit or system reliability and its building blocks. Also, the second important point has consisted in the development of 'smart' test solutions to improve testability and gain up structures so as to highlight the circuits aging monitoring and degradation compensation. Another family of ‘smart’ solutions has involved reproducing directly in the structure the excitement or the actual configuration as it is seen by elementary circuits or devices during their usage life (lab in situ).

The growing interest in high speed and RF technologies assert for the importance of reliability characterization beyond the conventional DC methodology. In this work, the influence of bias temperature instability (BTI) stress on RF small signal parameters is shown. The correlation between degradation of DC and RF parameters is established which enables the empirical modelling of stress induced changes. Furthermore, S-Parameters characterization is demonstrated as the tool to qualitatively distinguish between HCI and BTI degradation mechanisms with the help of extracted small signal gate capacitances.

<p>Mosquitoes are found in extremely large numbers in the lower parts of the River Dalälven. In the year 2000 the mosquito nuisance was especially high, resulting in foundation of the Biological mosquito control project. Since 2001 mosquito larvae are controlled by using a biological pesticide BTI (Bacillus thuringiensis ssp israelensis). The mosquito fauna in the area is dominated by flood water mosquitoes, a group of mosquitoes that are very aggressive and form new generations of mosquitoes during every single flooding event during the summer. To be able to efficiently control the mosquitoes it is essential to know the extension and locality of the flooding. A flooding event is evaluated by how high the water level will reach and at which time the top of the hydrograph is accruing. There is a need for a tool for short time prediction of flooding events in the Nedre Dalälven region. In this study a hydraulic model in the software HEC-RAS has been used, here called HEC-RAS NEDA. The hydraulic model came up with good results when predicting water surface levels. The validation process made from figures of a period with large amplitude in water levels showed that the modelled water level was within ± 0,05 m from the observed water stands. It is a stable model that can handle 100-year flows with quick changes in the flow. The correspondence is good concerning the water levels and it functions well when studying the top of the hydrograph. HEC-RAS NEDA is an accurate and easy to manage tool for prediction of flooding in the lake of Bysjön, Österviken and Färnebofjärden. Modelled results have been compared with the model made by Swedish meteorological and hydrological institute on the request of Räddningsverket. The results from the two models shows large discrepancies, probably because of low accuracy data entered into the model from Räddningsverket. Räddningsverket has used the Geographical Sweden Data height data bank´and I used the height data from a laser scanned digital terrain model. Area studies have also been made according to how the area of the water surface changes with the water stand. These studies show that during the flood in year 2000, 55 km2 was flooded based on laserscanning in Färnebofjärden.</p> / <p>Mygg förekommer i extremt stora antal i området kring nedre delen av Dalälven. År 2000 var myggplågan särskilt stor vilket medförde att projekt Biologisk Myggkontroll bildades. Myggbekämpning har bedrivits i Nedre Dalälven sedan 2001 med ett biologiskt bekämpningsmedel, Bacillus thuringiensis ssp israelensis (BTI). Områdets myggfauna domineras av så kallade översvämningsmygg, en grupp stickmyggor som är mycket aggressiva och bildar nya generationer efter varje enskild översvämning under sommaren. För en effektiv bekämpning av mygglarverna krävs att man vet översvämningens omfattning och lokalisering. En översvämning bedöms med avseende på hur högt vattenståndet når samt vid vilken tidpunkt hydrografens toppvärde inträffar. Det finns ett behov av ett verktyg som kan utföra korttidsprognoser av översvämningar i Nedre Dalälven. I denna studie har en hydraulisk modell i programvaran HEC-RAS använts, här kallad för HEC-RAS NEDA. Den hydrauliska modellen fungerar bra till att användas för prediktering av vattenstånd i Nedre Dalälven. Valideringen av modellen mot värden under en testperiod med stor amplitud i vattenståndet visade att modellerade vattenstånd var inom ± 0,05 m från de uppmätta värdena. Modellen är stabil och klarar av att hantera 100-årsflöden med snabba flödesfluktuationer. HEC-RAS NEDA är ett noggrant och lätthanterligt predikteringsverktyg för översvämningar i Bysjön, Österviken och Färnebofjärden. Överensstämmelsen är god gällande nivån av vattenståndet och den fungerar bra för att studera hydrografens topp temporärt. Modellerade resultat har jämförts med karteringar som Sveriges meteorologiska och hydrologiska institut har gjort på Räddningsverkets begäran. Resultaten skiljer sig betydligt mellan HEC-RAS NEDA och Räddningsverkets modell, troligen på grund av att Räddningsverket har stora svagheter i indata till modellen. Räddningsverket har använt Geografiska Sverige Data-Höjddata och modellen HEC-RAS NEDA är framtagen med höjddata från en digital terrängmodell baserad på laserscanning. Areella studier i GIS över hur arean av vattenspegeln förändras med vattenståndet visar att Färnebofjärden under augusti år 2000 lade 55 km2 under vatten.</p>

Nesta tese são apresentados estudos do impacto de armadilhas no desempenho elétrico de MOSFETs em nível de circuito e um simulador Ensamble Monte Carlo (EMC) é apresentado visando a análise do impacto de armadilhas em nível de dispositivo. O impacto de eventos de captura e emissão de portadores por armadilhas na performance e confiabilidade de circuitos é estudada. Para tanto, um simulador baseado em SPICE que leva em consideração a atividade de armadilhas em simulações transientes foi desenvolvido e é apresentado seguido de estudos de caso em células SRAM, circuitos combinacionais, ferramentas de SSTA e em osciladores em anel. Foi também desenvolvida uma ferramenta de simulação de dispositivo (TCAD) atomística baseada no método EMC para MOSFETs do tipo p. Este simulador é apresentado em detalhes e seu funcionamento é testado conceitualmente e através de comparações com ferramentas comerciais similares. / This thesis presents studies on the impact of charge traps in MOSFETs at the circuit level, and a Ensemble Monte Carlo (EMC) simulation tool is developed to perform analysis on trap impact on PMOSFETs. The impact of charge trapping on the performance and reliability of circuits is studied. A SPICE based simulator, which takes into account the trap activity in transient simulations, was developed and used on case studies of SRAM, combinational circuits, SSTA tools and ring oscillators. An atomistic device simulator (TCAD) for modeling of p-type MOSFETs based on the EMC simulation method was also developed. The simulator is explained in details and its well function is tested.