A single-phase grid connected transformerless photovoltaic (PV) inverter for residential application is presented. The inverter is derived from a boost cascaded with buck converter along with a line frequency unfolding circuit. Due to its novel operating modes, high efficiency can be achieved because there is only one switch operating at high frequency at a time, and the converter allows the use of power MOSFET and ultra-fast reverse recovery diode. This dissertation begins with theoretical analysis and modeling of this boost-buck converter based inverter. And the model indicates small boost inductance will leads to increase the resonant pole frequency and decrease the peak of Q, which help the system be controlled easier and more stable. Thus, interleaved multiple phases structure is proposed to have small equivalent inductance, meanwhile the ripple can be decreased, and the inductor size can be reduced as well. A two-phase interleaved inverter is then designed accordingly. The double-carrier modulation method is proposed based on the inverter's operation mode. The duty cycle for buck switch is always one if the inverter is running in boost mode. And the duty cycle for boost switches are always zero if the inverter is running in buck mode. Because of this, the carrier for boost mode is stacked on the top of the carrier for buck mode, as a result, there is no need to compare the input and output voltage to decide which mode the inverter should operate in. And the inverter operates smoothly between these two modes. Based on similar concept, three advanced modulation methods are proposed. One of them can help further improve the efficiency, and one of them can help increase the bandwidth and gain, and the last one takes the advantage of both. Based on similar concept, another three dual-mode double-carrier based SPWM inverters are proposed. With both step-up and step-down functions, this type of inverter can achieve high efficiency in a wide range because only one switch operates at the PWM frequency at a time. Finally, the simulation and experiment results are shown to verify the concept and the tested CEC (California Energy Commission) efficiency is 97.4%. It performs up to 2% more efficiently better than the conventional solution. / Ph. D.

This dissertation presents voltage stabilization techniques for flying capacitors used in soft-switching multilevel active power filters. The proposed active filter has proved to be a solution for power system harmonics produced by static high power converters. However, voltage unbalance of the clamping capacitors in the active filter in practical applications was observed due to its unequal parameters. Thus, the fundamentals of flying capacitors were characterized dealing with voltage balancing between flying capacitors and dc capacitors under practical operation, rather than ideal conditions. The study of voltage balancing provides the fundamental high-level solutions to flying capacitor based multilevel converter and inverter applications without additional passive balancing circuits. The use of proposed voltage balancing techniques made it possible to have a simple structure for solving the problems associated with the conventional bulky passive resistors and capacitor banks. Furthermore, the proposed control algorithms can be implemented with a real time digital signal processor. It can achieve the high performance of the active filter by compensating an adaptive gain to the controller. The effectiveness of the proposed controller was confirmed through various simulations and experiments. The focus of this study is to identify and develop voltage stabilization techniques for flying capacitors used in a proposed active filter. The voltage unbalance is investigated and characterized to provide safe operations. After having defined the problems associated with the voltage unbalance, the most important voltage stabilization techniques are proposed to solve this problem, in conjunction with an instantaneous reactive power (IRP) control of an active filter. In order to reduce the switching losses and improve the efficiency of the active filter, the proposed soft-switching techniques were evaluated through simulation and experimentation. Experimental results indicate that the proposed active filter achieved zero-voltage conditions in all of the main switches and zero-current turn-off conditions to the auxiliary switches during commutation processes. Also, various studies on soft-switching techniques, multilevel inverters, control issues and dynamics of the proposed active filter are discussed and analyzed in depth. / Ph. D.

Due to the superior characteristics compared to its silicon (Si) counterpart, the wide bandgap (WBG) semiconductor enables next-generation power electronics systems with higher efficiency and higher power density. With higher blocking voltage available, WBG devices, especially the silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET), have been widely explored in various medium-voltage (MV) applications in both industry and academia. However, due to the high di/dt and high dv/dt during the switching transient, potential overcurrent, overvoltage, and gate failure can greatly reduce the reliability of implementing SiC MOSFETs in an MV system. By utilizing the parasitic inductance between the Kelvin- and the power-source terminal, a short-circuit (SC) and overload (OL) dual-protection scheme is proposed for overcurrent protection. A full design procedure and reliability analysis are given for SC circuit design. A novel OL circuit is proposed to protect OL faults at the gate-driver level. The protection procedure can detect an SC fault within 50 nanoseconds and protect the device within 1.1 microsecond. The proposed method is a simple and effective solution for the potential overcurrent problem of the SiC MOSFET. For SiC MOSFETs in series-connection, the unbalanced voltages can result in system failure due to device breakdown or unbalanced thermal stresses. By injecting current during the turn-off transient, an active dv/dt control method is used for voltage balancing. A 6 kV phase-leg using eight 1.7 kV SiC MOSFETs in series-connection has been tested with voltage balanced accurately. Modeling of the stacked SiC MOSFET with active dv/dt control is also done to summarize the design methodology for an effective and stable system. This method provides a low-loss and compact solution for overvoltage problems when MV SiC MOSFETs are connected in series. Furthermore, a scalable auxiliary power network is proposed to prevent gate failure caused by unstable gate voltage or EMI interference. The two-stage auxiliary power network (APN) architecture includes a wireless power transfer (WPT) converter supplied by a grounded low voltage dc bus, a high step-down-ratio (HSD) converter powered from dc-link capacitors, and a battery-based mini-UPS backup power supply. The auxiliary-power-only pre-charge and discharge circuits are also designed for a 6 kV power electronics building block (PEBB). The proposed architecture provides a general solution of a scalable and reliable auxiliary power network for the SiC-MOSFET-based MV converter. For the WPT converter, a multi-objective optimization on efficiency, EMI mitigation, and high voltage insulation capability have been proposed. Specifically, a series-series-CL topology is proposed for the WPT converter. With the optimization and new topology, a 120 W, 48 V to 48 V WPT converter has been tested to be a reliable part of the auxiliary power network. For the HSD converter, a novel unidirectional voltage-balancing circuit is proposed and connected in an interleaved manner, which provides a fully modular and scalable solution. A ``linear regulator + buck" solution is proposed to be an integrated on-board auxiliary power supply. A 6 kV to 45 V, 100 W converter prototype is built and tested to be another critical part of the auxiliary power network. / Doctor of Philosophy / The wide bandgap semiconductor enables next-generation power electronics systems with higher efficiency and higher power density which will reduce the space, weight, and cost for power supply and conversion systems, especially for renewable energy. However, by pushing the system voltage level higher to medium-voltage of tens of kilovolts, although the system has higher efficiency and simpler control, the reliability drops. This dissertation, therefore, focusing on solving the possible overcurrent, overvoltage, and gate failure issues of the power electronics system that is caused by the high voltage and high electromagnetic interference environment. By utilizing the inductance of the device, a dual-protection method is proposed to prevent the overcurrent problem. The overcurrent fault can be detected within tens of nanoseconds so that the device will not be destroyed because of the huge fault current. When multiple devices are connected in series to hold higher voltage, the voltage sharing between different devices becomes another issue. The proposed modeling and control method for series-connected devices can balance the shared voltage, and make the control system stable so that no overvoltage problem will happen due to the non-evenly distributed voltages. Besides the possible overcurrent and overvoltage problems, losing control of the devices due to the unreliable auxiliary power supply is another issue. This dissertation proposed a scalable auxiliary power network with high efficiency, high immunity to electromagnetic interference, and high reliability. In this network, a wireless power transfer converter is designed to provide enough insulation and isolation capability, while a switched capacitor converter is designed to transfer voltage from several kilovolts to tens of volts. With the proposed overcurrent protection method, voltage sharing control, and reliable auxiliary power network, systems utilizing medium-voltage wide-bandgap semiconductor will have higher reliability to be implemented for different applications.

This dissertation proposes a high-power, high-frequency and high-density three-level parallel resonant converter for capacitor charging. DC-DC pulsed power converters are widely used in military and medical systems, where the power density requirement is often stringent. The primary means for reducing the power converter size has been to reduce loss for reduced cooling systems and to increase the frequency for reduced passive components. Three-level resonant converters, which combine the merits of the three-level structure and resonant converters, are an attractive topology for these applications. The three-level configuration allows for the use of lower-voltage-rating and faster devices, while the resonant converter reduces switching loss and enhances switching capability. This dissertation begins with an analysis of the influence of variations in the structure of the resonant tank on the transformer volume, with the aim of achieving a high power density three-level DC-DC converter. As one of the most bulky and expensive components in the power converter, the different positions of the transformer within the resonant tank cause significant differences in the transformer's volume and the voltage and current stress on the resonant elements. While it does not change the resonant converter design or performance, the improper selection of the resonant tank structure in regard to the transformer will offset the benefits gained by increasing the switching frequency, sometimes even making the power density even worse than the power density when using a low switching frequency. A methodology based on different structural variations is proposed for a high-density design, as well as an optimized charging profile for transformer volume reduction. The optimal charging profile cannot be perfectly achieved by a traditional output-voltage based variable switching frequency control, which either needs excess margin to guarantee ZVS, or delivers maximum power with the danger of losing ZVS. Moreover, it cannot work for widely varied input voltages. The PLL is introduced to overcome these issues. With PLL charging control, the power can be improved by 10% with a narrow frequency range. The three-level structure in particular suffers unbalanced voltage stress in some abnormal conditions, and a fault could easily destroy the system due to minimized margin. Based on thoroughly analysis on the three-level behaviors for unbalanced voltage stress phenomena and fault conditions, a novel protection scheme based on monitoring the flying capacitor voltage is proposed for the three-level structure, as well as solutions to some abnormal conditions for unbalanced voltage stresses. A protection circuit is designed to achieve the protection scheme. A final prototype, built with a custom-packed MOSFET module, a SiC Schottky diode, a nanocrystalline core transformer with an integrated resonant inductor, and a custom-designed oil-cooled mica capacitor, achieves a breakthrough power density of 140W/in3 far beyond the highest-end power density reported (<100 W/in3) in power converter applications. / Ph. D.

The modular multi-level converter (MMC) is the most prominent interface converter used between the HVDC grid and the HVAC grid. One of the important design challenges in MMC is to reduce the capacitor size. In the current practice, a rather large capacitor bank is required to store line-frequency related circulating energy, even though a number of control strategies have been introduced to reduce the capacitor voltage ripples. In the present paper, a novel control strategy is proposed by means of harmonic injections in conjunction with gain control to completely eliminate both the line frequency and the second-order harmonic of the capacitor voltage ripple. Ideally, the proposed method works with the full bridge topology. However, the concept also works with half bridge topology with a significant reduction of line frequency related ripple. To gain a better understanding of the nature of circulating energy and the means of reducing it, the method of state plane analysis is employed to offer visual support. In addition, the design trade-off between full bridge MMC and half bridge MMC is presented and a novel control strategy for a hybrid MMC is proposed. Finally, the work is supported with a scaled down hardware demonstration. / Master of Science

This thesis presents an investigation into the characteristics of and driving methods for light emitting diode (LED) lamp system. A comprehensive overview on the lighting development is proposed. The characteristic of the light emitting diode (LED) lamp is described and the requirements of the ballast for the light emitting diode (LED) lamp are presented. Although LED lamps have longer lifetime than fluorescent lamps, the short lifetime limitation of LED driver imposed by electrolytic capacitor has to be resolved. Therefore, an LED driver without electrolytic capacitor in the whole power conversion process is preferred. In this thesis, a single phase, power factor correction converter without electrolytic capacitors for LED lighting applications is proposed, which is a modified SEPIC converter working in discontinuous conduction mode (DCM). Different with a conventional SEPIC converter, the middle capacitor is replaced with a valley-fill circuit. The valley-fill circuit could reduce the voltage stress of output diode and middle capacitor under the same power factor condition, thus achieving higher efficiency. Instead of using an electrolytic capacitor for the filter, a polyester capacitor of better lifetime expectancy is used. An interleaved power factor correction SEPIC with valley fill circuit is proposed to further increase the efficiency and to reduce the input and output filter size and cost. The interleaved converter shows the features such as ripple cancellation, good thermal distribution and scalability. / Master of Science

The Class-E topology was presented as a single-switch power amplifier with high efficiency at the optimum condition, where the switch enjoys zero-voltage switching (ZVS) and zero-voltage-derivative switching (ZDS). It is also used in MHz dc-dc converters, and in inverters for wireless power transfer, induction heating, and plasma pulsing. The load current in these applications usually varies over a range. Efficiency of a conventional Class-E design degrades dramatically due to the hard switching beyond the optimum conditions. Keeping ZVS with load change in a Class-E topology is preferred within the load range. Soft switching with load variation is realized by duty cycle modulation with additional transformer, matching network, or resistance compression network. Since two ZVS requirements need to be satisfied in a conventional Class-E design, at least two parameters are tuned under load variation. Thus, changing switching frequency, duty cycle, and component values were used. Impressively, a load-independent Class-E inverter design was presented in 1990 for maintaining ZVS and output voltage under a given load change without tuning any parameters, and it was validated with experimental results recently. The operating principle of this special design (inconsistent with the conventional design) is not elucidated in the published literatures. Load-independency illucidation by a Thevenin Model – A Thevenin model is then established (although Class-E is a nonliear circuit) to explain the load-independency with fixed switching frequency and duty cycle. The input block of a Class-E inverter (Vin, Lin, Cin, and S) behaves as a fixed voltage source vth1 and a fixed capacitive impedance Xth1 in series at switching frequency. When the output block (Lo and Co) is designed to compensate Xth1, the output current phase is always equal to the phase of vth1 with resistive load (satisfies the ZVS requirement of a load-independent design). Thus, soft switching is maintained within load variation. Output voltage is equal to vth1 since Xth1 is canceled, so that the output voltage is constant regardless of output resistance. Load-independency is achieved without adding any components or tuning any parameters. Sequential design and tuning of a load-independent ZVS Class-E inverter with constant voltage based on Thevenin Model - Based on the model, it's found that each circuit parameter is linked to only one of the targeted performance (ZVS, fixed voltage gain, and load range). Thus, the sequential design equations and steps are derived and presented. In each step, the desired performance (e.g. ZVS) now could be used to check and tune component values so that ZVS and fixed voltage gain in the desired load range is guaranteed in the final Class-E inverter, even when component values vary from the expectations. The Thevenin model and the load-independent design is then extended to any duty cycles. A prototype switched at 6.78 MHz with 10-V input, 11.3-V output, and 22.5-W maximum output power was fabricated and tested to validate the theory. Soft switching is maintained with 3% output voltage variation while the output power is reduced tenfold. A load-independent ZVS Class-E inverter with constant current by combining constant voltage design and a trans-susceptance network - A load-independent ZVS Class-E inverter with constant current under load variation is then presented, by combining the presented design (generating a constant voltage) and a trans-susceptance network (transferring the voltage to current). The impact of different types and the positions of the networks are discussed, and LCL network is selected so that both constant current and soft switching are maintained within the load variation. The operation principle, design, and tuning procedures are illustrated. The trade-off between input current ripple, output current amplitude, and the working load range is discussed. The expectations were validated by a design switched at 6.78 MHz with 10-V input, 1.4-A output, and 12.6-W maximum output power. Soft switching is maintained with 16% output current varying over a 10:1 output power range. A "ZVS" Class-E dc-dc converter by adding a diode rectifier bridge and compensate the induced varying capacitance at full-load condition - The load-independent Class-E design is extended to dc-dc converter by adding a diode rectifier bridge followed by the Class-E inverter. The equivalent impedance seen by the inverter consists of a varying capacitance and a varying resistance when the output changes. As illustrated before, ZVS and constant output can only be maintained with resistive load. Since the varying capacitance cannot be compensated for the whole load range, performance with using different compensation is discussed. With the selected full-load compensation, ZVS is achieved at full load condition and slight non-ZVS occurs for the other load conditions. The expectation was validated by a dc-dc converter switched at 6.78 MHz with 11 V input, 12 V output, and 22 W maximum output power. ZVS (including slight non-ZVS) is maintained with 16% output voltage variation over 20:1 output power range. Design of variable Capacitor by connecting two voltage-sensitive capacitors in series and controlling the bias voltage of them - The equivalent varying capacitance in the Class-E dc-dc converter can be compensated in the whole load range only with variable component. The sensitivity of a Class-E power conversion can also be improved by using variable capacitors. Thus, a Voltage Controlled Capacitor (VCC) is presented, based on the intrinsic property of Class II dielectric materials that permittivity changing much with electric field. Its equivalent circuit consists of two identical Class II capacitors in series. By changing the voltage of the common point of the two capacitors (named as control voltage), the two capacitance and the total capacitance are both changed. Its operation principle, measured characteristic, and the SPICE model are illustrated. The capacitance changes from 1 μF to 0.2 μF with a control voltage from 0 V to 25 V, resulting a 440% capacitance range. Since the voltage across the two capacitors (named as output voltage) also affects one of the capacitance when control voltage is applied, the capacitance range drops to only 40% with higher bias in the output voltage. Thus, a Linear Variable Capacitor (LVC) is presented. The equivalent circuit is the same as VCC, while one of the capacitance is designed much higher to mitigate the effect of output voltage. The structure, operational principle, required specifications, design procedures, and component selection were validated by a design example, with 380% maximum capacitance range and less than 20% drop in the designed capacitor voltage range. This work contributes to • Analytical analysis and Thevenin Model in load-independent Class-E power conversion • Variable capacitance with wide range / Doctor of Philosophy / The Class-E topology was presented as a single-switch power amplifier with high efficiency at the optimum condition. Efficiency of a conventional Class-E design degrades with load variation dramatically due to the hard switching beyond the optimum conditions. Since two requirements need to be satisfied for soft switching in a conventional Class-E design, at least two parameters are tuned under load variation. Impressively, a load-independent Class-E inverter design was presented for maintaining Zero-Voltage-Switching (ZVS) and output voltage under a given load change without tuning any parameters, and it was validated with experimental results recently. A Thevenin model is established in this work to explain the realization of load-independency with fixed switching frequency and duty cycle. Based on that, a sequential design and tuning process is presented. A prototype switched at 6.78 MHz with 10-V input, 11.3-V output, and 22.5-W maximum output power was fabricated and tested to validate the theory. Soft switching is maintained with 3% output voltage variation while the output power is reduced tenfold. A load-independent ZVS Class-E inverter with constant current under load variation is then presented, by combining the presented design and a trans-susceptance network. The expectations were validated by a design switched at 6.78 MHz with 10-V input, 1.4-A output, and 12.6-W maximum output power. Soft switching is maintained with 16% output current varying over a 10:1 output power range. The load-independent Class-E design is extended to dc-dc converter by adding a diode rectifier bridge, inducing a varying capacitance. With the selected full-load compensation, ZVS is achieved at full load condition and slight non-ZVS occurs for the other load conditions. The expectation was validated by a dc-dc converter switched at 6.78 MHz with 11 V input, 12 V output, and 22 W maximum output power. ZVS (including slight non-ZVS) is maintained with 16% output voltage variation over 20:1 output power range. The varying capacitance in the Class-E dc-dc converter needs variable component to compensate. Thus, a Voltage Controlled Capacitor (VCC) is presented. The capacitance changes from 1 μF to 0.2 μF with a control voltage from 0 V to 25 V, resulting a 440% capacitance range. The capacitance range drops to only 40% with higher bias in the output voltage. Thus, a Linear Variable Capacitor (LVC) is presented, with 380% maximum capacitance range and less than 20% drop in the designed capacitor voltage range.

This thesis presents a novel Resonant Switched-Capacitor Converter with Multiple Resonant Frequencies, abbreviated as MRSCC for both high density and efficiency non-isolated large step-down Intermediate Bus Converter (IBC). Conventional Resonant Switched-Capacitor Converter (RSCC) proposed by Shoyama and its high voltage conversion ratio derivation such as Switched-Tank Converter (STC) by Jiang and li employ half sinusoidal-current charge transfer method between capacitors to achieve high efficiency and density operation by adding a small resonant inductor in series to pure switched-capacitor converter's (SCC) flying capacitor. By operating switching frequency to be the same as its resonant frequency, RSCC achieves zero-current turn off operation, however, this cause RSCC and its derivation suffer from component variation issue for high-volume adoption. Derived from RSCC, MRSCC adds additional high frequency resonant component, operates only during its dead-time, by adding small capacitor in parallel to RSCC's resonant inductor. By operating switching frequency higher than its main resonant frequency, MRSCC utilizes double chopped half-sinusoidal current charge transfer method between capacitors to further improve efficiency. In addition, operating switching frequency consistently higher than its resonant frequency, MRSCC provides high immunity towards component variation, making it and its derivation viable for high-volume adoption. / MS / Following the recent trend, most internet services are moving towards cloud computing. Large data applications and growing popularity of cloud computing require hyperscale data centers and it will continue to grow rapidly in the next few years to keep up with the demand [4]. These cutting-edge data centers will require higher performance multi-core CPU and GPU installations which translates to higher power consumption. From 10MWatts of power, typical data centers deliver only half of this power to the computing load which includes processors, memory and drives. Unfortunately, the rest goes to losses in power conversion, distribution and cooling [5]. Industry members look into increasing backplane voltage from 12V to 48V in order to reduce distribution loss. This thesis proposes a novel Resonant Switched-Capacitor Converter using Multiple Resonant Frequencies to accommodate this increase of backplane voltage.

Auxiliary power supply (APS) plays a key role in ensuring the safe operation of the main circuit elements including gate drivers, sensors, controllers, etc. in medium voltage (MV) silicon carbide (SiC)-based converter systems. Such a converter requires APS to have high insulation capability, low common-mode coupling capacitance (Ccm ), and high-power density. Furthermore, considering the lifetime and simplicity of the auxiliary power supply system design in the MV converter, partial discharge (PD) free and multi-load driving ability are the additional two factors that need to be addressed in the design. However, today’s state-of-the-art products have either low power rating or bulky designs, which does not satisfy the demands. To improve the current designs, this thesis presents a 1 MHz isolated APS design using gallium nitride (GaN) devices with MV insulation reinforcement. By adopting LCCL-LC resonant topology, the proposed APS is able to supply multiple loads simultaneously and realize zero voltage switching (ZVS) at any load conditions. Since high reliability under faulty load conditions is also an important feature for APS in MV converter, the secondary side circuit of APS is designed as a regulated stage. To achieve MV insulation (> 20 kV) as well as low Ccm value (< 5 pF), a current-based transformer with a single turn structure using MV insulation wire is designed. Furthermore, by introducing different insulated materials and shielding structures, the APS is capable to achieve different partial discharge inception voltages (PDIV). In this thesis, the transformer design, resonant converter design, and insulation strategies will be detailly explained and verified by experiment results. Overall, this proposed APS is capable to supply multiple loads simultaneously with a maximum power of 120 W for the sending side and 20 W for each receiving side in a compact form factor. ZVS can be realized regardless of load conditions. Based on different insulation materials, two different receiving sides were built. Both of them can achieve a breakdown voltage of over 20 kV. The air-insulated solution can achieve a PDIV of 6 kV with Ccm of 1.2 pF. The silicone-insulated solution can achieve a PDIV of 17 kV with Ccm of 3.9 pF. / M.S. / Recently, 10 kV silicon carbide (SiC) MOSFET receives strong attention for medium voltage applications. Asit can switch at very high speed, e.g. > 50 V/ns, the converter system can operate at higher switching frequency condition with very small switching losses compared to silicon (Si) IGBT [8]. However, the fast dv/dt noise also creates the common mode current via coupling capacitors distributed inside the converter system, thereby introducing lots of electromagnetic interference (EMI) issues. Such issues typically occur within the gate driver power supplies due to the high dv/dt noises across the input and output of the supply. Therefore, the ultra-small coupling capacitor (<5 pF) of a gate driver power supply is strongly desired.[37] To satisfy the APS demands for high power modular converter system, a solution is proposed in this thesis. This work investigates the design of 1 MHz isolated APS using gallium nitride (GaN) devices with medium voltage insulation reinforcement. By increasing switching frequency, the overall converter size could be reduced dramatically. To achieve a low Ccm value and medium voltage insulation of the system, a current-based transformer with a single turn on the sending side is designed. By adopting LCCL-LC resonant topology, a current source is formed as the output of sending side circuity, so it can drive multiple loads importantly with a maximum of 120 W. At the same time, ZVS can use realized with different load conditions. The receiving side is a regulated stage, so the output voltage can be easily adjusted and it can operate in a load fault condition. Different insulation solutions will be introduced and their effect on Ccm will be discussed. To further reduce Ccm, shielding will be introduced. Overall, this proposed APS can achieve a breakdown voltage of over 20 kV and PDIV up to 16.6 kV with Ccm<5 pF. Besides, multi-load driving ability is able to achieve with a maximum of 120 W. ZVS can be realized. In the end, the experiment results will be provided.

Two new classes of soft switching pulse-width-modulated (PWM) converters, named zero-voltage-switched (ZVS) PWM converters and zero-voltage-transition (ZVT) PWM converters, are proposed. The proposed ZVS-PWM converters combine the merits of conventional PWM and ZVS-QRC techniques. They are capable of regulating the output for a wide load and input voltage range while maintaining constant-frequency operation. By employing a saturable inductor, the load range under which ZVS is maintained can be significantly extended without increasing the voltage stress of the power switch. The parasitic oscillations between the diode junction capacitance and the resonant inductor are also significantly reduced. In the new class of ZVT-PWM converters, both the power switch and the rectifier diode are operated with zero-voltage switching, and are subjected to low voltage and current stresses associated with those in their PWM counterparts. Thus switching losses are significantly reduced at a slight increase in conduction losses. In addition, the circuit optimization is simplified because of constant-frequency operation. The operation principles of the proposed converters are described by using several examples. Several breadboarded converters are implemented to verify the theoretical analysis and to demonstrate the feasibility of the proposed technologies. / Master of Science