The English language could be considered to be a second language in Swedish society; it is present in more than just school, such as television, the world of computers and radio. The general field of interest for this study is an exchange between two schools, one located in Sweden and one in Italy, called the Da Vinci Project. The aim of the study is to get an insight into the effects on language development for the students participating in the project. The study focuses on exposure and error-feedback. The information was gathered using both interviews and questionnaires with students and teachers and I had the opportunity to visit the students when attending the school in Italy. Visiting the school in Italy made it easier to understand both the Italian and the Swedish students’ experience of a different school system than they were accustomed to. The results have been analyzed and it was possible to draw conclusions concerning the students’ language development as a result of meeting different teaching methods in the different school systems. The teachers’ answers provided important information about different teaching methods. Using theoretical approach to second language acquisition the results have been analyzed. Stephen Krashen’s monitor model has been an important component in analyzing the results. The results of the survey showed that the Da Vinci Project involves two totally different school systems using different methods when focusing on error-feedback and exposure. A “gap” was found between the two schools but the results of this survey show that for some students it has been their second language, English, has improved through the exchange. While a few students, in the Da Vinci Project, believe that they have not developed in their second language.

Since the early 80s, the computer industry has undergone great expansion. Processors are becoming faster and more powerful. Power management issues in computing systems are becoming more and more complex and challenging. An evolution began when the high-performance Pentium processor was driven by a non-standard, less-than-5V power supply, instead of drawing its power from the 5V plane on the system board. A so-called Voltage Regulator Module (VRM) is put close to the processor in order to provide the power as quickly as possible. Nowadays, for desktop and workstation applications, VRM input voltage has moved to the 12V output of the silver box. In the meantime, microprocessors will run at very low voltage (below 1V), will consume up to 100A of current, and will have dynamics of about 400A/us. In the near future, VRM will be replaced with VRD because of the parasitic components effect. The specifications requirements for VRD are even more challenging than VRM. With this kind of tight tolerance, high current and fast current slew rate, transient response requirements for VRD design are very challenging, especially for step-down transient. During step-down transient, there is some additional energy stored in inductor. Traditional switching regulator like multi-phase buck can do nothing for this even by saturating the duty cycle to 0. All of the additional energy in inductor will be dumped into output cap and cause a large voltage spike at the output voltage. Even for step-up transient, traditional linear control like voltage loop control can't provide enough bandwidth because of the slow compensation and slow slew rate of the error amplifier. So the voltage drop is still quite large. Comparing with traditional linear controlled switching regulator such as voltage control and current control buck converter, active clamp has a lot of the advantages for the transient response. With proper design, active clamp can generate a very high bandwidth since there is no compensator needed in the control loop. Since active clamp bypasses inductor and is connected directly to the output cap, it can quickly source and sink current from the output cap even during the step-down transient and prevent overshooting of the output voltage. This is the biggest advantage for active clamp comparing with traditional linear control. In this thesis, a new active clamp structure is proposed. Several new concepts are proposed like non-linear Gm, built-in offset Gm, error signal feedback and AVP design. A one-channel buck converter with new active clamp and voltage loop control is implemented and verified using real transistors based on 0.5um CMOS process. / Master of Science

Non-convex optimization problems appear in various applications of machine learning. Because of their practical importance, these problems gained a lot of attention in recent years, leading to the rapid development of new efficient stochastic gradient-type methods. In the quest to improve the generalization performance of modern deep learning models, practitioners are resorting to using larger and larger datasets in the training process, naturally distributed across a number of edge devices. However, with the increase of trainable data, the computational costs of gradient-type methods increase significantly. In addition, distributed methods almost invariably suffer from the so-called communication bottleneck: the cost of communication of the information necessary for the workers to jointly solve the problem is often very high, and it can be orders of magnitude higher than the cost of computation. This thesis provides a study of first-order stochastic methods addressing these issues. In particular, we structure this study by considering certain classes of methods. That allowed us to understand current theoretical gaps, which we successfully filled by providing new efficient algorithms.

自1970年代以後，由於整體經濟的波動（二次的石油危機、浮動匯率的採行、金融制 度的創新等），使得傳統貨幣需求部分調整的均衡模型已無法估計出正確的貨幣需求 量，更由於結構斷裂（structure dreak ）的產生，使得估計方程式產生不穩定的現 象，因此，乃有部分學者嘗試用其它調整模型來解釋此貨幣市場的失衡現象，一派是 用失誤反饋（error feedback）模型，一派則是緩衝存量（buffer stock）模型，以 台灣典型的海島經濟國家，而對外貿易依存度如此高的情況，近年來，由於長期而不 斷的順差，累積了巨額的外匯，引發國內貨幣供給的劇增，對貨幣市場造成了衝擊效 果，本論文嘗試以上面二調整模型來解釋台灣的貨幣需求函數行為，全文共一冊，約 4 萬字，章節如下： 第一章 導論 第一節：研究動機與目的 第二節：研究方法與架構 第二章 失誤反饋模型與前瞻橫型 第一節：文獻回顧 第二節：理論模型探討 第三節：計量模型的設定 第四節：台灣的實證分析 第三章 緩衝存量模型 第一節：理論背景 第二節：與傳統貨幣存量調整模型比較 第三節：台灣實證計量模型的設定與分析 第四章 結論

With the advances in wireless communication technology over last two decades, the use of fractional-N frequency synthesizers has increased widely in modern wireless communication applications due to their high frequency resolution and fast settling time. The performance of a fractional-N frequency synthesizer is degraded due to the presence of unwanted spurious tones (spurs) in the output spectrum. The Digital Delta-Sigma Modulator can be directly responsible for the generation of spur because of its inherent nonlinearity and periodicity. Many deterministic and stochastic techniques associated with the architecture of the DDSM have been developed to remove the principal causes responsible for production of spurs. The nonlinearities in a frequency synthesizer are another source for the generation of spurs. In this thesis we have predicted that specific nonlinearities in a fractional-N frequency synthesizer produce spurs at well-defined frequencies even if the output of the DDSM is spur-free. Different spur free DDSM architectures have been investigated for the analysis of spurious tones in the output spectrum of fractional-N frequencysynthesizers. The thesis presents simulation and experimental investigation of mechanisms for spur generation in a fractional-N frequency synthesizer. Simulations are carried out using the CppSim system simulator, MATLAB and Simulink while the experiments are performed on an Analog Devices ADF7021, a high performance narrow-band transceiver IC.