[pt] Este trabalho de Tese apresenta a pesquisa e desenvolvimento de conexões de ondas guiadas sobre substratos semicondutores (SiGe, GaAs). A integração de circuitos digitais através de guias S-SIWG (Semiconductor Substrate Integrated Waveguide) utilizando formato de modulação QAM é avaliada e destacada. Conexões internas aos chips e entre chips são associadas com o novo padrão Gigabit Ethernet 802.3ba operando na taxa de 100 Gbit/s estendendo-se a aplicações de 0,5 – 1,5 Terahertz. É também apresentada a pesquisa e o desenvolvimento de guias e dispositivos de microondas utilizando substratos de baixo custo e altas perdas (FR-4), substratos cerâmicos de alta constante dielétrica (Er igual a 80) e aplicações em subsistemas híbridos integrados. / [en] This work presents the research, design and development of guided waves connections in semiconductor substrates (SiGe, GaAs). The integration of digital systems using Semiconductor Wave Guides (S-SIWG) with QAM modulation formats are highlighted. Ultra-fast inter-chip and inner-chip connections are associated with the new Gigabit Ethernet IEEE 802.3ba standard at 100Gbit/s extended to (0.5-1.5) Terahertz domain. Additionally fiber glass substrates with high losses (Teflon/FR-4) and high dielectric ceramic substrates (Er equal 80) are also developed to be integrated with microwave devices, analog printed circuits boards and high Speed digital circuits and systems.

Background: Many systems that Enea Epact AB develops for theirs customers communicates with computers. In order to meet the customers demands on cost effective solutions, Enea Epact wants to know if it is possible to implement a gigabit Ethernet controller in an FPGA. The controller shall be designed with the intent to meet the requirements of IEEE 802.3. Aim: Find out if it is feasible to implement a gigabit Ethernet controller using an FPGA. In the meaning of feasible, certain constraints for size, speed and device must be met. Method: Get an insight of the standard IEEE 802.3 and make a rough design of a gigabit Ethernet controller in order to identify parts in the standard that might cause problem when implemented in an FPGA. Implement the selected parts and evaluate the results. Conclusion: It is possible to implement a gigabit Ethernet controller using an FPGA and the FPGA does not have to be a state-of-the-art device.

The rapid growth of universities in the Least Developing Countries (LDCs) is aimed at enhancing access to tertiary education, which has resulted in a sharp increase in the enrolment rate. However, the quantitative increase has been marred with a correspondingly continuous decline in the quality of education. This is attributed to a wide range of limiting factors mainly classified as institutional problems. Some of these problems include a shortage of resources, limited skills and incompetent human capital, lack of ICT infrastructure, and the ineffective use of existing ICT resources. These problems and others have adversely affected how national education and research network can improve research output and quality of education. In this study, a survey, in the form of an exploratory quantitative research design is used. A descriptive non-experimental quantitative approach was also chosen, and a questionnaire was administered to approximately one hundred and seventy-two (172) participants drawn from twenty-nine (29) Ethiopian Public Universities. The results of the analysis show that the study variables namely NREN service for education, EthERNet, electronic device and research output have a significant and positive impact on the Quality of Education (QE) to differing degrees. Also, the study variables such as NREN service for research, high-performance computing, and remote computing facilities indicated that they had a significant and positive impact on Research Output (RO) to differing degrees. The study explored the impact of EthERNet in improving the quality of education and research output by examining the existing network infrastructure and NREN services. The study employed the use of the Actor-Network Theory (ANT) to assess the existing network infrastructure and NREN services to determine that a reliable network can improve the quality of education and research output. Besides, Structural Equation Model (SEM) was used to identify the positive and negative factors that impact on the roles, relationships, and formation of quality of education and research output. Furthermore, a three-step design science approach was applied to propose and justify the theoretical framework, which is used as a base to develop a service portfolio and roadmap conceived to design the required NREN service for EthERNet. This research contributed to the body of knowledge by finding the missing link between the quality of education and research outputs. From a theoretical perspective, the research contributed a theoretical framework by developing the construct and their measures that can be used in assessing the adoption and usage of technology. Furthermore, the study contributes to the literature by demonstrating an analytical process which could be used as a guide for future NREN service requirement to improve the quality of education and research output with the existing findings being used as a reference point. / School of Computing / Ph. D. (Computer Science)

The primary goal of this thesis is to exploit possibilites of aa entirely new hardware based on NXP LS2088 and FPGA. The secondary goal is to create firmware for this processor working out-of-box and perform optimisations of existing software for L7 analysis. This software was deeply bound to a previous hardware platform. The network processor NXP LS2088 contains many hardware accellerators and a virtual reconfigurable network. This thesis exploits all hardware parts of on this platform. Many tweaks and optimizations were performed based on this analysis to achieve maximum efficieny of software for L7 analysis. There were many intensive optimisations like rewriting for the DPDK library and new hardware or hardware synchronization of worker threads of this application. The main result of this thesis is working platform with efficient L7 analysis software which actively uses accelerators in FPGA and NXP network processor. SDK for new platform is also prepared.

The diploma thesis is focused on the building embedded demonstration application of the proprietary Low Complexity Ethernet module for industrial usage further called the LEN/LES 2. At the first, main used technologies such as MCU, or the lightweight IP stack is discussed, Consequently, there is detailed view on system hardware architecture proposed by hardware and software requirements. Then though part describes blocks of embedded system are in term of specific parts and hardware requirements to create universal board. Following chapters expresses first startup and known hardware bugs, LWIP implementation and MODBUS system implementation. The core of the system is the new released microcontroller an ADuCM4050 and the Low Complexity Ethernet MAC-PHY prototype block and much more dependent convenient peripherals of the MCU based application.

This work deals with the issue of PLC with a focus on BPL technology (Broadbandover-power lines), which is explained in the theoretical part. The work describes in detailthe main components for PCB design with manufacturing and mounting process. Fur-thermore, the thesis provides instructions on how to establish communication betweenBPL modems and a description of individual functions. In conclusion, the procedureof measuring the noise intensity in the 230 V power line is described with the results.The output of the diploma thesis is the selection of components and the implementationof printed circuit boards for two BPL modems. These modems allow to measure SNR(signal to noise ratio) at physical speed.

This thesis deals with the analysis of the actuator ACOPOS and its accessories. There are described the cascaded control loop concept and the setting servomechanism from B&R Automation with the important parameters. We follow the draft a speed controller servomotor with a load with the regards to knowledge of the control system. We compare the different methods of labor control actuator at last. There are implemented laboratory tasks of Position servomechanism and speed servo controller-on-load as a demonstration of our achieved results.

The dissertation deals with a design of an intelligent transmitter of a standard current signal with an Ethernet output port, an implementation of a web interface and Modbus TCP protocol for providing data protection. The introductory part describes standardized analogue technical signals with their possibilities, and characteristics of industrial Ethernet. The subsequent part provides an overview of alternatives to connect analogue signals to Ethernet while using various modules. The thesis continues with a suggestion of an analogue input side of the transmitter in connection with a digital module of Ethernet based on the Rabbit processor in connection with the RCM3200 module. The key part of the dissertation puts forward a proposal of the firmware transmitter and control web interface, shows ways of providing figures measured by the current loop via Ethernet interface for further processing. The final part is devoted to a description of current transmitter ultimate measurement.

This thesis deals with methods of remote maintenance of microcontroller systems based on Atmel AVR family over the Ethernet interface and TCP/IP protocols. To create communication through TCP/IP, an embedded server NE-4100T is used. At the beginning, key features of the server and methods of handling with content of a program memory are discussed. The final solution is based on the bootloader method. It includes bootloader firmware and user program for PC. The hardware part covers design of interconnection electronics, DC-DC step down converter, real time clock and printed circuit board. The remote maintenance of program memory has been sucessfully solved, but the embedded server NE-4100T produces a problem with an auhentification without a sufficient solution.

The aim of Master thesis "Control and monitoring unit for optical link station" is a web server, enabling communication microcontroller with the user. The communication is based on TCP/IP model. Work an overview of the various parts of the TCP/IP model. The main part of this work is devoted to the software created. The core of unit are microcontroller C8051F120 and ethernet controller CP2200 made by Silicon Laboratories.