In this thesis, we are concerned with content dissemination in mobile ad hoc networks. The scope of content dissemination is limited by network capacity, and sometimes the price to be paid for securing faster delivery. In the first part of the thesis, we address the issue of finding the maximum throughput that a mobile ad-hoc network can support. We have assumed that there is no price involved, and all nodes work as a team. The problem of determining the capacity region has long been known to be NP-hard even for stationary nodes. Mobility introduces an additional dimension of complexity because nodes now also have to decide when they should initiate route discovery. Since route discovery involves communication and computation overhead, it should not be invoked very often. On the other hand, mobility implies that routes are bound to become stale, resulting in sub-optimal performance if routes are not updated. We attempt to gain some understanding of these effects by considering a simple one-dimensional network model. The simplicity of our model allows us to use stochastic dynamic programming (SDP) to find the maximum possible network throughput with ideal routing and medium access control (MAC) scheduling. Using the optimal value as a benchmark, we also propose and evaluate the performance of a simple threshold-based heuristic. Unlike the optimal policy which requires considerable state information, the proposed heuristic is simple to implement and is not overly sensitive to the threshold value. We find empirical conditions for our heuristic to be near-optimal. Also, network scenarios when our heuristic does not perform very well are analyzed. We provide extensive numerical analysis and simulation results for different parameter settings of our model. Interestingly, we observe that in low density network the average throughput can first decrease with mobility, and then increase. This motivates us to study a mobile ad-hoc network when it is sparse and in a generalized environment, such as when movement of nodes is in a two-dimension plane. Due to sparseness, there are frequent disruptions in the connections and there may not be any end-to-end connection for delivery. The mobility of nodes may be used for carrying the forwarded message to the destination. This network is also known as a delay tolerant network. In the rest part of the thesis, we consider the relay nodes to be members of a group that charges a price for assisting in message transportation. First, we solve the problem of how to select first relay node when only one relay node can be chosen from a given number of groups. Next, we solve two problems, namely price-constrained delay minimization, and delay-constrained price optimization.

Nous étudions plusieurs problémes reliés aux propriétés de transport dans les systèmes corrélés. La thèse contient 3 parties distinctes, chacune d'entre elles décrivant un aspect particulier. Nous avons obtenu dans chacun des cas des résultats qui permettent une meilleure compréhension du transport. Nous étudions l'effet de la dissipation et d'une perturbation extérieure dépendant du temps sur le diagramme de phases d'un systèmes à N corps à température nulle et à température finie. En présence de perturbation dépendant du temps, la dissipation joue un rôle important dans l'évolution vers un état stable indépendant du temps. Nous utilisons le formalisme de Keldysh dans l'approximation adiabatique qui permet d'étudier le diagramme de phases du système en fonction de parameter et de la température. Dans la 2ième partie, nous étudions un concept important pour la physique des systèmes métalliques à plusieurs bandes, le concept d'hybridation, et la façon dont l'hybridation affecte la supraconductivité du métal. De façon générale, une hybridation dépendante ou non du vecteur d'onde k a tendance à détruire la supraconductivité. Nous montrons dans ce chapitre qu'une hybridation antisymétrique a l'effet inverse et renforce la supraconductivité. Nous montrons que si l'hybridation est antisymétrique, la supraconductivité a des propriétés non-triviales. Nous proposons que dans un tel système, il puisse exister des fermions de Majorana, même en l'absence de couplage spin-orbite. Le dernier chapitre de la thèse porte sur les effets du couplage spin-orbite sur le transport dans les nanostructures magnétiques. Dans les nanostructures, le couplage spin-orbite joue un rôle important en raison de la brisure de symmétrie à la surface ou aux interfaces. En particulier, nous étudions l'effet de l'interaction Dzyaloshinskii-Moriya (DM) sur le transport de spin dans un système tri-couche. Nous montrons qu'il existe une interaction DM entre les moments des couches et les électrons de conduction, et l'influence de cette interaction sur le transport est étudiée dans un modèle simplifié ou chaque couche est représentée par un point. / We study some important problems related to the transport properties of many body systems. It is divided in three parts, each one focusing in a specific topic. We obtain relevant results that improve our understanding of these systems. We investigate the effect of dissipation and time-dependent external sources, in the phase diagram of a many body system at zero and finite temperature. In the presence of time-dependent perturbations, dissipation is essential for the system to attain a steady, time independent state. In order to treat this time dependent problem, we use a Keldysh approach within an adiabatic approximation that allows us to study the phase diagram of this system as a function of the parameters of the system and temperature. We also discuss the nature of the quantum phase transitions of the system. Next, we study an important concept in the physics of metallic multi-band systems, that of hybridization, and how it affects the superconducting properties of a material. A constant or symmetric $k$-dependent hybridization in general act in detriment of superconductivity. We show here that when hybridization between orbitals in different sites assumes an anti-symmetric character having odd-parity it {it{enhances}} superconductivity. The antisymmetric hybridization in a problem study in this thesis (present in Chapter 3) allow us to propose a new system where it is possible to investigate Majorana fermions, even in absence of spin-orbit interactions. In the last part of this thesis we study the effect of spin-orbit coupling (SOC) on transport properties in magnetic nanostructures. In this system SOC plays an important role, because surfaces (or interfaces) introduce symmetry breaking which is a source of spin-orbit interaction. We study the role of Dzyaloshinshkii-Moriya (DM) interaction on spin-transport in a 3 layer system. We show that there is a DM interaction between magnetics ions in the layers and spin of conduction electrons. We study the influence of this DM interaction on transport within a simple model where each layer is represented by a point.

A novel controller termed as Experience Mapping based Prediction Controller (EMPC) is developed in this work. EMPC is developed utilizing the broad control concepts of human motor control (HMC). The concepts of HMC are utilized to develop the core concepts of EMPC for the control of ideal Type-1 LTI systems. The control accuracy of the developed concepts is studied and the mathematical stability criterion for the controller is developed. The applicability of EMPC for the control of real world problems is tested on a Permanent Magnet DC motor based position control system. 1. Novel learning methods are presented to form experience mapped knowledge-base (EMK) which is used for the creation of the forward and inverse models. 2. Control and Adaptation Techniques which overcome the presence of non idealities are developed using the inverse model. 3. Two separate techniques which utilize the forward model for improving the adaptation capabilities of EMPC are developed. 4. Two novel techniques are developed for the improvement of the tracking performance in terms of the accuracy and smoothness of tracking. These techniques are tested under various system conditions including large dynamic parameter changes on a simulation model and a practical setup. The performance of EMPC is compared against that of PID, MRAC and LQG controllers for all the proposed techniques and EMPC is found to perform significantly better under the various system conditions in terms of transient and steady state characteristics. Finally, the effectiveness of EMPC in stabilizing unstable systems using the concepts developed is tested on a practical Inverted Pendulum system. The problem of the simultaneous development of experiences and control of the system is addressed with the stabilizing problem. The proposed controller, EMPC provides an alternative approach for the existing control of systems without the requirement of an accurate system mathematical model. Its capability to learn by directly interacting with the system and adapt using experiences makes it an attractive alternative to other control techniques present in literature. Keywords: EMPC, Position Control, PMDC motors

Power distribution network (PDN) design was a non-existent entity during the early days of microprocessors due to the low frequency of operation. Once the switching frequencies of the microprocessors started moving towards and beyond MHz regions, the parasitic inductance of the PCB tracks and planes started playing an important role in determining the maximum voltage on a PDN. Voltage regulator module (VRM) sup-plies only the DC power for microprocessors. When the MOSFETs inside a processor switches, it consumes currents during transition time. If this current is not provided, the voltage on the supply rails can go below the specifications of the processor. For lower MHz processors few ceramic-capacitors known as ‘decoupling capacitors’ were connected between power and ground to provide this transient current demand. When the processor frequency increased beyond MHz, the number of capacitors also increased from few numbers to hundreds of them. Nowadays, the PDN is said to be comprising all components from VRM till the die location. It includes VRM, bulk capacitors, PCB power planes, capacitor mounting pads and vias, mount for the electronic package, package capacitors, die mount and internal die capacitance. So, the PDN has evolved into a very complex system over the years. A PDN should provide three distinct roles; 1) provide transient current required by the processor 2) act as a stable reference voltage for processor 3) filter out the noise currents injected by the processor. The first two are required for the correct operation of the processor. Third one is a requirement from analog or other sensitive circuits connected to the same PDN. If the noise exits the printed circuit board (PCB), it can result in conducted and radiated EMI, which can in turn result in failure of a product in EMC testing. Every PDN design starts with the calculation of a target impedance which is given as the ratio of maximum allowed ripple voltage to the maximum transient current required by the processor. The transient current is usually taken as half the average input current. The definition of target impedance assumes that the PDN is flat over the entire frequency of operation, which is true only for a resistive network. This is seldom true for a practical PDN, since it contains inductances and capacitances. Because of this, a practical PDN has an uneven impedance versus frequency envelope. Whenever two capacitors with different self resonant frequencies are connected in parallel, their equivalent impedance produces a pole between the self resonant frequencies known as antiresonance peaks. Because of this, a PDN will have phase angles associated with them. Also, these antiresonance peaks are energy reservoirs which will be excited during the normal operation of a processor by the varying currents. The transient current of a microprocessor is modeled as a gamma function, but for practical cases it can be approximated as triangular waveforms during the transition time which is normally 10% of the time period. Depending upon the micro-operations running inside the processor, the peak value of this waveform varies. This is filtered by the on-chip capacitors, package inductance and package capacitors. Due to power gating, clock gating, IO operations, matrix multiplications and magnetic memory readings the waveforms at the board will be like pulse type, and their widths are determined by these operations. In literatures, these two types of waveforms are used for PDN analysis, depending upon at which point the study is conducted. Chapter 1 introduces the need for PDN design and the main roles of a PDN. The issue of antiresonance is introduced from a PDN perspective. Different types of capacitors used on a PDN are discussed with their strengths and limitations. The general nature of the switching noise injected by a microprocessor is also discussed. This chapter discusses the thesis contributions, and the existing work related to the field. Chapter 2 introduces a new method to calculate the target impedance (Zt ) by including the phase angles of a PDN which is based on a maximum voltage calculation. This new Zt equals to conventional Zt for symmetrical triangular switching current waveforms. The value of new Zt is less than the conventional Zt for trapezoidal excitation patterns. By adding the resonance effects into this, a maximum voltage value is obtained in this chapter. The new method includes the maximum voltage produced on a PDN when multiple antiresonance peaks are present. Example simulations are provided for triangular and pulse type excitations. A measured input current wave-form for PIC16F677 microcontroller driving eight IO ports is provided to prove the assumption of pulse type waveforms. For triangular excitation waveform, the maximum voltage predicted based on the expression was ¡0.6153 V, and the simulated maximum voltage was found to be at ¡0.5412 V which is less than the predicted value. But the predicted value based on Zt method was 1.9845 V. This shows that the conventional as well as the new target impedance method leads to over estimating the maximum voltage in certain cases. This is because most of the harmonics are falling on the minimum impedance values on a PDN. If the PDN envelope is changed by temperature and component tolerances, the maximum voltage can vary. So the best option is to design with the target impedance method. When pulse current excitation was studied for a particular PDN, the maximum voltage produced was -139.39 mV. The target impedance method produced a value of -100.24 mV. The maximum voltage predicted by the equation was -237 mV. So this shows that some times the conventional target impedance method leads to under estimating the PDN voltage. From the studies, it is shown that the time domain analysis is as important as frequency domain analysis. Another important observation is that the antiresonance peaks on a PDN should be damped both in number and peak value. Chapter 3 studies the antiresonance peak suppression methods for general cases. As discussed earlier, the antiresonance peaks are produced when two capacitors with different self resonant frequencies are connected in parallel. This chapter studies the effect of magnetic coupling between the mounting loops of two capacitors in parallel. The mounting loop area contribute to the parasitic inductance of a capacitor, and it is the major contributing factor to it. Other contributing factors are equivalent series inductance (ESL) and plane spreading inductance. The ESL depends on the size and on how the internal plates of the capacitors are formed. The spreading inductance is the inductance contributed by the parts of the planes connecting the capacitor connector vias to the die connections or to other capacitor vias. If the power and ground planes are closer, the spreading inductance is lower. On one/two layer boards dedicated power/ground planes are absent. So the spreading inductance is replaced by PCB track inductances. The inductance contributed by the mounted area of the capacitor is known as mounting inductance. On one/two layer boards dedicated power/ground planes are absent. So the spreading inductance is replaced by PCB track inductances. The dependencies of various circuit parameters on antiresonance peak are studied using circuit theory. A general condition for damping the antiresonance is formulated. The antiresonance peak reduces with Q factor. The conventional critical condition for antiresonance peak damping needs modification when magnetic coupling is present between the mounting loops of two parallel unequal value capacitors. By varying the connection geometry it is possible to obtain negative and positive coupling coefficients. The connection geometries to obtain these two are shown. An example is shown for positive and negative coupling coefficient cases with simulation and experimental results. For the example discussed, RC Æ 32 - for k Æ Å0.6 and RC Æ 64 - for k Æ ¡0.6, where RC is the critical damping value and k is the magnetic coupling coefficient between the two mounting loops. The reason for this is that, the antiresonance peak impedance value is higher for negative coupling coefficient case than that for positive coupling coefficient case. Above the self resonant frequencies of both the capacitors, the equivalent impedance of the parallel capacitors become inductive. This case is studied with two equal value capacitors in parallel. It is shown that the equivalent inductance is lower for negative coupling coefficient case as compared to positive coupling coefficient case. An example is provided with simulation and experimental results. In the experimental results, parasitic inductance is observed to be 2.6 times lower for negative coupling coefficient case than that for positive coupling coefficient case. When equal value capacitors are connected in parallel, it is advantageous to use a negative coupling geometry due to this. Chapter 4 introduces a new method to damp the antiresonance peak using a magnet-ically coupled resistive loop. Reducing the Q factor is an option to suppress the peak. In this new method, the Q factor reduction is achieved by introducing losses by mag-netically coupling a resistive loop. The proposed circuit is analyzed with circuit-theory, and governing equations are obtained. The optimum value of resistance for achieving maximum damping is obtained through analysis. Simulation and experimental results are shown to validate the theory. From the experimental results approximately 247 times reduction in antiresonance peak is observed with the proposed method. Effectiveness of the new method is limited by the magnetic coupling coefficient between the two mounting loops of capacitors. The method can be further improved if the coupling coefficient can be increased at the antiresonance frequency. Chapter 5 focuses on the third objective of a PDN, that is to reduce the noise injected by the microprocessor. A new method is proposed to reduce the conducted noise from a microprocessor with switched super capacitors. The conventional switched capacitor filters are based on the concept that the flying capacitor switching at high frequency looks like a resistor at low frequency. So for using at audio frequencies the flying capacitors were switching at MHz frequencies. In this chapter the opposite of this scenario is studied; the flying capacitors are the energy storage elements of a switched capacitor converter and they switch at lower frequencies as compared to the noise frequencies. Two basic circuits (1:1 voltage conversion ratio) providing noise isolation were discussed. They have distinct steady state input current waveforms and are explained with PSPICE simulations. The inrush current through switches are capable of destroying them in a practical implementation. A practical solution was proposed using PMOS-PNP pair. The self introduced switching noise of the converter is lower when switching frequency is low and turn ON-OFF time is higher. If power metal oxide semiconductor field effect transistor (MOSFET)s are used, the turn ON and turn OFF are slow. The switching frequency can be lowered based on the voltage drop power loss. The governing equations were formulated and simulated. It is found that the switching frequency can be lowered by increasing the capacitance value without affecting the voltage drop and power loss. From the equations, it is found that the design parameters have a cyclic dependency. Noise can short through the parasitic capacitance of the switches. Two circuits were proposed to improve the noise isolation: 1) T switch 2) ¦ switch. Of these, the ¦ switch has the higher measured transfer impedance. Experimental results showed a noise reduction of (40-20) dB for the conducted frequency range of 150 kHz - 30 MHz with the proposed 1:1 switched capacitor converter. One possible improvement of this method is to combine the noise isolation with an existing switched capacitor converter (SCC) topology. The discussed example had a switching frequency of 700 Hz, and it is shown that this can isolate the switching noise in kHz and MHz regions. In a PDN there are antiresonance peaks in kHz regions. If the proposed circuit is kept close to a microprocessor, it can reduce the excitation currents of these low frequency antiresonance peaks. Chapter 6 concludes the thesis by stating the major contributions and applications of the concepts introduced in the thesis. This chapter also discusses the future scope of these concepts.

Le travail de thèse s'intéresse aux effets liés aux agressions MFP et du chaos sur l'électronique. Après une étude théorique et expérimentale du couplage électromagnétique entre deux ports d'accès d'impédance 50 Ω réalisés dans une cavité complexe, un nouveau modèle est proposé pour étendre l'étude aux cas des impédances de rayonnements quelconques en s'appuyant sur le principe de Babinet. L'impact des agressions EM intentionnelles sur les circuits "front-end" des récepteurs comme par exemple les circuits limiteurs lorsque les antennes sont agressées en dehors de leur bande passante a été aussi étudié et validé sur plusieurs types d'antennes pour les applications 2,45 GHz et bande-X. Les résultats montrent que pour certaines conditions, il est possible que l'agression EM génère des signaux chaotiques à l'entrée du récepteur. Enfin, deux sources chaotiques ont été étudiées et caractérisées et la possibilité d'enrichir leur spectre est proposée. / The thesis focuses on the effects associated with HPM and Chaos aggressions on electronics. After a theoretical and experimental study of the electromagnetic coupling between two ports of 50 Ω impedance in a complex cavity, a new model based on Babinet principle is proposed to extend the study to the case of any radiation impedances. The impact of intentional EM attacks on the "front end" receiver circuits such as limiters at outside the antennas bandwidth was also studied and validated on several types of antennas for 2.45 GHz an X-band applications. The results show that for certain conditions, it is possible that EM aggression generates chaotic signals in the front end receivers. Finally, two chaotic sources have been studied and characterized. The opportunity to enhance their spectrum is also proposed.

In recent years, the use of first-principles based atomistic modeling technique has become extremely popular to gain better insights on the various locally modulated electronic properties of nano materials and structures. Atomistic modeling offers the benefit of predicting crystal structures, visualizing orbital distribution and electron density, as well as understanding material properties which are hard to access experimentally. The single layer MoS2 has emerged as a suitable choice for the next generation nano devices, owing to its distinctive electrical, optical and mechanical properties like, better electrostatics, increased photo luminescence, higher mechanical flexibility, etc. The realization of decananometer scale digital switches with the single layer MoS2 as the channel may provide many significant advantages such as, high On/Off current ratio, excellent electrostatic control of the gate, low leakage, etc. However, there are quite a few critical issues such as, forming low resistance source/drain contacts, achieving higher effective mobility, ensuring large scale controlled growth, etc. which need to be addressed for successful implementation of the atomically thin transistors in integrated circuits. Recent experimental demonstration showing the coexistence of metallic and semiconducting phases in the same monolayer MoS2, has attracted much attention for its use in ultra-low contact resistance-MoS2 transistors. Howbeit, the electronic structures of the metallic-to-semiconducting phase boundaries, which appear to dictate the carrier injection in such transistors, are not yet well understood. In this work, we first develop the geometrically optimized atomistic models of the 2H-1T′ hetero-phase structures with two distinct phase boundaries, β and γ. We then apply density functional theory to calculate the electronic structures for those optimized geometries. Furthermore, we employ non equilibrium Green’s function formalism to evaluate the transmission spectra and the local density of states in order to assess the Schottky barrier nature of the phase boundaries. Nonetheless, the symmetry of the source-channel and drain-channel junction, is a unique property of a metal-oxide semiconductor field effect transistor (MOSFET), which needs to be preserved while realizing sub-10 nm channel length devices using advanced technology. Employing experimental-findings-driven atomistic modeling technique, we demonstrate that such symmetry might not be preserved in an atomically thin phase-engineered MoS2- based MOSFET. It originates from the two distinct atomic patterns at phase boundaries (β and β*) when the semiconducting phase (channel) is sandwiched between the two metallic phases (source and drain). Next, using first principles based quantum transport calculations we demonstrate that due to the clusterization of “Mo” atoms in 1T′ MoS2, the transmission along the zigzag direction is significantly higher than that in the armchair direction. Moreover, to achieve excellent impedance matching with various metal contacts (such as, “Au”, “Pd”, etc.), we further develop the atomistic models of metal-1T′ MoS2 edge contact geometries and compute their resistance values. Other than the charge carrier transport, analysing the heat transport across the channel is also crucial in designing the ultra-thin next generation transistors. Hence, in this thesis work, we have investigated the electro-thermal transport properties of single layer MoS2, in quasi ballistic regime. Besides the perfect monolayer in its pristine form, we have also considered various line defects which have been experimentally observed in mechanically exfoliated MoS2 samples. Furthermore, a comprehensive study on the phonon thermal conductivity of a suspended monolayer MoS2, has been incorporated in this thesis. The studies presented in this thesis could be useful for understanding the carrier transport in atomically thin devices and designing the ultra-thin next generation transistors.

CNPq;CAPES / Neste trabalho é investigado o uso de codificação analógica conjunta fonte-canal em uma rede de sensores sem fio onde a fonte de informação é alimentada pelo destino por meio de transmissões de rádio frequência. É assumido que o destino não possui restrições energéticas. Logo após coletar energia do destino, a fonte transmite sua informação utilizando a energia recebida. As fases de transferência de energia e de transmissão de informação são multiplexadas no tempo. Como uma fração do intervalo de transmissão é utilizado para transferência de energia, as amostras da fonte são armazenadas e comprimidas utilizando tanto códigos analógicos paramétricos quanto não paramétricos com compressão de dimensão (ou largura de banda) N:K para transmiti-las utilizando a fração do intervalo restante. São analisados tanto esquemas com largura de banda casadas e não casadas entre fonte e canal. Além disso, é investigado também o parâmetro de compartilhamento de tempo ótimo o qual otimiza o desempenho da transmissão analógica. Por fim, é demonstrado que os esquemas analógicos propostos podem superar um sistema digital em termos de relação sinal-distorção. / We investigate the use of discrete-time analog joint source channel coding (JSCC) in a wireless sensor network (WSN) where the source of information is wirelessly powered by the destination, which does not have energy constraints. Right after harvesting energy from the destination, the source transmits its information using the energy harvested. Wireless energy transfer and information transmission are multiplexed via a time-switching protocol. As a fraction of the time slot is spent for energy transfer, the source samples are saved and compressed using either parametric or non-parametric N:K dimension compression analog JSCC to transmit the information in the remaining fraction of the time slot. We analyze both matched and unmatched source and channel bandwidths. Moreover, we investigate the time-sharing parameter that optimizes the analog system performance and show that the proposed analog scheme can outperform a fully digital system.

CNPq;CAPES / Neste trabalho é investigado o uso de codificação analógica conjunta fonte-canal em uma rede de sensores sem fio onde a fonte de informação é alimentada pelo destino por meio de transmissões de rádio frequência. É assumido que o destino não possui restrições energéticas. Logo após coletar energia do destino, a fonte transmite sua informação utilizando a energia recebida. As fases de transferência de energia e de transmissão de informação são multiplexadas no tempo. Como uma fração do intervalo de transmissão é utilizado para transferência de energia, as amostras da fonte são armazenadas e comprimidas utilizando tanto códigos analógicos paramétricos quanto não paramétricos com compressão de dimensão (ou largura de banda) N:K para transmiti-las utilizando a fração do intervalo restante. São analisados tanto esquemas com largura de banda casadas e não casadas entre fonte e canal. Além disso, é investigado também o parâmetro de compartilhamento de tempo ótimo o qual otimiza o desempenho da transmissão analógica. Por fim, é demonstrado que os esquemas analógicos propostos podem superar um sistema digital em termos de relação sinal-distorção. / We investigate the use of discrete-time analog joint source channel coding (JSCC) in a wireless sensor network (WSN) where the source of information is wirelessly powered by the destination, which does not have energy constraints. Right after harvesting energy from the destination, the source transmits its information using the energy harvested. Wireless energy transfer and information transmission are multiplexed via a time-switching protocol. As a fraction of the time slot is spent for energy transfer, the source samples are saved and compressed using either parametric or non-parametric N:K dimension compression analog JSCC to transmit the information in the remaining fraction of the time slot. We analyze both matched and unmatched source and channel bandwidths. Moreover, we investigate the time-sharing parameter that optimizes the analog system performance and show that the proposed analog scheme can outperform a fully digital system.

Orientador: Eduardo Miranda / Tese (doutorado) - Universidade Estadual de Campinas, Instituto de Física Gleb Wataghin / Made available in DSpace on 2018-08-16T08:19:56Z (GMT). No. of bitstreams: 1 Andrade_EricdeCastroe_D.pdf: 5537554 bytes, checksum: 1391d5fcc710b5e471f0814a4a6d484f (MD5) Previous issue date: 2010 / Resumo: Sistemas eletrônicos fortemente correlacionados desordenados possuem dois mecanismos básicos para a localização eletrônica e a subsequente destruição do estado metálico: o de Mott (causado pela interação elétron-elétron) e o de Anderson (causado pela desordem). Nesta tese, estudamos como estes mecanismos competem dentro da fase metálica e também como afetam o comportamento crítico do sistema, empregando uma generalização para o caso desordenado do cenário de Brinkman-Rice para a transição de Mott. Investigamos os efeitos de desordem fraca e moderada sobre a transição metal-isolante de Mott a T = 0 em duas dimensões. Para desordem sucientemente baixa, a transição mantém sua característica do tipo Mott, na qual temos os pesos de quasipartícula Zi indo a zero na transição e uma forte blindagem da desordem na região crítica. Em contraste com o comportamento encontrado para d = 8 , no nosso caso as flutuações espaciais dos pesos de quasipartícula são fortemente amplificadas próximo à transição de Mott de tal forma que eles adquirem uma distribuição do tipo lei de potência P (Z) ~ Z a-1 ,com a --> 0 na transição. Tal comportamento altera completamente as características desta transição com relação ao caso limpo, e é um indício robusto da emergência de uma fase de Griffiths eletrônica precedendo a transição metal-isolante de Mott, com uma fenomenologia surpreendentemente similar àquela do "ponto fixo de desordem infinita" encontrada em magnetos quânticos. Uma consequência imediata dessas novas características introduzidas pela desordem é que estados eletrônicos próximos à superfície de Fermi tornam-se mais homogêneos na região crítica, ao passo que estados com maiores energias têm o comportamento oposto: eles apresentam uma grande inomogeneidade precisamente nas vizinhanças da transição de Mott. Sugerimos que uma desordem efetiva dependente da interação é uma característica comum a todos os sistemas de Mott desordenados. Estudamos também como os efeitos bem conhecidos das oscilações de longo alcance de Friedel são afetados por fortes correlações eletrônicas. Primeiramente, mostramos que sua amplitude e alcance são consideravelmente suprimidos em líquidos de Fermi fortemente renormalizados. Posteriormente, investigamos o papel dos espalhamentos elásticos e inelásticos na presença dessas oscilações. Em geral, nossos resultados analíticos mostram que um papel proeminente das oscilações de Friedel é relegado a sistemas fracamente interagentes. Abordamos, por m, os efeitos das interações sobre o isolante de Anderson em uma dimensão. Construímos a função de escala ß (g) e mostramos que a escala de "crossover" g *, que marca a transição entre o regime ôhmico e o localizado da condutância, é renormalizada pelas interações. Como consequência, embora não haja a emergência de estados verdadeiramente estendidos, o regime ôhmico de g estende-se agora por uma região consideravelmente maior do espaço de parâmetros. / Abstract: Disordered strongly correlated electronic systems have two basic routes towards localization underlying the destruction of the metallic state: the Mott route (driven by electron-electron interaction) and the Anderson route (driven by disorder). In this thesis, we study how these two mechanisms compete in the metallic phase, and also how they change the critical behavior of the system, within a generalization to the disordered case of the Brinkman-Rice scenario for the Mott transition. We investigate the effects of weak to moderate disorder on the Mott metal-insulator transition at T = 0 in two dimensions. For sufficiently weak disorder, the transition retains the Mott character, as signaled by the vanishing of the local quasiparticle weights Zi and strong disorder screening at criticality. In contrast to the behavior in d = 8, here the local spatial fluctuations of quasiparticle parameters are strongly enhanced in the critical regime, with a distribution function P(Z) ~ Z a-1 and a --> 0 at the transition. This behavior indicates the robust emergence of an electronic Griffiths phase preceding the MIT, in a fashion surprisingly reminiscent of the " Infinite Randomness Fixed Point" scenario for disordered quantum magnets. As an immediate consequence of these new features introduced by disorder, we have that the electronic states close to the Fermi energy become more spatially homogeneous in the critical region, whereas the higher energy states show the opposite behavior: they display enhanced spatial inhomogeneity precisely in the close vicinity to the Mott transition. We suggest that such energy-resolved disorder screening is a generic property of disordered Mott systems. We also study how well-known effects of the long-ranged Friedel oscillations are affected by strong electronic correlations. We first show that their range and amplitude are signifficantly suppressed in strongly renormalized Fermi liquids. We then investigate the interplay of elastic and inelastic scattering in the presence of these oscillations. In the singular case of two-dimensional systems, we show how the anomalous ballistic scattering rate is conned to a very restricted temperature range even for moderate correlations. In general, our analytical results indicate that a prominent role of Friedel oscillations is relegated to weakly interacting systems. Finally, we discuss the effects of correlations on the Anderson insulator in one dimension. We construct the scaling function ß(g) and we show that the crossover scaling g*, which marks the transition between the ohmic and the localized regimes of the conductance, is renormalized by the interactions. As a consequence, we show that, although truly extend states do not emerge, the ohmic regime covers now a considerably larger region in the parameter space. / Doutorado / Física da Matéria Condensada / Doutor em Ciências

Orientador: Carlos Alberto dos Reis Filho / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação / Made available in DSpace on 2018-08-14T00:43:32Z (GMT). No. of bitstreams: 1 Coimbra_RicardoPureza_M.pdf: 4991793 bytes, checksum: 2b5fb9293ae9abe4c248964485ff74e3 (MD5) Previous issue date: 2009 / Resumo: Fontes de referência de tensão e sensores de temperatura são blocos extensivamente utilizados em sistemas microeletrônicos. Como alternativa à aplicação de estruturas consolidadas, mas protegidas por acordos de propriedade intelectual, é permanente a demanda pelo desenvolvimento de novas técnicas e estruturas originais destes circuitos. Também se destaca o crescente interesse por soluções de baixa tensão, baixo consumo e compatíveis com processos convencionais de fabricação. Este trabalho descreve o desenvolvimento de um circuito que atende a estas exigências, fornecendo uma tensão de referência e um sinal de sensoriamento térmico, obtidos a partir de um arranjo adequado de transistores MOS, que operam em regime de forte inversão. O princípio de operação do circuito desenvolvido foi inspirado no conceito de que é possível empilhar n transistores MOS, polarizados com corrente adequada, de tal forma que a queda de tensão sobre a pilha de transistores, com amplitude nVGS, apresente a mesma taxa de variação térmica que a tensão VGS produzida por um único transistor. Nesta condição, a diferença entre as duas tensões é constante em temperatura, constituindo-se em uma referência de tensão. No entanto, o empilhamento de dois ou mais transistores impossibilita a operação do circuito sob baixa tensão. Isto motivou a adaptação da técnica, obtendo a tensão nVGS com o auxílio de um arranjo de resistores, sem o empilhamento de transistores. Desta forma, o potencial limitante da tensão mínima de alimentação tornou-se a própria tensão de referência, cuja amplitude é próxima de um único VGS. A estrutura desenvolvida fornece também um sinal de tensão com dependência aproximadamente linear com a temperatura absoluta, que pode ser aplicado para sensoriamento térmico. Foram fabricados protótipos correspondentes a diversas versões de dimensionamento do circuito para comprovação experimental de seu princípio de operação. O melhor desempenho verificado corresponde à geração de uma tensão de referência com coeficiente térmico de 8,7ppm/ºC, no intervalo de -40ºC a 120ºC, operando com tensão de 1V. Embora o estado da arte seja representado por índices tão baixos quanto 1ppm/ºC, para a mesma faixa de temperatura, a característica compacta do circuito e seu potencial de aplicação sob as condições de baixa tensão e baixo consumo lhe conferem valor como contribuição para este campo de pesquisa e desenvolvimento. / Abstract: Voltage references and temperature sensors are blocks extensively used in microelectronic systems. As an alternative to the use of consolidated structures that are protected by intellectual property agreements, there is a permanent demand for the development of new techniques and structures for these circuits. It can be also highlighted the growing interest for low-voltage and low-power solutions, implemented in conventional IC technologies. This work describes the development of a circuit that meets these requirements by providing a voltage reference and temperature sensing signal obtained from a suitable arrangement of MOS transistors biased in strong inversion. The operation principle of the circuit developed is based on the concept that it is possible for a stack of n MOS transistors, biased by an appropriate current, to show a voltage drop, equal to nVGS, with the same thermal variation rate as a VGS voltage produced by a single transistor. Hence, the difference between the two voltage signals is temperature independent, characterizing a voltage reference. However, the stacking of two or more transistors prevents the operation of the circuit under low voltage. This fact motivated to adapt the technique by obtaining the voltage nVGS with the aid of an array of resistors and no stacked transistors. The minimum supply voltage becomes limited only by the reference voltage itself, whose amplitude is close to a single VGS. The circuit developed also provides a voltage signal almost linearly dependent with the absolute temperature, which can be applied for thermal sensing. Prototypes corresponding to various dimensional versions of the circuit were produced to experimentally verify the principle of operation. The best performance corresponds to the generation of a voltage reference signal with 8.7ppm/ºC thermal coefficient, from -40ºC to 120ºC, under a 1V supply voltage. Although the state of the art is represented by values as low as 1ppm/ºC, at the same temperature range, the circuit's compact aspect together with the possibility to attend low-voltage and low-power requirements grants it value as contribution to this field of research and development / Mestrado / Eletrônica, Microeletrônica e Optoeletrônica / Mestre em Engenharia Elétrica