Modern satellite, wireless communications, and radar systems often demand wideband performance for multi-channel and multi-function operations. Among these applications, phased array antennas play an important role. This dissertation covers two wideband phased array antennas, one produces linear polarization and one produces circular polarization. The main difference between these two phased array antennas is the antenna array. For the linearly polarized array, a wideband microstrip line to slotline transition is used to feed a Vivaldi antenna. For the circularly polarized array, a wideband microstrip line to parallel stripline transition is used to feed a spiral antenna. From 3 to 12 GHz, the linearly polarized beam is steered over ± 15º. Since the electromagnetic spectrum is limited and has to be shared, interference is getting serious as more and more wireless applications emerge. Filters are key components to prevent harmonic interference. The harmonic signals can be suppressed by cascading additional lowpass filters or bandstop filters. A bandstop filter combining shunt open stubs and a spurline is proposed for a compact size and a deeper rejection. Two lowpass filters with interdigital capacitors and slotted ground structures are also studied. Harmonic suppression can also be achieved with the modification of bandpass filters. Three conventional bandpass filters with spurious passbands are investigated. The first one is a dual-mode patch bandpass filter. The second passband of the proposed filter is at 2.88fo, where fo is the fundametal frequency. The second filter is an open-loop bandpass filter. Two open stubs are added to achieve high suppression in the second harmonic signal. The suppression of 35 dB at the second harmonic is obtained. For the third filter using half-wavelength open stubs, a T-shaped line is used to replace the quarter-wavelength connecting line. The T-shaped line has the same response with the connecting line in the passband. Furthermore, the T-shaped line works as a bandstop filter at the second harmonic. Finally, a new compact slow-wave resonator and bandpass filters are presented. A simple transmission-line model is used to predict the resonant frequency. Compared with the conventional uniform half-wavelength resonator, the slow-wave resonator shows a 25% size reduction.

This thesis work presents a new harmonic suppression technique for microstrip patch antennas. Harmonic suppression in active integrated antennas is known as an effective method to improve the efficiency of amplifiers in transmitter side. In the proposed design, the antenna works as the radiating element and, at the same time, as the tuning load for the amplifier circuit that is directly matched to the antenna. The proposed active antenna architecture is easy to fabricate and is symmetric, so it can be conveniently mass-produced and designed to have circular polarization, which is preferred in many applications such as satellite communications. The antenna simulations were performed using Ansoft High Frequency System Simulator (HFSS) and all amplifier design steps were simulated by Advanced Design System (ADS). The final prototypes of the linearly polarized active integrated antenna and the circularly polarized active integrated antenna were fabricated using a circuit board milling machine. The antenna radiation pattern was measured inside Utah State University's anechoic chamber and the results were satisfactory. Power measurements for the amplifiers' performance were carried out inside the chamber and calculated by using the Friis transmission equation. It is seen that a significant improvement in the efficiency is achieved compared to the reference antenna without harmonic suppression. Based on the success in the single element active antenna design, the thesis also presents a feasibility of applying the active integrated antenna in array configuration, in particular, in scanning array design to yield a low-profile, low-cost alternative to the parabolic antenna transmitter of satellite communication systems.

Yes / A novel design strategy for microstrip harmonic-suppression antennas is presented. The computational method is based on an integral equation solver using adaptive surface meshing driven by a genetic algorithm. Two examples are illustrated, all involving design of coaxially-fed air-dielectric patch antennas implanted with shorting and folded walls. The characteristics of the antennas in terms of the impedance responses and far ¯eld radiation patterns are discussed theoretically and experimentally. The performances of all of the GA-optimised antennas were shown to be excellent and the presented examples show the capability of the proposed method in antenna design using GA. / MSCRC

The objectives of this research work are to investigate, design and implement active integrated antennas comprising active devices connected directly to the patch radiators, for various applications in high efficiency RF front-ends, integrated oscillator antennas, design and optimization of harmonic suppression antennas using a genetic algorithm (GA). A computer-aided design approach to obtain a class F operation to optimizing the optimal fundamental load impedance and designing the input matching circuits for an active integrated antenna of the transmitting type is proposed and a case study of a design for 1.6 GHz is used to confirm the design principle. A study of active integrated oscillator antennas with a series feed back using a pseudomorphic high electronmobility transistor (PHEMT) confirms the design procedure in simulation and measurement for the oscillator circuit connected directly to the active antenna. Subsequently, another design of active oscillator antenna using bipolar junction transistor (BJT) improves the phase noise of the oscillation and in addition to achieve amplitude shift keying (ASK) and amplitude modulation (AM) modulation using the proposed design circuit. Moreover, the possibility of using a sensor patch technique to find the power accepted by the antenna at harmonic frequencies is studied. A novel numerical solution, for designing and optimizing active patch antennas for harmonic suppression using GA in collaboration with numerical electromagnetic computation (NEC), is presented. A new FORTRAN program is developed and used for adaptively meshing any planar antenna structure in terms of wire grid surface structures. The program is subsequently implemented in harmonic suppression antenna design and optimization using GA. The simulation and measurement results for several surface structures show a good agreement.

yes / The objectives of this research work are to investigate, design and implement active integrated antennas comprising active devices connected directly to the patch radiators, for various applications in high efficiency RF front-ends, integrated oscillator antennas, design and optimization of harmonic suppression antennas using a genetic algorithm (GA). A computer-aided design approach to obtain a class F operation to optimizing the optimal fundamental load impedance and designing the input matching circuits for an active integrated antenna of the transmitting type is proposed and a case study of a design for 1.6 GHz is used to confirm the design principle. A study of active integrated oscillator antennas with a series feed back using a pseudomorphic high electronmobility transistor (PHEMT) confirms the design procedure in simulation and measurement for the oscillator circuit connected directly to the active antenna. Subsequently, another design of active oscillator antenna using bipolar junction transistor (BJT) improves the phase noise of the oscillation and in addition to achieve amplitude shift keying (ASK) and amplitude modulation (AM) modulation using the proposed design circuit. Moreover, the possibility of using a sensor patch technique to find the power accepted by the antenna at harmonic frequencies is studied. A novel numerical solution, for designing and optimizing active patch antennas for harmonic suppression using GA in collaboration with numerical electromagnetic computation (NEC), is presented. A new FORTRAN program is developed and used for adaptively meshing any planar antenna structure in terms of wire grid surface structures. The program is subsequently implemented in harmonic suppression antenna design and optimization using GA. The simulation and measurement results for several surface structures show a good agreement.

With the advances in wireless communication systems, antennas with different shapes and design have achieved great demand and are desirable for many uses such as personal communication systems, and other applications involving wireless communication. This has resulted in different shapes and types of antenna design in order to achieve different antenna characteristic. One attractive approach to the design of antennas is to suppress or attenuate harmonic contents due to the non-linear operation of the Radio Frequency (RF) front end. The objectives of this work were to investigate, design and implement antennas for harmonic suppression with the aid of a genetic algorithm (GA). Several microstrip patch antennas were designed to operate at frequencies 1.0, 1.8 and 2.4 GHz respectively. The microstrip patch antenna with stub tuned microstrip lines was also employed at 1.0 and 1.8 GHz to meet the design objectives. A new sensing patch technique is introduced and applied in order to find the accepted power at harmonic frequencies. The evaluation of the measured power accepted at the antenna feed port was done using an electromagnetic (EM) simulator, Ansoft Designer, in terms of current distribution. A two sensors method is presented on one antenna prototype to estimate the accepted power at three frequencies. The computational method is based on an integral equation solver using adaptive surface meshing driven by a genetic algorithm. Several examples are demonstrated, including design of coaxially-fed, air-dielectric patch antennas implanted with shorting and folded walls. The characteristics of the antennas in terms of the impedance responses and far field radiation patterns are discussed. The results in terms of the radiation performance are addressed, and compared to measurements. The presented results of these antennas show a good impedance matching at the fundamental frequency with good suppression achieved at the second and third harmonic frequencies.

A new concept, the multi level voltage/current reinjection ac/dc conversion, is described in this thesis. Novel voltage and current source converter configurations, based on voltage and current reinjection concepts are proposed. These converter configurations are thoroughly analyzed in their ac and dc system sides. The fundamentals of the reinjection concept is discussed briefly, which lead to the derivation of the ideal reinjection waveform for complete harmonic cancellation and approximations for practical implementation. The concept of multi level voltage reinjection VSC is demonstrated through two types of configurations, based on standard 12-pulse parallel and series connected VSC modified with reinjection bridges and transformers. Firing control strategies and steady state waveform analysis are presented and verified by EMTDC simulations. The multi level current reinjection CSC is also described using two configurations based on standard 12-pulse parallel and series connected CSC modified with associated reinjection circuitry. Firing control strategies and steady state waveform analysis are presented and verified by EMTDC simulations. Taking the advantage of zero current switching in the main bridge valves, achieved through multi level current reinjection, an advanced multi level current reinjection scheme, consisting thyristor main bridges and self-commutated reinjection circuitry is proposed. This hybrid scheme effectively incorporates self-commutated capability into a conventional thyristor converter. The ability of the main bridge valves to commutate without the assistance of a turn-off pulse or line commutating voltage under the zero current condition is explained and verified by EMTDC simulations. Finally, the applications of the MLCR-CSC are discussed in terms of a back to back HVDC link and a long distance HVDC transmission system. The power and control structures and closed loop control strategies are presented. Dynamic simulation is carried out on PSCAD/EMTDC to demonstrate the two systems ability to respond to varying active and reactive power operating conditions.

With the advances in wireless communication systems, antennas with different shapes and design have achieved great demand and are desirable for many uses such as personal communication systems, and other applications involving wireless communication. This has resulted in different shapes and types of antenna design in order to achieve different antenna characteristic. One attractive approach to the design of antennas is to suppress or attenuate harmonic contents due to the non-linear operation of the Radio Frequency (RF) front end. The objectives of this work were to investigate, design and implement antennas for harmonic suppression with the aid of a genetic algorithm (GA). Several microstrip patch antennas were designed to operate at frequencies 1.0, 1.8 and 2.4 GHz respectively. The microstrip patch antenna with stub tuned microstrip lines was also employed at 1.0 and 1.8 GHz to meet the design objectives. A new sensing patch technique is introduced and applied in order to find the accepted power at harmonic frequencies. The evaluation of the measured power accepted at the antenna feed port was done using an electromagnetic (EM) simulator, Ansoft Designer, in terms of current distribution. A two sensors method is presented on one antenna prototype to estimate the accepted power at three frequencies. The computational method is based on an integral equation solver using adaptive surface meshing driven by a genetic algorithm. Several examples are demonstrated, including design of coaxially-fed, air-dielectric patch antennas implanted with shorting and folded walls. The characteristics of the antennas in terms of the impedance responses and far field radiation patterns are discussed. The results in terms of the radiation performance are addressed, and compared to measurements. The presented results of these antennas show a good impedance matching at the fundamental frequency with good suppression achieved at the second and third harmonic frequencies. / Home government

Multilevel inverters are very popular for medium and high-voltage induction motor (IM) drive applications. They have superior performance compared to 2-level inverters such as reduced harmonic content in output voltage and current, lower common mode voltage and dv/dt, and lesser voltage stress on power switches. To get nearly sinusoidal current waveforms, the switching frequency of the conventional inverters have to be in¬creased. This will lead to higher switching losses and electromagnetic interference. The problem in using lower switching frequency is the introduction of low order harmonics in phase currents and undesirable torque ripple in the motor. The 5th and 7th harmonics are dominant for hexagonal voltage space-vector based low frequency switching. Dodecagonal voltage space-vector based multilevel inverters have been proposed as an improvement over the conventional hexagonal space vector based inverters. They achieve complete elimination of 5th and 7th order harmonics throughout the modulation range. The linear modulation range is also extended by about 6.6%, since the dodecagon is closer to circle than a hexagon. The previous works on dodecagonal voltage space vector based VSI fed drives used voltage controlled PWM (VC-PWM). Although these controllers are more popular, they have inferior dynamic performance when compared to current controlled PWM (CC¬PWM). VSIs using current controlled PWM have excellent dynamic response, inherent short-circuit protection and are simple to implement. The conventional CC-PWM tech¬niques have large switching frequency variation and large current ripple in steady-state. xix As a result, there has been significant research interest to achieve current controlled VSI fed IM drives with constant switching frequency. Two current error space vector (CESV) based hysteresis controllers for dodecagonal voltage space-vector based VSI fed induction motor drives are proposed in this work. The proposed controllers achieve nearly constant switching frequency at steady state operation, similar to VC-SVPWM based VSI fed IM drives. They also have fast dynamic response while at the same time achieving complete elimination of fifth and seventh order harmonics for the entire modulation range, due to dodecagonal voltage vector switching. The first work proposes a nearly constant switching frequency current error space vector (CESV) based hysteresis controller for an IM drive with single dodecagonal voltage space vectors. Parabolic boundaries computed offline are used in the proposed controller. An open-end winding induction motor is fed from two inverters with asymmetrical DC link voltages, to generate the dodecagonal voltage space vectors. The drive scheme is first studied at different frequencies with a space vector based PWM (SVPWM) control, to obtain the current error space vector boundaries. The CESV boundary at each frequency can be approximated with four parabolas. These parabolic boundaries are used in the proposed controller to limit the CESV trajectory. Due to symmetries in the parabolas only two set of parabola parameters, at different frequencies, need to be stored. A generalized next vector selection logic, valid for all sectors and rotation direction, is used in the proposed controller. For this an axis transformation is done in all sectors, to bring the CESV trajectory to the first sector. The sector information is obtained from the estimated fundamental stator phase voltage. The proposed controller is extensively studied using vector control at different frequencies and transient conditions. This controller maintains nearly constant switching frequency at steady state operation, similar to VC-SVPWM inverters, while at the same time achieving better dynamic performance and complete elimination of 5th and 7th order harmonics throughout the modulation range. In the second work the nearly constant switching frequency current hysteresis con¬troller is extended to multilevel dodecagonal voltage space-vector based IM drives, with online computation of CESV boundaries. The multilevel dodecagonal space-vector dia¬gram has different types of triangles, and the previously proposed methods for multilevel hexagonal VSI based current hysteresis controllers cannot be used directly. The CESV trajectory of the VC-SVPWM, obtained for present triangular region, is used as the reference trajectory of the proposed controller. The CESV reference boundaries are com¬puted online, using switching dwell time and voltage error vector of each applied vector. These quantities are calculated from estimated sampled reference phase voltages, which are found out from the stator current error ripple and the parameters of the induction motor. Whenever the actual current error space vector crosses the reference CESV tra¬jectory, an appropriate vector that will force it along the reference trajectory is switched. Extensive study of the proposed controller using vector control is done at different fre¬quencies and transient conditions. This controller has all the advantages of multilevel switching like low dv/dt, lesser electromagnetic interference, lower switch voltage stress and lesser harmonic distortion, in addition to all the dynamic performance advantages of the previous controller. The third work proposes an elegant 5th and 7th order harmonic suppression tech¬nique for open end winding split-phase induction motors, using capacitor fed inverters. Split-phase induction motors have been proposed to reduce the torque and flux ripples of conventional three-phase IM. But these motors have high 5th and 7th order harmonics in the stator windings due to lack of back-emf for these frequencies. A space-vector harmonic analysis of the split-phase IM is conducted and possible 5th and 7th order harmonic sup¬pression techniques studied. A simple harmonic suppression scheme is proposed, which requires the use of only capacitor fed inverters. A PWM scheme that can maintain the capacitor voltage as well as suppress the 5th and 7th order harmonics is also proposed. To test the performance of the proposed scheme, an open-loop v/f control is used on an open-end winding split-phase induction motor under no-load condition. Synchronized PWM with two samples per sector was used, for frequencies above 10 Hz. The har¬monic spectra of the phase voltages and currents were computed and compared with the traditional SVPWM scheme, to highlight the harmonic suppression. The concepts were initially simulated in Matlab/Simulink. Experimental verifica¬tion was done using laboratory prototypes at low power. While these concepts maybe easily extended to higher power levels by using suitably rated devices, the control tech¬niques presented shall still remain applicable. TMS320F2812 DSP platform was used to execute the control code for the proposed drive schemes. For the first work the output pins of the DSP was directly used to drive the inverter switches through a dead-band circuit. For the other two works, DSP outputs the sector information and the PWM signals. The PWM terminals and I/O lines of the DSP is used to output the timings and the triangle number respectively. An FPGA (XC3S200) was used to translate the sector information and the PWM signals to IGBT gate signal logic. A constant dead-time of 1.5 µs was also implemented inside the FPGA. Opto-isolated gate drivers with desaturation protection (M57962L) were used to drive the IGBTs. The phase currents and DC bus voltages were measured using hall-effect sensors. An incremental shaft position encoder was also connected to the motor to measure the angular velocity. The switches were realized using 1200 V, 75 A IGBT half bridge modules.

Multilevel converters have become the direct accepted solution for high power converter applications. They are used in wide variety of power electronic applications like power transmission and distribution, electric motor drives, battery management and renewable energy management to name a few. For medium and high voltage motor drives, especially induction motor drives, the use of multilevel voltage source inverters have become indispensible. A high voltage multilevel inverter could be realized using low voltage switching devices which are easily available and are of low cost. A multilevel inverter generates voltage waveforms of very low harmonic distortion by switching between voltage levels of reasonably small amplitude differences. Thus the dv/dt of the output voltage waveform is small and hence the electromagnetic interference generated is less. Because of better quality output generation, the switching frequency of the multilevel inverters could be reduced to control the losses. Thus, a multilevel converter stands definitely a class apart in terms of performance from a conventional two-level inverter. Many multilevel inverter topologies for induction motor drives are available in the literature. The basic multilevel topologies are the neutral point clamped (NPC) inverter, flying capacitor (FC) inverter and the cascaded H-bridge (CHB) inverter. Various other hybrid multilevel topologies have been proposed by using the basic multilevel inverter topologies. It is also possible to obtain multilevel output by using conventional two-level inverters feeding an open-end winding induction motor from both sides. All the conventional multilevel voltage source inverters generate hexagonal (6 sided polygons) voltage space vector structures. When an inverter with hexagonal space vector structure is operated in the over modulation range, significant low order harmonics are generated in the phase voltage output. Over modulation operation is required for the full utilization of the available DC-link voltage and hence maximum power generation. Among the harmonics generated, the fifth and seventh harmonics are of significant magnitudes. These harmonics generate torque ripple in the motor output and are undesirable in high performance motor drive applications. The presence of these harmonics further creates problems in the closed loop current control of a motor, affecting the dynamic performance. Again, the harmonic currents generate losses in the stator windings. Therefore, in short, the presence of harmonic voltages in the inverter output is undesirable. Many methods have been proposed to eliminate or mitigate the effect of the harmonics. One solution is to operate the inverter at high switching frequency and thereby push the harmonics generated to high frequencies. The stator leakage inductance offers high impedance to the high frequency harmonics and thus the harmonic currents generated are negligible. But, high switching frequency brings switching losses and high electromagnetic interference generation in the drive system. And also, high switching frequency operation is effective only in the linear modulation range. Another solution is to use passive harmonic filters at the inverter output. For low order harmonics, the filter components would be bulky and costly. The loss created by the filters degrades the efficiency of the drive system as well. The presence of a filter also affects the dynamic performance of the drive system during closed loop operation. Special pulse width modulation (PWM) techniques like selective harmonic elimination (SHE) PWM can prevent the generation of a particular harmonic from the phase voltage output. The disadvantages of such schemes are limited modulation index, poor dynamic performance and extensive offline computations. An elegant harmonic elimination method is to generate a voltage space vector structure having more number of sides like a dodecagon (12 sided polygons) or an octadecagon (18 sided polygons) rather than a hexagon. Inverter topologies generating dodecagonal voltage space vector structure eliminate fifth and seventh order harmonics, represented as 6n 1; n = odd harmonics, from the phase voltages and hence from the motor phase currents, throughout the entire modulation range. The first harmonics appearing the phase voltage are the 11th and 13th harmonics. Another advantage is the increased linear modulation range of operation for a given DC-link voltage, because geometrically dodecagon is closer to circle than a hexagon. An octadecagonal structure eliminates the 11th and 13th harmonics as well from the phase voltage output. The harmonics present in the phase voltage are of the order 18n 1; n = 1; 2; 3; :::. Thus the total harmonics distortion (THD) of the phase voltage is further improved. The linear modulation range also gets enhanced compared to hexagonal and dodecagonal structures. Multilevel dodecagonal and octadecagonal space vector structures combines the advantages of both multilevel structure and dodecagonal and octadecagonal structure and hence are very attractive solutions for high performance induction motor drive schemes. Chapter 1 of this thesis introduces the multilevel in-verter topologies generating hexagonal, dodecagonal and octadecagonal voltage space vector structures. Inverter topologies generating multilevel dodecagonal and octadecago-nal voltage space vector structures have been proposed before but using multiple DC sources delivering active power. The presence of more than one DC source in the inverter topology makes the back to back operation (four-quadrant operation) of the drive system difficult. And also the drive system becomes more costly and bulky. This thesis proposes induction motor drive schemes generating multilevel dodecagonal and octadecagonal volt-age space vector structures using a single DC source. In Chapter 2, an induction motor drive scheme generating a six-concentric multilevel dodecagonal voltage space vector structure using a single DC source is proposed for an open-end winding induction motor. In the topology, two three-level inverters drive an open-end winding IM, one inverter from each side. DC-link of primary inverter is from a DC source (Vdc) which delivers the entire active power, whereas the secondary inverter DC-link is maintained by a capacitor at a voltage of 0:289Vdc, which is self-balanced during the inverter operation. The PWM scheme implemented ensures low switching frequency for primary inverter. Secondary inverter operates at a small DC-link voltage. Hence, switching losses are small for both primary and secondary inverters. An open-loop V/f scheme was used to test the topology and modulation scheme. In the work proposed in Chapter 3, the topology and modulation scheme used in the first work is modified for a star connected induction motor. Again, the scheme uses only a single DC source and generates a six-concentric multilevel space vector struc-ture. The power circuit topology is realized using a three-level flying capacitor (FC) inverter cascaded with an H-bridge (CHB). The capacitors in the CHB inverter are maintained at a voltage level of 0:1445Vdc. The FC inverter switches between volt-age levels of [Vdc; 0:5Vdc; 0] and the CHB inverter switches between voltage levels of [+01445Vdc; 0; 0:1445Vdc]. The PWM scheme generates a quasi-square waveform output from the FC inverter. This results in very few switchings of the FC inverter in a funda-mental cycle and hence the switching losses are controlled. The CHB inverter switches Ch. 0: at high frequency compared to the FC inverter and cancels the low order harmonics (6n 1; n = odd) generated by the FC inverter. Even though the CHB operates at higher switching frequency, the switchings are at low voltage thereby controlling the losses. The linear modulation range of operation is extended to 48:8Hz for a base frequency of 50Hz. An open-loop V/f scheme was used to test the topology and modulation scheme. In Chapter 4, a nine-concentric multilevel octadecagonal space vector structure is proposed for the first time, again using a single DC source. The circuit topology remains same as the work in Chapter 3, except that the CHB capacitor voltage is maintained at 0:1895Vdc. The 5th; 7th; 11th and 13th harmonics are eliminated from the phase voltage output. The linear modulation range is enhanced to 49:5Hz for a base speed of 50Hz. An open-loop V/f scheme and rotor field oriented control scheme were used to test the proposed drive system. All the proposed drive schemes have been extensively simulated and tested in hard-ware. Simulation was performed in MATLAB-SIMULINK environment. For implement-ing the inverter topology, SKM75GB12T4 IGBT modules were used. The control al-gorithms were implemented using a DSP (TI’s TMS320F28334) and an FPGA (Xilinx Spartan XC3S200). A 1kW , 415V , 4-pole induction motor was used for the experiment purpose. The above mentioned induction motor drive schemes generate phase voltage outputs in which the low order harmonics are absent. The linear modulation range is extended near to the base frequency of operation compared to hexagonal space vector structure. In the inverter topologies, the secondary inverters or the CHB inverters functions as harmonic filters and delivers zero active power. The primary inverter in the topologies switches at low frequency, reducing the power loss. Single DC source requirement brings down the cost of the system as well as permitting easy four-quadrant operation. This is also advantageous in battery operated systems like EV applications. With these features and advantages, the proposed drive schemes are suitable for high performance, medium voltage induction motor drive applications.