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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
251

Programmation des architectures hiérarchiques et hétérogènes / Programming hierarxchical and heterogenous machines

Hamidouche, Khaled 10 November 2011 (has links)
Les architectures de calcul haute performance de nos jours sont des architectures hiérarchiques et hétérogènes: hiérarchiques car elles sont composées d’une hiérarchie de mémoire, une mémoire distribuée entre les noeuds et une mémoire partagée entre les coeurs d’un même noeud. Hétérogènes due à l’utilisation des processeurs spécifiques appelés Accélérateurs tel que le processeur CellBE d’IBM et les CPUs de NVIDIA. La complexité de maîtrise de ces architectures est double. D’une part, le problème de programmabilité: la programmation doit rester simple, la plus proche possible de la programmation séquentielle classique et indépendante de l’architecture cible. D’autre part, le problème d’efficacité: les performances doivent êtres proches de celles qu’obtiendrait un expert en écrivant le code à la main en utilisant des outils de bas niveau. Dans cette thèse, nous avons proposé une plateforme de développement pour répondre à ces problèmes. Pour cela, nous proposons deux outils : BSP++ est une bibliothèque générique utilisant des templates C++ et BSPGen est un framework permettant la génération automatique de code hybride à plusieurs niveaux de la hiérarchie (MPI+OpenMP ou MPI + Cell BE). Basée sur un modèle hiérarchique, la bibliothèque BSP++ prend les architectures hybrides comme cibles natives. Utilisant un ensemble réduit de primitives et de concepts intuitifs, BSP++ offre une simplicité d'utilisation et un haut niveau d' abstraction de la machine cible. Utilisant le modèle de coût de BSP++, BSPGen estime et génère le code hybride hiérarchique adéquat pour une application donnée sur une architecture cible. BSPGen génère un code hybride à partir d'une liste de fonctions séquentielles et d'une description de l'algorithme parallèle. Nos outils ont été validés sur différentes applications de différents domaines allant de la vérification et du calcul scientifique au traitement d'images en passant par la bioinformatique. En utilisant une large sélection d’architecture cible allant de simple machines à mémoire partagée au machines Petascale en passant par les architectures hétérogènes équipées d’accélérateurs de type Cell BE. / Today’s high-performance computing architectures are hierarchical and heterogeneous. With a hierarchy of memory, they are composed of distributed memory between nodes and shared memory between cores of the same node. heterogeneous due to the use of specific processors called accelerators such as the CellBE IBM processor and/or NVIDIA GPUs. The programming complexity of these architectures is twofold. On the one hand, the problem of programmability: the programming should be simple, as close as possible to the conventional sequential programming and independent of the target architecture. On the other hand, the problem of efficiency: performance should be similar to those obtained by a expert in writing code by hand using low-level tools. In this thesis, we proposed a development platform to address these problems. For this, we propose two tools: BSP++ is a generic library using C++ templates and BSPGen is a framework for the automatic hybrid multi-level hierarchy (MPI + OpenMP or MPI + Cell BE) code generation.Based on a hierarchical model, the BSP++ library takes the hybrid architectures as native targets. Using a small set of primitives and intuitive concepts, BSP++ provides a simple way to use and a high level of abstraction of the target machine. Using the cost model of BSP++, BSPGen predicts and generates the appropriate hierarchical hybrid code for a given application on target architecture. BSPGen generates hybrid code from a sequential list of functions and a description of the parallel algorithm.Our tools have been validated with various applications in different fields ranging from verification to scientific computing and image processing through bioinformatics. Using a wide selection of target architecture ranging from simple shared memory machines to Petascale machines through the heterogeneous architectures equipped with Cell BE accelerators.
252

Language for High-Level Description of User Interface Requirements / Language for High-Level Description of User Interface Requirements

Rašovský, Martin January 2018 (has links)
Diplomová práce se zabývá problematikou návrhu vysokoúrovňového jazyka pro popis grafického uživatelského rozhraní. Teoretická část rozebírá současné technologie uživatelských rozhraní zejména pro stanovení požadavků na nový jazyk. Z těchto poznatků násladně jsou shrnuty zásadní požadavky, které se nutně musí zakomponovat při návrhu samotného jazyka. Jsou zde zmíněny i požadavky z pohledu osob se specifickými vzdělávacími potřebami dle tzv. návrhových principů \textit{počítačové terapie}. Následně práce dle analyzovaných požadavků navrhuje jazyk pro vysokoúrovňový popis uživatelského rozraní. Součástí návrhu jazyka je také popis algoritmu pro kompozici jednotlivých komponent definovaných v jazyce do výsledného uživatelského prostředí. Navržený jazyk je implementován v programovacím jazyce C\#. Implementace je demonstrována na reprezentativních příkladech. Nakonec se práce věnuje dalším možným rozšířením jazyka.
253

Využití funkcionálních jazyků pro hardwarovou akceleraci / Hardware Acceleration Using Functional Languages

Hodaňová, Andrea January 2013 (has links)
The aim of this thesis is to research how the functional paradigm can be used for hardware acceleration with an emphasis on data-parallel tasks. The level of abstraction of the traditional hardware description languages, such as VHDL or Verilog, is becoming to low. High-level languages from the domains of software development and modeling, such as C/C++, SystemC or MATLAB, are experiencing a boom for hardware description on the algorithmic or behavioral level. Functional Languages are not so commonly used, but they outperform imperative languages in verification, the ability to capture inherent paralellism and the compactness of code. Data-parallel task are often accelerated on FPGAs, GPUs and multicore processors. In this thesis, we use a library for general-purpose GPU programs called Accelerate and extend it to produce VHDL. Accelerate is a domain-specific language embedded into Haskell with a backend for the NVIDIA CUDA platform. We use the language and its frontend, and create a new backend for high-level synthesis of circuits in VHDL.
254

Geomechanical aspects of Sintered Silicon Carbide (SSiC) waste canisters for disposal of high level radioactive waste

Zhao, Yanan 16 March 2021 (has links)
High-level radioactive waste (HLW) poses threat to the biosphere. Geological disposal is accepted as a safe way for HLW disposal. Waste canisters made of Sintered Silicon Carbide (SSiC) are proposed and geomechanical safety aspects relating to such SSiC canisters are investigated. First part of the thesis reviews the state-of-the-art and demands for HLW disposal. The reason for considering Silicon Carbide (SiC) as canister material is explained. Especially in terms of corrosion and lifetime, ceramics and especially SiC is superior to metals or concrete. The only concern is its brittle behavior. The second part of the thesis presents results on static and dynamic mechanical properties of SiC in general and in particular for SSiC based on literature review and own lab tests. Although strength values for SiC and especially SSiC are very high, the extreme brittle behavior has to be considered in case of impact or point-like loading. The third and most extensive part of the thesis part contains numerical simulations, which consider most critical potential loading situations during transport and installation of the canisters underground. Both, pure elastic continuum and DEM based models are used considering the following loading situations (critical scenarios): Freefall of canister during transport or installation (FF), Impact by falling rock block at disposal site (RF), Point loading due to accidental insertion of small stone below the canister (PL), Anisotropic earth pressure loading after disposal (EP). Coating to protect the canisters against damage is investigated and preliminary parameters in terms of stiffness and thickness are recommended.
255

Centro de alto rendimiento de natación / High performance swimming center

Salazar Torres, Mariano Ignacio Noé 26 April 2021 (has links)
El proyecto que se presenta a continuación es un Centro de Alto rendimiento de Natación que se desarrolla como elemento integrado e hito urbano dentro de la ciudad. Ubicado en el cono sur de Lima, en el distrito de San Juan de Miraflores, que por la cantidad de complejos deportivos en su extensión tiene vocación a ser un foco deportivo importante. Sin embargo, en la ciudad de Lima no existe la infraestructura adecuada para la formación de deportistas de alto nivel en sus diversas disciplinas, siendo la natación una de las más afectadas. Es de esta manera como surge la concepción del proyecto, como una propuesta de solución para el desarrollo del deporte en su máximo nivel de exigencia y competitividad. Que busca ser el principal escenario deportivo de competencias nacionales e internacionales y ampliar la práctica de las disciplinas acuáticas, brindando una formación especializada para el desarrollo de deportistas de alto nivel desde sus inicios. El proyecto arquitectónico tiene como principal enfoque crear interrelaciones espaciales mediante un espacio interior flexible que incorpore vistas programa, múltiples usos y calidad espacial que permita al edificio exhibir su interior y así lograr el contacto entre los diferentes usuarios creando circuitos definidos de acuerdo con cada uno. / The Project presented below is a High-Performance Swimming Center that is developed as an integrated element and urban landmark within the city. Located in the southern cone of Lima, in the district of San Juan de Miraflores, which due to the number of sports complexes in its extension has the vocation to be an important sports focus. However in the city of Lima there is no adequate infrastructure for the training of high-level athletes in their various disciplines, swimming being one of the most affected. It is in this way that the conception of the project arises, as a solution proposal for the development of sport at its highest level of demand and competitiveness. It seeks to be the main sports venue for national and international competitions and expand the practice of aquatic disciplines, providing specialized training for the development of high-level athletes from the beginning. The main focus of the architectural project is to create spatial interrelations through a flexible interior space that incorporates program views, multiple uses and spatial quality that allows the building to display its interior and thus achieve contact between the different users creating defined circuits according to each one. / Tesis
256

High- and low-level factors in visual attention

Kaspar, Kai 17 July 2013 (has links)
The visual sense has outstanding importance for humans’ interaction with the environment and visual attention is the key mechanism that bundles our limited cognitive resources in order to enhance the perceptual processing of the most relevant environmental features at a certain point in time. Eye-Tracking technology enables us to accurately observe peoples’ eye movement behavior i.e. overt attention. In the last decade, overt attention on real-world scenes gained increasing popularity in vision research. The higher ecological validity of such scenes in combination with a free-viewing task allows us to investigate human viewing behavior under natural conditions. In this context, the majority of previous studies focused on the impact of basal image properties, such as color and luminance differences, to quantify the extent to which our fixation behavior is guided by these so-called low-level image properties. However, in most experimental studies complex images are observed only one time, whereas we are continually confronted with repeated visual impressions in everyday life. Therefore, I introduce a repeated-presentation-design that allows scrutinizing the impact of low-level image properties and the power of scene types over time. Besides these low-level factors, I also address inter-individual differences in motivation as well as emotional components as so-called high-level factors in overt attention. Previous research on visual attention has widely neglected these factors, especially in the context of real-world images. On the basis of novel study designs and by means of various analysis techniques, I show how several low- and high-level factors influence overt attention on complex scenes, how they interact, and how eye movement parameters are interrelated. In addition to that, I provide a comprehensive review of the previous literature on emotions’ and personality traits’ impacts on visual attention. On the basis of the inconsistent understanding of core concepts in the literature, I describe how behaviorally oriented studies investigate these high-level factors in visual attention, how the interplay between emotion and attention is conceptualized from a neuroscientific perspective, and I derive several conceptual and practical recommendations for future research. Finally, I outline some new ideas and venues for future research in the general discussion of the present work, for example how eye-tracking might overcome some fundamental problems of classical testing in psychological diagnostics, or how the view of embodied cognition can help us to get a better understanding of high- and low-level factors in visual attention.
257

Segmentation and structuring of video documents for indexing applications / Segmentation et structuration de documents video pour l'indexation

Tapu, Ruxandra Georgina 07 December 2012 (has links)
Les progrès récents en matière de télécommunications, collaboré avec le développement des dispositifs d'acquisition d’images et de vidéos a conduit à une croissance spectaculaire de la quantité des données vidéo stockées, transmises et échangées sur l’Internet. Dans ce contexte, l'élaboration d'outils efficaces pour accéder aux éléments d’information présents dans le contenu vidéo est devenue un enjeu crucial. Dans le Chapitre 2 nous introduisons un nouvel algorithme pour la détection de changement de plans vidéo. La technique est basée sur la partition des graphes combinée avec une analyse multi-résolution et d'une opération de filtrage non-linéaire. La complexité globale de calcul est réduite par l’application d'une stratégie deux passes. Dans le Chapitre 3 le problème d’abstraction automatique est considéré. Dans notre cas, nous avons adopté un système de représentation image-clés qui extrait un nombre variable d'images de chaque plan vidéo détecté, en fonction de la variation du contenu visuel. Le Chapitre 4 traite la segmentation de haut niveau sémantique. En exploitant l'observation que les plans vidéo appartenant à la même scène ont les mêmes caractéristiques visuelles, nous introduisons un nouvel algorithme de regroupement avec contraintes temporelles, qui utilise le seuillage adaptatif et les plans vidéo neutralisés. Dans le Chapitre 5 nous abordons le thème de détection d’objets vidéo saillants. Dans ce contexte, nous avons introduit une nouvelle approche pour modéliser l'attention spatio-temporelle utilisant : la correspondance entre les points d'intérêt, les transformations géométriques et l’estimation des classes de mouvement / Recent advances in telecommunications, collaborated with the development of image and video processing and acquisition devices has lead to a spectacular growth of the amount of the visual content data stored, transmitted and exchanged over Internet. Within this context, elaborating efficient tools to access, browse and retrieve video content has become a crucial challenge. In Chapter 2 we introduce and validate a novel shot boundary detection algorithm able to identify abrupt and gradual transitions. The technique is based on an enhanced graph partition model, combined with a multi-resolution analysis and a non-linear filtering operation. The global computational complexity is reduced by implementing a two-pass approach strategy. In Chapter 3 the video abstraction problem is considered. In our case, we have developed a keyframe representation system that extracts a variable number of images from each detected shot, depending on the visual content variation. The Chapter 4 deals with the issue of high level semantic segmentation into scenes. Here, a novel scene/DVD chapter detection method is introduced and validated. Spatio-temporal coherent shots are clustered into the same scene based on a set of temporal constraints, adaptive thresholds and neutralized shots. Chapter 5 considers the issue of object detection and segmentation. Here we introduce a novel spatio-temporal visual saliency system based on: region contrast, interest points correspondence, geometric transforms, motion classes’ estimation and regions temporal consistency. The proposed technique is extended on 3D videos by representing the stereoscopic perception as a 2D video and its associated depth
258

Évaluation de dispositifs système-sur-puce pour des applications de type simulateurs temps réel embarqués de systèmes électriques / Evaluation of system-on-chip devices for embedded real-time simulators of electrical systems

Tormo Borreda, Daniel 11 July 2018 (has links)
L’objectif de ce travail de Thèse est d’évaluer les capacités de composants numérique de type Système-sur-Puce (SoC en anglais) pour l’implantation de Simulateurs Temps Réel Embarqués (ERTS en anglais) de systèmes électromécaniques et d’électronique de puissance. En effet, l’utilisation de ces simulateurs n’est pas seulement limitée aux validations matériel dans la boucle (en anglais Hardware-in-the-Loop ou HIL) du système mais doivent également être embarqués avec le contrôleur afin d’assurer plusieurs fonctionnalités additionnelles comme l'observation, l'estimation, commande sans capteur (ou sensorless), le diagnostic ou la surveillance de la santé, commande tolérante aux défauts, etc.La réalisation de ces simulateurs doit néanmoins considérer plusieurs contraintes à plusieurs niveaux de développement : durant la modélisation de la partie du système à simuler en temps-réel, durant la réalisation numérique et enfin durant l’implantation sur le composant numérique utilisé. Ainsi, le travail réalisé durant cette Thèse s’est focalisé sur ce dernier niveau et l’objectif était d’évaluer les capacités temps/ressources des composants de type SoC pour l’implantation de modules ERTS. Ce type de plateformes intègrent dans un même composant de puissants processeurs, un circuit logique programmable (de type Field-Programmable Gate Array ou FPGA), et d’autres périphériques, ce qui offre plusieurs opportunités d’implantation.Afin de pallier les limitations liées au codage VHDL de la partie FPGA, il existe des outils High-Level Synthesis (HLS) qui permettent de programmer ces dispositifs en utilisant des langages à haut niveau d'abstraction comme C, C++ ou SystemC. De plus, en incluant des directives et contraintes au code source, ces outils peuvent produire des implémentations matérielles différentes (architecture totalement combinatoire, « pipeline », architecture parallélisées ou factorisées, arranger les données et leurs formats pour une meilleure utilisation des ressources de mémoire, etc.).Dans le but d’évaluer ces différentes implantations, deux cas d’études ont été choisis : le premier se compose d’un Générateur Asynchrone à Double Alimentation (GADA) et le second d’un Convertisseur Modulaire Multiniveau (ou Modular Multi-level Converter - MMC). Vu que la GADA a une dynamique basse/moyenne (dynamiques électriques et mécaniques), deux versions d’implantations ont été évaluées : (i) une implantation full-software en utilisant seulement les processeurs ARM; et (ii) une implantation full-hardware en utilisant l’outil HLS pour programmer la partie FPGA. Ces deux versions ont été évaluées avec différentes optimisations du compilateur et trois formats de données: 64/32-bit en virgule flottante, et 32-bit en virgule flottante. L’approche mixe software/hardware a également été évaluée à travers la caractérisation des transferts de données entre le processeur et l’IP ERTS implantée dans la partie FPGA. Quant au convertisseur MMC, sa complexité et sa forte dynamique (dynamique de commutation) impose une implantation exclusivement full-hardware. Celle-ci a également été réalisée à base d’outils HLS.Enfin pour la validation expérimentale de ce travail de Thèse, une maquette à base de convertisseur MMC a été construite dans le but de comparer des mesures du système réel avec les résultats fournis par l’IP ERTS. / This Doctoral Thesis is a detailed study of how suitable System-on-Chip (SoC) devices are for implementing Embedded Real-Time Simulators (ERTS) of electromechanical and power electronic systems. This emerging class of Real-Time Simulators (RTS) are not only expected for Hardware-in-the-Loop (HIL) validations of systems; but they also have to be embedded within the controller to play several roles like observers, parameter estimation, diagnostic, health monitoring, fault-tolerant and sensorless control, etc.The design of these Intellectual Properties (IP) must rigorously consider a set of constraints at different development stages: (i) during the modeling of the system to be real-time simulated; (ii) during the digital realization of the IP; and also (iii) during its final implementation in the digital platform. Thus, the conducted work of this Thesis focuses specially on this last stage and its aim is to evaluate the time/resource performances of recent SoC devices and study how suitable they are for implementing ERTSs. These kind of digital platforms combine powerful general purpose processors, a Field-Programmable Gate Array (FPGA) and other peripherals which make them very convenient for controlling and monitoring a complete system.One of the limitations of these devices is that control engineers are not particularly familiarized with FPGA programming, which needs extensive expertise in order to code these highly sophisticated algorithms using Hardware Description Languages (HDL). Notwithstanding, there exist High-Level Synthesis (HLS) tools which allow to program these devices using more generic programming languages such as C, C++ or SystemC. Moreover, by inserting directives and constraints to the source code, these tools can produce different hardware implementations (e.g. full-combinatorial design, pipelined design, parallel or factorized design, partition or arrange data for a better utilisation of memory resources, etc.).This dissertation is based on the implementation of two representative applications that are well known in our laboratory: a Doubly-fed Induction Generator (DFIG) commonly used as wind turbines; and a Modular Multi-level Converter (MMC) that can be arranged in different configurations and utilized for many different energy conversion purposes. Since the DFIG has low/medium system dynamics (electrical and mechanical ones), both a full-software implementation using solely the ARM processor and a full-hardware implementation using HLS to program the FPGA will be evaluated with different design optimizations and data formats (64/32-bit floating-point and 32-bit fixed-point). Moreover, it will also be investigated whether a system of these characteristics is interesting to be run as a hardware accelerator. Different data transfer options between the Processor System (PS) and the Programmable Logic (PL) have been studied as well for this matter. Conversely, because of its harsh dynamics (switching dynamics), the MMC will be implemented only with a full-hardware approach using HLS tools, as well.For the experimental validation of this Thesis work, a complete MMC test bench has been built from scratch in order to compare the real-world results with its SoC ERTS implementation.
259

Government favoritism in public procurement : Evidence from Romania / Regeringens favorisering inom offentlig upphandling : fallet Rumänien

Pustan, Daniel January 2019 (has links)
In Romania, the consideration that politicians use their influence to control the public procurement market is axiomatic. It is no surprise that the country ranks high in perceptionbased surveys or the low participation of firms on the procurement market. The more difficult task is to demonstrate the existence of restrictions to procurement contracts in order to benefit preferred companies. That is, to measure the extent to which the market is captured by favored companies. Employing data on all public procurement contracts in Romania for the period 2009 – 2015, this paper examines government favoritism in public procurement exerted by political parties. Using a dynamic panel data approach (Dávid-Barrett and Fazekas 2019), the companies are classified based on their winning pattern with respect to government change. Favoritism is observed if winning companies within the government period are also associated with a higher risk of corruption measured by two alternative approaches. The findings confirm that procurement market is captured in a low to moderate proportion (24%) and that the market display patterns of systematic favoritism. This may signal certain progress registered by Romania to combat political corruption. Arguably, the insensitivity of perception indicators with respect to this progress is, at least partly, due to media coverage of the on-going corruption investigations related to the past. / I Rumänien, finns det en allmän uppfattning om att politiker använder sitt inflytande för att kontrollera den offentliga upphandlingsmarknaden. Det är ingen överraskning att landet rankas högt i perceptionsbaserade undersökningar rörande korruption eller att företags deltagande inom upphandlingsmarknaden är lågt. Ett svårare uppdrag är dock att påvisa och bevisa förekomsten av begränsningar kring upphandlingskontrakt med syfte att gynna vissa företag. Med andra ord så föreligger en utmaning att, genom mätning, påvisa i vilken utsträckning marknaden inkluderar favoriserade företag kontra hur den exkluderar övriga företag. Med hjälp av uppgifter om samtliga kontrakt gällande offentlig upphandling i Rumänien under åren 2009 – 2015, undersöker denna avhandling regeringens och dess politiska partiers favorisering. Företagen i upphandlingarna klassificeras med hjälp av dynamiskpaneldata (Dávid-Barrett och Fazekas 2019), baserat på des vinnande mönster kopplat till regeringsbyte. Favorisering kan observeras om vinnande företag inom regeringsperioden även är förknippade med en högre risk för korruption som mätts genom två alternativa metoder. Resultaten bekräftar att upphandlingsmarknaden fångas i en låg till måttlig andel (24%) av favoriserade företag och att marknaden visar mönster av systematisk favorisering. Resultaten kan dock signalera om visst framsteg som Rumänien har uppnått för att bekämpa politisk korruption. Det kan argumenteras att perceptionsbaserade indikatorer fångade inte upp dessa framsteg, åtminstone delvis, på grund av mediatäckningen av pågående korruptionsutredningar i Rumänien relaterade till det förflutna.
260

Exploring the design space of e-detailing through Magic Machine workshops to advance technologies for desirable futures

Grasselli, Iza January 2020 (has links)
Pharmaceutical detailing is moving to online environments because they are believed to save money, time, and be more convenient. Recently there has also been an increase in e-detailing due to the circumstances around COVID-19 pandemic. In the available literature, the transition to e-detailing is mostly evaluated through efficiency markers, with less focus on broader social implications and the interactions between people involved. To fill this gap and promote development of human-centred e-detailing technologies, this paper explores detailing interactions and related concerns which can guide the development of relevant detailing technologies. The field research and participatory Magic Machine workshops helped reveal and shape concerns which have implications for the future of e-detailing. High-level recommendations were derived to inspire further research and development of lasting, user-centred solutions. Design fiction artifacts were created to convey the research findings as boundary objects between pharmaceutical industry and academia. / Läkemedelskonsulenter flyttar sin verksamhet alltmer till en digital miljö då det anses spara pengar, tid och ska vara mer bekvämt. Covid-19 pandemin har också bidragit till en ökning av användandet av digitala verktyg för läkemedelskonsulenter. Tillgängliga vetenskapliga artiklar inom ämnet som utvärderar digitaliseringen för läkemedelskonsulenter gör det framför allt genom att mäta hur effektivt det är, och inte så mycket på de sociala följderna samt hur det inverkar på interaktionen mellan de inblandade parterna. För att fylla denna kunskapslucka och för att främja en människocentrerad digitalisering för läkemedelskonsulenter utforskar denna masteruppsats interaktionerna och dess relaterade följder, vilket kan användas som vägledning i utveckling av relevanta teknologier för läkemedelskonsulenter. Fältarbete, och en workshop som använde metoden Magic Machine, hjälpte till att ta fram och klargöra de problem som kan ha en viktig inverkan på framtida digitalt läkemedelskonsulterande. Design rekommendationer togs fram för att inspirera kommande forskning och utveckling av hållbara, användarcentrerade lösningar. Den skapade spekulativa designen visar upp forskningsresultat och på ett sätt som kan vara till användning av läkemedelsindustrin och universiteten.

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