Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / Sitagliptin Phosphate is an oral anti-hyperglycemic belonging to a new class of medicine used in type 2 diabetes treatment, the dipeptidyl dipetidase -4 (DPP-4) enzyme inhibitors. This drug besides being safe and tolerated, stimulates the insulin secretion, lowers the glucagon release, delays the gastric emptiness and increases beta cells life. It is commercially available as covered pills. So far, there is not any monograph to analyze sitagliptin phosphate in its pharmaceutical form. In this work some methods were developed and validated to evaluate and quantify the drug. The methods used to quantify it were high pressure efficiency liquid chromatography (HPLC) and spectrophotometry. The system through HPLC was carried out in room temperature and in an isocratic way with Phenomenex C 18 (15 cm x 4.6mm) reverse phase column and the mobile phase composed by 0.025M pH 6.8 phosphate buffer: acetronytril (60:40, v/v) with 0.8 mL /min. flow. The detection was accomplished in PDA in 267nm. With the spectrophotometric method the solvent used was HCI 0.01N and its detection was accomplished in 267nm wave length. The methods show a good linearity, precision and accuracy and having no significant difference between them. Later, some dissolution tests were carried out with different bacthes of drug and with similar results. / O Fosfato de sitagliptina é um anti-hiperglicemico oral pertencente a uma nova classe de medicamentos utilizados para o tratamento da diabete tipo 2, os inibidores da enzima dipeptidil dipetidase-4 (DPP-4). Este medicamento além de ser seguro e bem tolerado estimula a secreção de insulina, diminuí a liberação de glucagon, retarda o esvaziamento gástrico e prolonga a vida das células beta. Encontra-se comercialmente disponível na forma de comprimidos revestidos. Não existem monografias até o presente momento para a análise do fosfato de sitagliptina em sua forma farmacêutica. Neste trabalho foram desenvolvidos e validados métodos para a avaliação e quantificação do fármaco. Os métodos utilizados para a quantificação do fármaco foram à cromatografia liquida de alta eficiência (CLAE) e a espectrofotometria. O sistema por CLAE foi realizado em temperatura ambiente e de maneira isocrática com coluna de fase reversa Phenomenex C18 (15cm x 4.6mm) e fase móvel composta por tampão fosfato 0.025M pH 6.8 : acetonitrila (60:40, v/v) com vazão de 0.8mL/min. A detecção foi realizada no PDA em 267nm. No método espectrofotométrico o solvente utilizado foi o HCl 0.01N e sua detecção foi realizada no comprimento de onda de 267nm. Os métodos mostram boa linearidade, precisão e exatidão e não demonstraram diferença significativa entre eles. Posteriormente foram realizados testes de dissolução com resultados semelhantes com medicamentos de diferentes lotes.

Esta tese de doutorado apresenta o projeto de uma arquitetura de memória híbrida energeticamente eficiente baseada em memórias do tipo scratchpad (Hy-SVM) para a codificação paralela de vídeos segundo o padrão HEVC. A codificação de vídeo se destaca como uma parte extremamente complexa nas aplicações de processamento de vídeo. O padrão HEVC traz inovações que complicam fortemente os requerimentos de memória de tais aplicações, principalmente devido a: (a) novas estruturas de codificação, as quais agravam a complexidade computacional por proporcionarem muitas modos possíveis de codificação que devem ser analisados; além do (b) suporte de alto nível à paralelização da codificação por meio do particionamento das unidades de codificação em múltiplos Tiles, o qual provê a aceleração da performance dos codificadores, porém, ao mesmo tempo, adiciona grandes desafios à infraestrutura de memória. O principal gargalo em termos de comunicação com a memória externa e de armazenamento interno (dentro do chip do codificador) é dados pelas informações dos quadros de referência: que consiste em uma série de quadros completos já codificados (e reconstruídos) que devem ser mantidos em memória e acessados de forma intensa durante o processamento dos quadros futuros. Devido ao grande volume de dados que são necessários para representar os quadros de referência, estes são tipicamente armazenados na memória externa dos codificadores (principalmente quando vídeos de alta e ultra alta resolução são processados) A arquitetura proposta Hy-SVM está inserida em um sistema de codificação baseado no particionamento dos quadros do vídeo de entrada em múltiplos Tiles, de forma a habilitar a codificação paralela das informações segundo o padrão HEVC: neste cenário, cada Tile é assinalado para uma específica unidade de processamento do codificador HEVC, o qual executa o processamento dos diferentes Tiles em paralelo. A ideias chave da arquitetura Hy- SVM incluem: projeto e gerenciamento de memórias para a aplicação específica de codificação de vídeo; uso de múltiplos níveis de memórias privadas e compartilhadas, com o objetivo de explorar o reuso de dados intra-Tile e inter-Tiles de forma combinada; uso de memórias do tipo scratchpad (SPMs) para o armazenamento interno da informações de forma eficiente em termos de consumo de energia; projeto de memórias híbridas utilizando as tecnologias SRAM e STTRAM como base. Uma metodologia de projeto é proposta para a arquitetura Hy-SVM, a qual aproveita propriedades específicas da aplicação para, de forma adequada, definir os parâmetros de projeto das memórias híbridas. De forma a prover adaptação em tempo de execução (para ambas as memórias on-chip e off-chip), a arquitetura Hy-SVM integra uma camada de gerenciamento composta pelas seguintes estratégias (1) predição do overlap (sobreposição de acessos), o qual busca identificar o comportamento dos acessos redundantes entre diferentes unidades de processamento do codificador HEVC a partir da análise dos acessos à memória das codificações dos quadros passados do vídeo, com o objetivo de aumentar o potencial de exploração do reuso de dados inter-Tiles; (2) gerenciamento dos acessos à memória externa, responsável por balancear a vazão de dados com a memória acumulada entre as múltiplas unidades de processamento do codificador HEVC paralelo, com o objetivo de melhorar o uso do barramento de comunicação com a memória externa; e (3) gerenciamento de dados das SPMs implementadas a partir de células de memória STT-RAM, o qual alivia estas células de acessos de escrita com alta atividade de chaveamento dos bits armazenados, com o objetivo de aumentar o tempo de vide destas células, bem como reduzir as penalidades relativas à ineficiência dos acessos de escrita nas memórias STT-RAM. O conhecimento específico da aplicação foi utilizado nas estratégias de gerenciamento em tempo de execução das seguintes formas: explorando parâmetros da codificação HEVC e realizando monitorando em tempo real dos acessos à memória realizados pelo codificador Estas informações são utilizadas tanto pelas técnicas de gerenciamento, quanto pelas metodologias de projeto das memórias. Baseadas nas decisões tomadas pela camada de gerenciamento, a arquitetura Hy-SVM integra unidades de gerenciamento de acessos à memória (memory access management units – MAMUs) para controlar as dinâmicas de acesso das memórias SPM privadas e compartilhadas. Além disso, unidades adaptativas de gerenciamento de potência (adaptive power management units – APMUs) são capazes de reduzir o consumo de energia interno do chip do codificador a partir das estimativas precisas de formação dos overlaps. Os resultados obtidos por meio dos experimentos realizados demonstram economias de consumo energético da arquitetura Hy-SVM, quando comparada a trabalhos relacionados, sob diversos cenários de teste. Quando comparada a estratégias de reuso de dados tradicionais para codificadores de vídeo, como o esquema Level-C, a exploração do reuso de dados combinado nos níveis intra-Tile e inter-Tiles provê 69%-79% de redução de energia. Considerando as arquiteturas de memória de vídeo com foco no padrão HEVC, os ganhos variaram desde 2,8% (pior caso) até 67% (melhor caso) Da perspectiva do consumo de energia relacionado à comunicação com a memória externa, a arquitetura Hy-SVM é capaz de melhorar o reuso de dados (por explorar também o reuso de dados inter-Tiles), resultando em um consumo de energia on-chip 11%-17% menor. Além disso, as APMUs contribuem para reduzir o consumo de energia on-chip da arquitetura Hy-SVM em 56%-95%, para os cenários de teste analisados. Desta forma, comparada aos trabalhos relacionados, a arquitetura Hy-SVM apresenta o menor consumo energético on-chip. O gerenciamento da vazão da comunicação com a memória externa é capaz de reduzir as variações de largura de banda em 37%-83%, quando comparado à ordem tradicional de processamento, para cenários de teste com 4 e 16 Tiles sendo processados em paralelo pelo codificador HEVC. O gerenciamento de dados pôde, de forma significativa, estender o tempo de vida das células de memória STT-RAM, alcançando 0,83 de tempo de vida normalizado (métrica adotada para comparação, ficando muito próximo do caso ideal). Além disso, as sobrecargas causadas pela implementação das unidades de gerenciamento não afetam de foram significativa a performance e a eficiência energética da arquitetura Hy- SVM propostas por este trabalho. / This Thesis presents the design of an energy-efficient hybrid scratchpad video memory architecture (called Hy-SVM) for parallel High-Efficiency Video Coding. Video coding stands out as a high complex part in the video processing applications. HEVC standard brought innovations that increase the memory requirements, mainly due to: (a) the novel coding structures, which aggravates the computational complexity by providing a wider range of possibilities to be analyzed; and (b) the high-level parallelism features provided by the Tiles partitioning, which provides performance acceleration, but, at the same time, strongly adds hard challenges to the memory infrastructure. The main bottleneck in terms of external memory transmission and on-chip storage is the reference frames data: which consists of already coded (and reconstructed) entire frames that must be stored and intensively accessed during the encoding process of future frames. Due to the large volume of data required to represent the reference frames, they are typically stored in the external memory (especially when highdefinition videos are targeted). The proposed Hy-SVM architecture is inserted in a video coding system, which is based on multiple Tiles partitioning to enable parallel HEVC encoding: each Tile is assigned to a specific processing unit. The key ideas of Hy-SVM include: applicationspecific design and management; combined multiple levels of private and shared memories that jointly exploit intra-Tile and inter-Tiles data reuse; scratchpad memories (SPMs) as energyefficient on-chip data storage; combined SRAM and STT-RAM hybrid memory (HyM) design We propose a design methodology for Hy-SVM that leverages application-specific properties to properly define the HyMs parameters. In order to provide run-time adaptation (for both offand on-chip parts), Hy-SVM integrates a memory management layer composed of: (1) overlap prediction, which has the goal of identifying the redundant memory access behavior by analyzing monitored past frames encoding to increase inter-Tiles data reuse exploitation; (2) memory pressure management, which aims on balancing the Tiles-accumulated memory pressure targeting on improving external memory communication channel usage; and (3) lifetime-aware data management scheme that alleviates STT-RAM SPMs of high bit-toggling write accesses to increase the their cells lifetime, as well as to reduce overhead issues related to poor write characteristics of STT-RAM. Application-specific knowledge was exploited by inheriting HEVC properties and performing run-time monitoring of memory accesses. Such information is used to properly design the on-chip video memories, as well as being utilized as input parameters of the run-time memory management layer. Based on the run-time decisions from the proposed Hy-SVM management strategies, Hy-SVM integrates distributed memory access management units (MAMUs) to control the access dynamics of private and shared SPMs. Additionally, adaptive power management units (APMUs) are able to strongly reduce on-chip energy consumption due to an accurate overlap prediction The experimental results demonstrate Hy-SVM overall energy savings over related works under various HEVC encoding scenarios. Compared to traditional data reuse schemes, like Level-C, the combined intra-Tile and inter-Tiles data reuse provides 69%-79% of energy reduction. Regarding related HEVC video memory architectures, the savings varied from 2.8% (worst case) to 67% (best case). From the external memory perspective, Hy-SVM can improve data reuse (by also exploiting inter-Tiles data redundancy), resulting on 11%-71%% of reduced off-chip energy consumption. Additionally, our APMUs contribute by reducing on-chip energy consumption of Hy-SVM by 56%-95%, for the evaluated HEVC scenarios. Thus, compared to related works, Hy-SVM presents the lowest on-chip energy consumption. The memory pressure management scheme can reduce the variations in the memory bandwidth by 37%-83% when compared to the traditional raster scan processing for 4- and 16-core parallelized HEVC encoder. The lifetime-aware data management significantly extends the STT-RAM lifetime, achieving 0.83 of normalized lifetime (near to the optimal case). Moreover, the overhead of implementing our management units insignificantly affects the performance and energyefficiency of Hy-SVM.

Abstract This thesis studies the design methods and properties of supply-modulated switch-mode radio frequency power amplifiers. Besides simulation based studies and theory review, two amplifiers were designed: a discrete MESFET class E amplifier (0.5 W at 1 GHz), and an integrated pHEMT class E-1 amplifier (2.0 W at 1.6 GHz) with an on-chip resonator. The existing design methods of the resonant output network of switching amplifiers were reviewed and some extensions on the handling of nonlinear capacitances were proposed. The effects of varying supply voltage were studied and suggestions were given to minimize Vdd / AM and Vdd / PM distortion in supply modulated amplifiers. The implementation of the bias feed was also discussed resulting in proposing a combination of a short transmission line and a small inductor, which provides both fast supply modulation and little effect on harmonic impedances. The main contributions are related to the study of the input impedance of a class E power amplifier, where the effects of supply dependent input impedance and timing skew generated by injected harmonic distortion were analyzed. The stabilization of the amplifier was also discussed. Based on the findings, a push-pull class E amplifier with extra cross-coupled feedback capacitors and second harmonic traps at the gates appears to be a very good starting point for a further study. / Tiivistelmä Tämä väitöstyö käsittelee radiotaajuuksilla toimivien käyttöjännitemoduloitujen kytkintehovahvistimien ominaisuuksia ja suunnittelumenetelmiä. Suunnittelumenetelmiin liittyvän katsauksen ja simulaatioihin perustuvan tutkimusten lisäksi kaksi vahvistinta toteutettiin väitöstutkimuksen aikana: diskreettikomponentein toteutettu E-luokan vahvistin (MESFET, 0.5 W ja 1 GHz) ja integroituna piirinä toteutettu käänteinen E-luokan vahvistin (pHEMT, 2.0 W ja 1.6 GHz), jonka lähdön resonaattoripiiri sisällytettiin integroituun piiriin. Kytkinvahvistimien suunnittelumenetelmiä verrattiin ja kehitettiin edelleen siten, että suunnitteluvaiheessa voidaan ottaa huomioon esim. transistoripiirin takaisinkytkennässä olevan kapasitanssin epälineaarisuus. Työssä tutkittiin myös käyttöjännitemodulaation vaikutusta kytkinvahvistimien toimintaan, ja tutkimuksen tuloksena annettiin muutamia ehdotuksia käyttöjänniteriippuvan amplitudi- (Vdd / AM) ja vaihemodulaation (Vdd / PM) vähentämiseksi. Lähdön biasointipiirin toteutukseen suositeltiin pienen kelan ja siirtolinjan yhdistelmää. Yhdistelmän avulla pyritään maksimoimaan modulaationopeus ja minimoimaan vaikutukset harmonisiin impedansseihin. Pääkohtina väitöksessä ovat E-luokan kytkinvahvistimesta saadut tutkimus- ja mittaushavainnot käyttöjännitteen funktiona muuttuvasta transistorin tuloimpedanssista sekä suurikokoisen transistorin tuloissa tapahtuvan, säröytymisen aiheuttaman tulosignaalien ajoitusvirheen analyysi. Näiden lisäksi vahvistimen stabiilisuuteen kiinnitettiin huomiota. Saatujen havaintojen perusteella voimme todeta, että push-pull -tyyppinen E-luokan vahvistin olisi mielenkiintoinen valinta jatkotutkimuksille.

La compression vidéo HEVC standardisée en 2013 offre des gains de compression dépassant les 50% par rapport au standard de compression précédent MPEG4-AVC/H.264. Ces gains de compression se paient par une augmentation très importante de la complexité de codage. Si on ajoute à cela l’augmentation de complexité générée par l’accroissement de résolution et de fréquence image du signal vidéo d’entrée pour passer de la Haute Définition (HD) à l’Ultra Haute Définition (UHD), on comprend vite l’intérêt des techniques de réduction de complexité pour le développement de codeurs économiquement viables. En premier lieu, un effort particulier a été réalisé pour réduire la complexité des images Intra. Nous proposons une méthode d'inférence des modes de codage à partir d'un pré-codage d'une version réduite en HD de la vidéo UHD. Ensuite, nous proposons une méthode de partitionnement rapide basée sur la pré-analyse du contenu. La première méthode offre une réduction de complexité d'un facteur 3 et la deuxième, d'un facteur 6, contre une perte de compression proche de 5%. En second lieu, nous avons traité le codage des images Inter. En mettant en œuvre une solution d'inférence des modes de codage UHD à partir d'un pré-codage au format HD, la complexité de codage est réduite d’un facteur 3 en considérant les 2 flux produits et d’un facteur 9.2 sur le seul flux UHD, pour une perte en compression proche de 3%. Appliqué à une configuration de codage proche d'un système réellement déployé, l'apport de notre algorithme reste intéressant puisqu'il réduit la complexité de codage du flux UHD d’un facteur proche de 2 pour une perte de compression limitée à 4%. Les stratégies de réduction de complexité mises en œuvre au cours de cette thèse pour le codage Intra et Inter offrent des perspectives intéressantes pour le développement de codeurs HEVC UHD plus économes en ressources de calculs. Elles sont particulièrement adaptées au domaine de la WebTV/OTT qui prend une part croissante dans la diffusion de la vidéo et pour lequel le signal vidéo est codé à des résolutions multiples pour adresser des réseaux et des terminaux de capacités variées. / The High Efficiency Video Coding (HEVC) standard was released in 2013 which reduced network bandwidth by a factor of 2 compared to the prior standard H.264/AVC. These gains are achieved by a very significant increase in the encoding complexity. Especially with the industrial demand to shift in format from High Definition (HD) to Ultra High Definition (UHD), one can understand the relevance of complexity reduction techniques to develop cost-effective encoders. In our first contribution, we attempted new strategies to reduce the encoding complexity of Intra-pictures. We proposed a method with inference rules on the coding modes from the modes obtained with pre-encoding of the UHD video down-sampled in HD. We, then, proposed a fast partitioning method based on a pre-analysis of the content. The first method reduced the complexity by a factor of 3x and the second one, by a factor of 6, with a loss of compression efficiency of 5%. As a second contribution, we adressed the Inter-pictures. By implementing inference rules in the UHD encoder, from a HD pre-encoding pass, the encoding complexity is reduced by a factor of 3x when both HD and UHD encodings are considered, and by 9.2x on just the UHD encoding, with a loss of compression efficiency of 3%. Combined with an encoding configuration imitating a real system, our approach reduces the complexity by a factor of close to 2x with 4% of loss. These strategies built during this thesis offer encouraging prospects for implementation of low complexity HEVC UHD encoders. They are fully adapted to the WebTV/OTT segment that is playing a growing part in the video delivery, in which the video signal is encoded with different resolution to reach heterogeneous devices and network capacities.

Malgré leur réussite remarquable, les premières versions des normes de réseaux locaux sans fil IEEE 802.11, IEEE 802. 11 a/b/g WLAN, sont caractérisées par une efficacité spectrale faible qui est devenue insuffisante pour satisfaire la croissance explosive de la demande de capacité et de couverture. Grâce aux progrès considérables dans le domaine des communications sans fil et l'utilisation de la bande de fréquence autour de 5 gigahertz le standard IEEE 802.11n et plus récemment 1'IEEE 802.11ac ont amélioré les débits offerts par la couche physique. Cela été possible grâce principalement à l'introduction des techniques multi-antennaires (MIMO, pour Multiple-Input) et des techniques avancées de modulation et de codage. Aujourd'hui, deux décennies après sa première apparition, le Wi-Fi est présenté comme une technologie WLAN permettant des débits supérieurs à 1 gigabit par seconde. Cependant, dans la plupart des scénarios de déploiement du monde réel, il n'est pas possible d'atteindre la pleine capacité offerte par la couche physique. Avec la croissance rapide de la densité des déploiements des WLANs et l'énorme popularité des équipements Wi-Fi, la réutilisation spatiale doit être optimisée. D'autre part, des nouveaux cas d’utilisation sont prévus pour décharger les réseaux cellulaires et pour couvrir des grandes surfaces (stades, gares, etc.). Ces environnements de haute densité représentent un vrai défi pour les générations actuelles de Wi-Fi qui doivent offrir une meilleure qualité à moindre coût. C'est dans ce contexte que s’inscrit l'objectif de cette thèse qui porte sur l'amélioration de l'efficacité des protocoles de la couche MAC des réseaux WLAN de haute densité. Notamment, un des buts de cette thèse est de contribuer à la préparation de la prochaine génération du standard Wi-Fi : IEEE 802.11ax High Efficiency WLAN (HEW). Plutôt que de continuer à cibler l'augmentation des débits maximums théoriques, nous nous concentrons dans le contexte de HEW sur l'amélioration du débit réel des utilisateurs. Pour cela, on prend en compte tous les autres équipements associés à des WLANs voisins, qui essayent d'accéder au même canal de transmission d’une manière simultanée. Pour améliorer la performance du Wi-Fi dans ces environnements denses, nous proposons une adaptation dynamique du mécanisme de détection de signal. Comparé au contrôle de la puissance de transmission, le mécanisme proposé est plus incitatif parce que l'utilisateur concerné bénéficie directement de son application. Les résultats de nos simulations montrent des gains importants en termes de débit atteint dans les scénarios de haute densité. Ensuite, nous étudions l’impact de la nouvelle adaptation sur les mécanismes de sélection de débit actuellement utilisés. D'après les résultats obtenus, 1'adaptation proposée peut être appliquée sans avoir besoin de modifications substantielles des algorithmes de sélection de débit. Pour améliorer l'équité entre les différents utilisateurs, nous élaborons une nouvelle approche distribuée pour adapter conjointement le mécanisme de détection de signal et le contrôle de la puissance de transmission. Cette approche est évaluée ensuite dans différents scénarios de simulation de haute densité où elle prouve sa capacité à résoudre les problèmes d'équité en particulier en présence de nœuds d'anciennes générations dans le réseau, cela tout en améliorant le débit moyen d'un facteur 4 par rapport à la performance conventionnelle du standard. Enfin, nous concevons et mettons en œuvre une solution centralisée basée sur l'apprentissage à base de réseaux de neurones. Cette approche repose sur l'adaptation conjointe de puissance de transmission et du mécanisme de détection du signal. [...] / Despite their remarkable success, the first widely spread versions of the Institute of Electrical and Electronics Engineers (IEEE) 802.11 Wireless Local Area Network (WLAN) standard, IEEE 802. 11 a/b/g, featured low spectral efficiencies that are becoming insufficient to satisfy the explosive growth in capacity and coverage demands. Thanks to the advances in the communication theory and the use of the 5 GHz frequency band, the IEEE 802.11n and recently the IEEE 802.1lac amendments improved the Physical Layer (PHY) data rates by introducing Multiple-Input Multiple Output (MIMO) techniques, higher Modulation and Coding Scheme (MCS), etc. Today, after almost two decades of its first appearance, Wi-Fi is presented as a gigabit wireless technology. However, the full potential of the latest PHY layer advances cannot be enabled in all real world deployment scenarios. With the rapidly increasing density of WLAN deployments and the huge popularity of Wi-Fi enabled devices, spatial reuse must be optimized. On another hand, the new challenging use case environments and the integration of mobile networks mainly for cellular offloading are limiting the opportunity of the current Wi-Fi generations to provide better quality at lower cost.In this thesis, we contribute to the current standardization efforts aiming to leverage the Wi-Fi efficiency in high density environments. At the time of writing this document, the IEEE 802.11ax Task Group (TG) is developing the specification for the High Efficiency WLAN (HEW) standard (next Wi-Fi evolution). Rather than continuing to target increased theoretical peak throughputs, we focus in the context of HEW on improving the throughput experienced by users in real life conditions where many other devices, belonging to neighboring overlapping networks, simultaneously contend to gain access. To enhance this performance, we propose a dynamic adaptation of the carrier sensing mechanism. Compare to controlling the transmission power, the proposed mechanism has more incentives because it benefits directly the concerned user. Extensive simulation results show impor1ant throughput gains in dense scenarios. Then, we study the impact of the new adaptation on the current rate control algorithms. We find that our adaptation mechanism operates efficiently without substantially modifying these algorithms that are widely used in today's operating WLANs. Furthermore, after analyzing the fairness performance of the proposed adaptation, we devise a new approach to jointly adapt the carrier sensing and the transmission power in order to preserve higher fairness degrees while improving the spatial reuse. This approach is evaluated in different dense deployment scenarios where it proves its capability to resolve the unfairness issues especially in the presence of legacy nodes in the network, while improving the achieved throughput by 4 times compared to the standard performance. Finally, we design and implement centralized learning-based solution that uses also an approach based on joint adaptation of transmission power and carrier sensing. This new solution takes benefit from the capability of artificial neural networks to model complex nonlinear functions to optimize the spatial reuse in dense WLANs while preserving fairness among contending nodes. The different contributions of this work have helped bring efficient solutions for future WiFi networks. We have presented these solutions to the IEEE 802.11ax TG where they were identified as important potential technical improvements for the next WLAN standard.

This thesis focuses on optimization and increasing the efficiency of high-power DC/DC switching converters with transformer (switching power supplies). The work focuses mainly on using converters with flyback topology for high power, even though it is a common belief that this type of converter is not suitable for high power. This topology was selected because of potentially better achievable parameters, especially the efficiency, in comparison to a commonly used forward converter – in a flyback converter, losses are produced only in one magnetic component (transformer) in contrast to two components (transformer and inductor) in the forward converter. Compared to resonant and quasi-resonant converters, the flyback converter is easily controllable in the whole output voltage and current range. To make the flyback converter favorable for a high-power use, some innovative circuit modifications were made and modern semiconductor and passive components were used. Theoretical part of the work deals with efficiency optimization of the flyback converter, based on analytical solution. Operating parameters of the converter – switching frequency and parameters of the transformer (flux density and numbers of turns) are commonly only guessed or chosen from experience. The objective of this part is a mathematically exact determination of these parameters to achieve lowest total losses of the converter for given input parameters. In a certain case, it was possible to obtain the final solution analytically, in other cases the final solution step had to be done with a help of software. A prototype of a 12-kW switching power supply with a flyback converter was constructed to validate the proposed solutions and methods. The power supply fits into a space of only 33x33x16 cm. Modern semiconductors based on the silicon-carbide (SiC) technology (MOS-FET transistors and diodes) were used. After bringing the converter to a full-power operation, an efficiency of 96.8 % of the DC/DC converter was measured. High efficiency was obtained for a wide range of output parameters. A certain comparison with a forward converter with the same output parameters is done in the work. Not only from an efficiency point of view, the flyback converter seems very perspective.

This Master’s thesis is focused on design of voltage converter’s system operating with supply voltage of batteries. There are selected appropriate types of batteries, converter topologies and modes of their control. The specified output branches are systematically divided into three separate modules. Each module is designed in detail with focus on high efficiency. The modules are implemented and optimized. Parameter of final modules were measured and compared with correctness of design and theoretical assumptions.

This Master´s thesis deals with a thermal calculation and dimensional design of steam boiler for natural gas combustion with respect to the high efficiency of the boiler. It includes stoichiometric calculation and calculation of technical specifications of the boiler. Dimensions of combustion chamber are proposed. The crucial part of this thesis includes thermal calculation of designed heat-exchanging surfaces. The heat balance of the whole boiler is made to verify the results.

Le photovoltaïque (PV) s’est imposé comme un acteur majeur de l’énergie. L’innovation dans ce domaine passera sans doute par le PV à haut rendement sur des couches minces flexibles et légères permettant son déploiement dans les applications mobiles. Cette thèse étudie le développement de cellules solaires III-V à structures quantiques visant des concepts PV hauts rendements tels les cellules solaires à bande intermédiaire (IBSC). Ces IBSC se sont montrés limités du fait de l’échappement thermique des porteurs à température ambiante ainsi que la faible absorption optique sous le gap. Nous avons évalué la topologie, le mécanisme d’échappement thermique, la structure quantique ainsi que l’absorption de boites quantiques en In(Ga)As dans un matériau hôte en Al0.2GaAs à grand gap. Nous avons aussi caractérisé de manière quantitative comment opère ce système et avons amélioré son design optique. Sous une forte irradiation, nous avons mis en évidence l’apparition d’une population de porteurs chauds dans les boites quantiques. Par ailleurs, l’effet d’absorption sequentielle à deux photons (S-TPA) a été démontré. Nous avons observé une augmentation de ce S-TPA d’un facteur x5-10 grâce à du management de la lumière réalisé notamment avec des cavités de Fabry-Pérot. Des nanostructures périodiques ont aussi été fabriquées dans le cas de cellules solaires à multi-puits quantiques par l’utilisation de lithographie en nanoimpression. Dans l’ensemble cette étude vise à discuter la possibilité de réaliser des cellules solaires à porteurs chauds assistés d’une bande intermédiaire et améliorées par un management optique afin d’ouvrir la voie pour des cellules à hauts rendements. / In the past decade, photovoltaics (PV) has become a key player for the future of worldwide energy generation. Innovation in PV is likely to rely on high efficiency PV with flexible and lightweight thin films to enable PV deployement for mobile applications. In the framework of the Japanese-French laboratory “NextPV”, this thesis investigates the development of III-V quantum structured solar cells to explore high-efficiency photovoltaic concepts especially intermediate band solar cells (IBSC). Quantum structured IBSC have proven to be limited by thermal escape at room temperature and by low subbandgap light absorption. Following a consistent approach, we evaluate the topology, thermal escape mechanism, quantum structure and optical absorption of In(Ga)As quantum dots in a wide gap Al0.2GaAs host material. We also characterize quantitatively the device operation and improve the optical design. For a high irradiation, we evidence a hot carrier population in the quantum dots. At the same time, sequential two-photon absorption (S-TPA) is demonstrated both optically and electrically. We also show that S-TPA for both subbandgap transitions can be enhanced by a factor x5-10 with light management techniques, for example by implementation of Fabry-Perot cavities with the different epitaxial transfer methods that we developed. More advanced periodical nanostructures were also fabricated in the case of multi-quantum well solar cells using nanoimprint lithography techniques. Overall we discuss the possibility of realizing intermediate-band-assisted hotcarrier solar cells with light management to open the path for high-efficiency quantum structured IBSC.

This work focusses on the high brightness performance of phosphorescent organic light-emitting diodes (OLEDs). The use of phosphorescent emitter molecules in OLEDs is essential to realize internal electron-photon conversion efficiencies of 100 %. However, due to their molecular nature, the excited triplet states have orders of magnitude longer time constants compared to their fluorescent counterparts which, in turn, strongly increases the probability of bimolecular annihilation. As a consequence, the efficiencies of phosphorescent OLEDs decline at high brightness – an effect known as efficiency roll-off, for which it has been shown to be dominated by triplet-triplet annihilation (TTA). In this work, TTA of the archetype phosphorescent emitter Ir(ppy)3 is investi- gated in time-resolved photoluminescence experiments. For the widely used mixed system CBP:Ir(ppy)3, host-guest TTA – an additional unwanted TTA channel – is experimentally observed at high excitation levels. By using matrix materials with higher triplet energies, this effect is efficiently suppressed, however further studies show that the efficiency roll-off of Ir(ppy)3 is much more pronounced than predicted by a model based on Förster-type energy transfer, which marks the intrinsic limit for TTA. These results suggest that the emitter molecules show a strong tendency to form aggregates in the mixed film as the origin for enhanced TTA. Transmission electron microscopy images of Ir(ppy)3 doped mixed films give direct proof of emitter aggregates. Based on these results, two concepts are developed that improve the high brightness performance of OLEDs. In a first approach, thin intrinsic matrix interlayers are incorporated in the emission layer leading to a one-dimensional exciton confinement that suppresses exciton migration and, consequently, TTA. The second concept reduces the efficiency roll-off by using an emitter molecule with slightly differ- ent chemical structure, i.e. Ir(ppy)2(acac). Compared to Ir(ppy)3, this emitter has a much smaller ground state dipole moment, suggesting that the improved performance is a result of weaker aggregation in the mixed film. The knowledge gained in the investigation of triplet-triplet annihilation is further used to develop a novel emission layer design for white organic LEDs. It comprises three phosphorescent emitters for blue, green, and red emission embedded in a multilayer architecture. The key feature of this concept is the matrix material used for the blue emitter FIrpic: Its triplet energy is in resonance with the FIrpic excited state energy which enables low operating voltages and high power efficiencies by reducing thermal relaxation. In order to further increase the device efficiency, the OLED architecture is optically optimized using high refractive index substrates and thick electron transport layers. These devices reach efficiencies which are on par with fluorescent tubes – the current efficiency benchmark for light sources. / Diese Arbeit richtet ihren Fokus auf die Untersuchung der Leistungsfähigkeit von phosphoreszenten, Licht-emittierenden organischen Dioden (OLEDs) im Bereich hoher Betriebshelligkeiten. Phosphoreszente Emittermoleku ̈le werden in OLEDs eingesetzt, um interne Elektron-Photon Konversionseffizienzen von 100% zu erreichen. Begründet in ihrer chemischen Struktur, weisen die angeregten Triplett-Zustände dieser Emitter um Größenordnungen längere Zeitkonstanten als die Emission fluo- reszenter Materialien auf, sodass die Wahrscheinlichkeit bimolekularer Auslöschung stark ansteigt. Dies resultiert in einem deutlichen Effizienzrückgang phosphoreszenter OLEDs bei großen Leuchtdichten. Dieser als Roll-off bekannter Effekt wird bei hohen Anregungsdichten hauptsächlich durch Triplett-Triplett Annihilation (TTA) bestimmt. In der Arbeit wird TTA an einem Modellmolekül, dem phosphoreszenten Emit- ter Ir(ppy)3, in zeitaufgelösten Photolumineszenz Experimenten untersucht. Für das bekannte Emittersystem CBP:Ir(ppy)3 wird bei hohen Anregungsdichten Host-Guest TTA beobachtet, was einen zusätzlichen, ungewünschten TTA Kanal darstellt. Dieser Effekt wird durch das Verwenden von Matrix Materialien mit höherer Triplett Energie vermieden, jedoch zeigt sich in weiteren Untersuchungen, dass der Roll-off deutlich stärker ist als von einem auf Förster Energieübertrag basierendem Modell vorhergesagt, welches selbst ein intrinsisches Limit für TTA in phosphoreszenten Systemen beschreibt. Die Diskrepanz zwischen experimenteller Beobachtung und Modellvorhersage wird durch eine starke Tendenz des Emitters, Aggregate zu bilden, erklärt, was TTA deutlich verstärkt. Diese Aggregate werden mit Hilfe von Transmissionselektronenmikroskopie an Ir(ppy)3-dotierten Mischsystemen direkt nachgewiesen. Basierend auf diesen Resultaten werden zwei Konzepte entwickelt, um die Effizienz phosphoreszenter Systeme bei hohen Helligkeiten zu verbessern. Im ersten Ansatz werden dünne intrinsische Schichten des Matrixmaterials in die Emissionsschicht eingebaut, was die Exzitonenbewegung in einer Raumrichtung und damit auch TTA stark unterdrückt. Das zweite Konzept reduziert den Effizienz Roll-off durch die Verwendung eines phosphoreszenten Emitters Ir(ppy)2(acac) mit einer leicht abgeänderten Molekularstruktur. Im Vergleich mit Ir(ppy)3 weist dieser ein deutlich kleineres Dipolmoment im molekularen Grundzustand auf, wodurch die Aggregation vermindert wird. Aufbauend auf den Ergebnissen der TTA wird ein neuartiges Emissionsschicht-Design für weißes Licht entwickelt. In diesem Konzept werden drei phosphoreszente Materialien für blaue, grüne und rote Farbe in eine Vielschicht-Architektur eingebracht. Das Hauptmerkmal der Emissionsschicht ist die Wahl des Matrix-Materials für dem blauen Emitter FIrpic: Seine Triplett Energie liegt resonant zu dem FIrpic Triplett Zustand, wodurch niedrige Betriebsspannungen und hohe Leistungseffizienzen ermöglicht werden, da die thermische Relaxierung reduziert wird. Um die Ef- fizienz dieser weißen OLEDs weiter zu erhöhen, wird die entwickelte OLED Architektur zusätzlich durch die Verwendung von hochbrechenden Substraten und dicken Elektronen-Transportschichten optisch optimiert. Bei beleuchtungsrelevanten Helligkeiten erreichen diese OLEDs das Effizienzniveau von Leuchtstoffröhren – letztere stellen heute den Effizienz-Maßstab dar.