Esta dissertação de mestrado propõe um algoritmo adaptativo que é capaz de dinamicamente definir partições tile para quadros intra- e inter-preditos com o objetivo de reduzir o impacto na eficiência de codificação. Tiles são novas ferramentas orientadas ao paralelismo que integram o padrão de codificação de vídeos de alta eficiência (HEVC – High Efficiency Video Coding standard), as quais dividem o quadro em regiões retangulares independentes que podem ser processadas paralelamente. Para viabilizar o paralelismo, os tiles quebram as dependências de codificação através de suas bordas, gerando impactos na eficiência de codificação. Este impacto pode ser ainda maior caso os limites dos tiles dividam regiões altamente correlacionadas do quadro, porque a maior parte das ferramentas de codificação usam informações de contexto durante o processo de codificação. Assim, o algoritmo proposto agrupa as regiões do quadro que são altamente correlacionadas dentro de um mesmo tile para reduzir o impacto na eficiência de codificação que é inerente ao uso de tiles. Para localizar as regiões altamente correlacionadas do quadro de uma maneira inteligente, as características da imagem e também as informações de codificação são analisadas, gerando mapas de particionamento que servem como parâmetro de entrada para o algoritmo. Baseado nesses mapas, o algoritmo localiza as quebras naturais de contexto presentes nos quadros do vídeo e define os limites dos tiles nessas regiões. Dessa maneira, as quebras de dependência causadas pelas bordas dos tiles coincidem com as quebras de contexto naturais do quadro, minimizando as perdas na eficiência de codificação causadas pelo uso dos tiles. O algoritmo proposto é capaz de reduzir mais de 0.4% e mais de 0.5% o impacto na eficiência de codificação causado pelos tiles em quadros intra-preditos e inter-preditos, respectivamente, quando comparado com tiles uniformes. / This Master Thesis proposes an adaptive algorithm that is able to dynamically choose suitable tile partitions for intra- and inter-predicted frames in order to reduce the impact on coding efficiency arising from such partitioning. Tiles are novel parallelismoriented tools that integrate the High Efficiency Video Coding (HEVC) standard, which divide the frame into independent rectangular regions that can be processed in parallel. To enable the parallelism, tiles break the coding dependencies across their boundaries leading to coding efficiency impacts. These impacts can be even higher if tile boundaries split highly correlated picture regions, because most of the coding tools use context information during the encoding process. Hence, the proposed algorithm clusters the highly correlated picture regions inside the same tile to reduce the inherent coding efficiency impact of using tiles. To wisely locate the highly correlated picture regions, image characteristics and encoding information are analyzed, generating partitioning maps that serve as the algorithm input. Based on these maps, the algorithm locates the natural context break of the picture and defines the tile boundaries on these key regions. This way, the dependency breaks caused by the tile boundaries match the natural context breaks of a picture, then minimizing the coding efficiency losses caused by the use of tiles. The proposed adaptive tiling algorithm, in some cases, provides over 0.4% and over 0.5% of BD-rate savings for intra- and inter-predicted frames respectively, when compared to uniform-spaced tiles, an approach which does not consider the picture context to define the tile partitions.

abstract: GaAs-based solar cells have attracted much interest because of their high conversion efficiencies of ~28% under one sun illumination. The main carrier recombination mechanisms in the GaAs-based solar cells are surface recombination, radiative recombination and non-radiative recombination. Photon recycling reduces the effect of radiative recombination and is an approach to obtain the device performance described by detailed balance theory. The photon recycling model has been developed and was applied to investigate the loss mechanisms in the state-of-the-art GaAs-based solar cell structures using PC1D software. A standard fabrication process of the GaAs-based solar cells is as follows: wafer preparation, individual cell isolation by mesa, n- and p-type metallization, rapid thermal annealing (RTA), cap layer etching, and anti-reflection coating (ARC). The growth rate for GaAs-based materials is one of critical factors to determine the cost for the growth of GaAs-based solar cells. The cost for fabricating GaAs-based solar cells can be reduced if the growth rate is increased without degrading the crystalline quality. The solar cell wafers grown at different growth rates of 14 μm/hour and 55 μm/hour were discussed in this work. The structural properties of the wafers were characterized by X-ray diffraction (XRD) to identify the crystalline quality, and then the as-grown wafers were fabricated into solar cell devices under the same process conditions. The optical and electrical properties such as surface reflection, external quantum efficiency (EQE), dark I-V, Suns-Voc, and illuminated I-V under one sun using a solar simulator were measured to compare the performances of the solar cells with different growth rates. Some simulations in PC1D have been demonstrated to investigate the reasons of the different device performances between fast growth and slow growth structures. A further analysis of the minority carrier lifetime is needed to investigate into the difference in device performances. / Dissertation/Thesis / M.S. Electrical Engineering 2014

Esta dissertação de mestrado propõe um algoritmo adaptativo que é capaz de dinamicamente definir partições tile para quadros intra- e inter-preditos com o objetivo de reduzir o impacto na eficiência de codificação. Tiles são novas ferramentas orientadas ao paralelismo que integram o padrão de codificação de vídeos de alta eficiência (HEVC – High Efficiency Video Coding standard), as quais dividem o quadro em regiões retangulares independentes que podem ser processadas paralelamente. Para viabilizar o paralelismo, os tiles quebram as dependências de codificação através de suas bordas, gerando impactos na eficiência de codificação. Este impacto pode ser ainda maior caso os limites dos tiles dividam regiões altamente correlacionadas do quadro, porque a maior parte das ferramentas de codificação usam informações de contexto durante o processo de codificação. Assim, o algoritmo proposto agrupa as regiões do quadro que são altamente correlacionadas dentro de um mesmo tile para reduzir o impacto na eficiência de codificação que é inerente ao uso de tiles. Para localizar as regiões altamente correlacionadas do quadro de uma maneira inteligente, as características da imagem e também as informações de codificação são analisadas, gerando mapas de particionamento que servem como parâmetro de entrada para o algoritmo. Baseado nesses mapas, o algoritmo localiza as quebras naturais de contexto presentes nos quadros do vídeo e define os limites dos tiles nessas regiões. Dessa maneira, as quebras de dependência causadas pelas bordas dos tiles coincidem com as quebras de contexto naturais do quadro, minimizando as perdas na eficiência de codificação causadas pelo uso dos tiles. O algoritmo proposto é capaz de reduzir mais de 0.4% e mais de 0.5% o impacto na eficiência de codificação causado pelos tiles em quadros intra-preditos e inter-preditos, respectivamente, quando comparado com tiles uniformes. / This Master Thesis proposes an adaptive algorithm that is able to dynamically choose suitable tile partitions for intra- and inter-predicted frames in order to reduce the impact on coding efficiency arising from such partitioning. Tiles are novel parallelismoriented tools that integrate the High Efficiency Video Coding (HEVC) standard, which divide the frame into independent rectangular regions that can be processed in parallel. To enable the parallelism, tiles break the coding dependencies across their boundaries leading to coding efficiency impacts. These impacts can be even higher if tile boundaries split highly correlated picture regions, because most of the coding tools use context information during the encoding process. Hence, the proposed algorithm clusters the highly correlated picture regions inside the same tile to reduce the inherent coding efficiency impact of using tiles. To wisely locate the highly correlated picture regions, image characteristics and encoding information are analyzed, generating partitioning maps that serve as the algorithm input. Based on these maps, the algorithm locates the natural context break of the picture and defines the tile boundaries on these key regions. This way, the dependency breaks caused by the tile boundaries match the natural context breaks of a picture, then minimizing the coding efficiency losses caused by the use of tiles. The proposed adaptive tiling algorithm, in some cases, provides over 0.4% and over 0.5% of BD-rate savings for intra- and inter-predicted frames respectively, when compared to uniform-spaced tiles, an approach which does not consider the picture context to define the tile partitions.

Video transcoding is the process of converting compressed video signals to adapt video characteristics such as video bit rate, video resolution, or video codec, so as to meet the specifications of communication channels and endpoint devices. A straightforward transcoding solution is to fully decode and encode the video. However this method is computationally expensive and thus unsuitable in applications with tight resource constraints such as in software-based real-time environment. Therefore, efficient transcoding meth- ods are required to reduce the transcoding complexity while preserving video quality. Prior transcoding methods are suitable for video coding standards such as H.264/AVC and MPEG-2. H.265/HEVC has introduced new coding concepts, e.g., the quad-tree-based block structure, that are fundamentally different from those in prior standards. These concepts require existing transcoding methods to be adapted and novel solutions to be developed. This work primarily addressed the issue of efficient HEVC transcoding for bit rate adaptation (reduction). The goal is to understand the transcoding behaviour for some straightforward transcoding strategies, and to subsequently optimize the complexity/quality trade-off by providing heuristics to reduce the number of coding options to evaluate. A transcoder prototype is developed based on the HEVC reference software HM-8.2. The proposed transcoder reduces the transcoding time compared to full decoding and encoding by at least 80% while inducing a coding performance drop within a margin for 5%. The thesis has been carried out in collaboration with Ericsson Research in Stockholm / Video content is produced daily through variety of electronic devices, however, storing and transmitting video signals in raw format is impractical due to its excessive resource requirement. Today popular video coding standards such as MPEG-4 and H.264 are used to compress the video signals before storing and transmitting. Accordingly, efficient video coding plays an important role in video communications. While video applications become wide-spread, there is a need for high compression and low complexity video coding algorithms that preserve image quality. Standard organizations ISO, ITO, VCEG of ITU-T, and collaboration of many companies have developed video coding standards in the past to meet video coding requirements of the day. The Advanced Video Coding (AVC/H.264) standard is the most widely used video coding method. AVC is commonly known to be one of the major standards used in Blue Ray devices for video compression. It is also widely used by video streaming services, TV broadcasting, and video conferencing applications. Currently the most important development in this area is the introduction of H.265/HEVC standard which has been finalized in January 2013. The aim of standardization is to produce video compression specification that is capable of compression twice as effective as H.264/AVC standard in terms of coding complexity and quality. There is a wide range of platforms that receive digital video. TVs, personal computers, mobile phones, and tablets each have different computational, display, and connectivity capabilities, thus video has to be converted to meet the specifications of target platform. This conversion is achieved through video transcoding. For transcoding, straightforward solution is to decode the compressed video signal and re-encode it to the target compression format, but this process is computationally complex. Particularly in real-time applications, there is a need to exploit the information that is already available through the compressed video bit-stream to speed-up the conversion. The objective of this thesis is to investigate efficient transcoding methods for HEVC. Using decode/re-encode as the performance reference, methods for advanced transcoding will be investigated. / 0760609667 Bäckgårdsvägen 49, 14341 Stockholm

Video compression uses encoding to reduce the number of bits that are used forrepresenting a video file in order to store and transmit it at a smaller size. Adecoder reconstructs the received data into a representation of the original video.Video coding standards determines how the video compression should beconducted and one of the latest standards is High Efficiency Video Coding (HEVC).One technique that can be used in the encoder is variance adaptive quantizationwhich improves the subjective quality in videos. The technique assigns lowerquantization parameter values to parts of the frame with low variance to increasequality, and vice versa. Another part of the encoder is the sample adaptive offsetfilter, which reduces pixel errors caused by the compression. In this project, thevariance adaptive quantization technique is implemented in the Ericsson researchHEVC encoder c65. Its functionality is verified by subjective evaluation. It isinvestigated if the sample adaptive offset can exploit the adjusted quantizationparameters values when reducing pixel errors to improve compression efficiency. Amodel for this purpose is developed and implemented in c65. Data indicates thatthe model can increase the error reduction in the sample adaptive offset. However,the difference in performance of the model compared to a reference encoder is notsignificant.

Dispositifs photovoltaïques d'aujourd'hui convertissent l'énergie solaire en électricité de manière propre, renouvelable et inépuisable et représentent un remplacement possible pour les combustibles fossiles. Toutefois, afin de rivaliser avec les sources d'énergie classiques une augmentation significative de l'efficacité de conversion est inévitable. Dans ce travail, nous nous concentrons sur des aspects pouvant propulser le rendement de conversion au-dessus des limites de cellules présentes. La première partie de l'étude est consacrée à de nouvelles idées théoriques considérés comme le photovoltaïque de 3ème génération, alors que le plus d'intérêt est maintenu à étudier les avantages possibles de la multiplication d'électrons faible seuil. Dans la deuxième partie de l'étude, nous développons un modèle qui permet un traitement précis des propriétés optiques et de transport des structures de silicium avec des interfaces enterrées. Les analyses théoriques et expérimentales approfondies des structures existantes MIND sont ensuite effectuées. En étudiant le flux exacte et la distribution d'énergie à l'intérieur de plusieurs structures dans le cadre de leur géométrie, nous estimons les rendements quantiques possibles et les comparer avec les résultats expérimentaux. Grâce aux moyens de simulations numériques couplées avec caractérisation expérimentale, nous extrayons l'efficacité de la collecte de porteur de cellules étudiées. De nouveaux effets sont observés, une telle augmentation possible de l'efficacité de la collecte au-dessus de l'unité. Une analyse plus approfondie des résultats expérimentaux couplés avec l'étude numérique suit quelques explications classiques et non classiques de l'augmentation de l'efficacité de la collecte ou l'augmentation résultante de l'efficacité quantique. Avec la plupart des explications classiques exclu, nous concluons que l'explication la plus probable, mais non définitive de cet effet peut être interprété comme le résultat d'une multiplication des porteurs faible seuil. / Photovoltaic devices of today convert solar energy into electricity in a clean, renewable and inexhaustible way and represent a possible replacement for the fossil fuels. However, in order to compete with classical energy sources a significant increase in the conversion efficiency is inevitable. In this work, we concentrate on the aspects able to raise the conversion efficiency above the limitations of present cells. The first part of the study is devoted to new theoretical ideas considered as 3rd generation photovoltaics, while the most interest is kept at studying the possible benefits of electron multiplication at low-energies. In the second part of the study, we develop a model that allows a precise treatment of optical and transport properties of silicon structures with buried interfaces. Extensive theoretical and experimental analyses of existing MIND structures are then conducted. By studying the exact flux and power distribution inside several structures in conjunction with their geometry, we estimate the possible quantum efficiencies and compare them with experimental results. Through the means of numerical simulations coupled with experimental characterization, we extract the carrier collection efficiency of studied cells. New effects are being observed, such a possible increase in collection efficiency above unity. A deeper analysis of the experimental results coupled with the numerical study analyzes several classical and non-classical explanations of the increase in collection efficiency or the resulting increase in the quantum efficiency. With most of the classical explanations ruled out, we conclude that the most probable, but not definitiveexplanation of this effect can be interpreted as the result of a low-energy carrier multiplication.

Le travail présenté porte sur la définition et le développement d’un circuit magnétique pour moteurs à haut rendement de faible et moyenne puissances. Il est réalisé avec des tôles à Grains Orientés (GO) non-segmentées. Des expérimentations réalisées en champ unidirectionnel, destinées à comparer les caractéristiques globales de la structure GO à celles obtenues sur un assemblage classique composé de tôles à grains Non-Orientés (NO), permettent de conclure quant à l’efficacité de l’association proposée en termes de pertes fer. Des investigations au niveau local, accompagnées d’une modélisation numérique, conduisent à une analyse de la répartition interne du flux magnétique dans la structure, permettant de l’optimiser. Cette technique d’assemblage est ensuite testée en champ tournant sur des moteurs statiques. Les performances obtenues, sont de nouveau comparées à celles relevées sur une maquette NO. L’étape finale consiste à tester le principe développé sur des moteurs à induction réalisés avec la configuration GO. Diverses caractéristiques sont relevées ou estimées (norme CEI) et comparées à celles de la machine NO d’origine. L’efficacité de la structure GOse traduit par une réduction notable des pertes fer, notamment statiques, conduisant à accroître sensiblement le rendement global de la machine. / The work presented is focused on the design and development of a magnetic circuit for high efficiency motors of medium and small powers. It is built with non-segmented laminations of Grain Oriented (GO) steel. Experimentations on magnetic circuits excited under unidirectional magnetic field are performed. Such tests aim the comparison of the GO structure global characteristics with those of a classic one composed of Non-Oriented (NO) steel, allowing seeing the superiority of the GO structure in terms of iron losses. Local experimentations, followed by a numerical model, allow the analysis of the local distribution of the magnetic flux within the structure, leading to its optimisation. Such technique of assembly is then tested under rotational magnetic field. In that context, several experimentations are performed and its performance is compared with the one of a NO prototype. The final stage consists in testing the developed structure in induction motors built withthis GO assembly. Several characteristics are measured or estimated (IEC standard) and compared with those obtained on the initial NO motor. The GO structure efficiency leads to a remarkable reduction of the static losses, allowing the increase of the global efficiency of the motor.

Esta dissertação de mestrado propõe um algoritmo adaptativo que é capaz de dinamicamente definir partições tile para quadros intra- e inter-preditos com o objetivo de reduzir o impacto na eficiência de codificação. Tiles são novas ferramentas orientadas ao paralelismo que integram o padrão de codificação de vídeos de alta eficiência (HEVC – High Efficiency Video Coding standard), as quais dividem o quadro em regiões retangulares independentes que podem ser processadas paralelamente. Para viabilizar o paralelismo, os tiles quebram as dependências de codificação através de suas bordas, gerando impactos na eficiência de codificação. Este impacto pode ser ainda maior caso os limites dos tiles dividam regiões altamente correlacionadas do quadro, porque a maior parte das ferramentas de codificação usam informações de contexto durante o processo de codificação. Assim, o algoritmo proposto agrupa as regiões do quadro que são altamente correlacionadas dentro de um mesmo tile para reduzir o impacto na eficiência de codificação que é inerente ao uso de tiles. Para localizar as regiões altamente correlacionadas do quadro de uma maneira inteligente, as características da imagem e também as informações de codificação são analisadas, gerando mapas de particionamento que servem como parâmetro de entrada para o algoritmo. Baseado nesses mapas, o algoritmo localiza as quebras naturais de contexto presentes nos quadros do vídeo e define os limites dos tiles nessas regiões. Dessa maneira, as quebras de dependência causadas pelas bordas dos tiles coincidem com as quebras de contexto naturais do quadro, minimizando as perdas na eficiência de codificação causadas pelo uso dos tiles. O algoritmo proposto é capaz de reduzir mais de 0.4% e mais de 0.5% o impacto na eficiência de codificação causado pelos tiles em quadros intra-preditos e inter-preditos, respectivamente, quando comparado com tiles uniformes. / This Master Thesis proposes an adaptive algorithm that is able to dynamically choose suitable tile partitions for intra- and inter-predicted frames in order to reduce the impact on coding efficiency arising from such partitioning. Tiles are novel parallelismoriented tools that integrate the High Efficiency Video Coding (HEVC) standard, which divide the frame into independent rectangular regions that can be processed in parallel. To enable the parallelism, tiles break the coding dependencies across their boundaries leading to coding efficiency impacts. These impacts can be even higher if tile boundaries split highly correlated picture regions, because most of the coding tools use context information during the encoding process. Hence, the proposed algorithm clusters the highly correlated picture regions inside the same tile to reduce the inherent coding efficiency impact of using tiles. To wisely locate the highly correlated picture regions, image characteristics and encoding information are analyzed, generating partitioning maps that serve as the algorithm input. Based on these maps, the algorithm locates the natural context break of the picture and defines the tile boundaries on these key regions. This way, the dependency breaks caused by the tile boundaries match the natural context breaks of a picture, then minimizing the coding efficiency losses caused by the use of tiles. The proposed adaptive tiling algorithm, in some cases, provides over 0.4% and over 0.5% of BD-rate savings for intra- and inter-predicted frames respectively, when compared to uniform-spaced tiles, an approach which does not consider the picture context to define the tile partitions.

Les convertisseurs de puissance sont de plus en plus utilisés, notamment avec l’explosion des objets nomades/connectés, certes de faibles puissance (<100 W), mais où les contraintes de volume, d’épaisseur ou de rendement sont forte. Dans ce contexte, l’utilisation des matériaux piézoélectriques constitue une excellente alternative aux convertisseurs à base d’inductances. Ces matériaux possèdent en effet de nombreux avantages comme des densités de puissances élevées, une géométrie fine et plane et sont notamment plus faciles à intégrer comparé aux inductances magnétiques classiquement utilisées. Un nouveau type de convertisseurs piézoélectrique, sans inductance, est présenté dans lequel le résonateur piézoélectrique assure une fonction de stockage d’énergie. À chaque période de résonance, le résonateur piézoélectrique prélève de l’énergie à la source d’entrée, la stocke provisoirement sous forme mécanique et la redistribue à la charge permettant ainsi la conversion de puissance. Des commutations à zéros de tension sont également garanties pour assurer des rendements élevées à fréquences élevées. Une première topologie (chapitre 2 et 3) intégrant ces principes est présentée. Un modèle analytique incluant les pertes mécaniques décrivant le comportement du convertisseur ainsi qu’un modèle de simulation sont élaborés. Le concept est validé expérimentalement et l’on obtient des rendements très élevés (jusqu’à 98%) sur une grande plage de puissance (de quelques mW à 1,8 W) pour plusieurs gains en tension (1,5 à 3). L’étude de cinq résonateurs de dimensions différentes renseigne sur l’influence de la géométrie sur les performances des convertisseurs et permet de concevoir une méthodologie de dimensionnement de ce résonateur. D’autres topologies plus complexes (chapitre 4) sont explorées et des perspectives d’améliorations et de mises sur le marché sont présentées. / The increasing demand for power convertors in various application fields implies specific constraints and specific technological solutions. In this context, working with piezoelectric material constitutes an excellent alternative of classical inductor-based converter. Indeed, these materials enable a high-power density, thin and planar geometry and can be integrated on silicon more easily than popular wire-wound magnetic components. A new kind of piezoelectric inductorless converter, in which the piezoelectric material acts as an energy storage element, is presented. At each resonant period, the piezoelectric resonator takes energy from the input source, stores it temporarily and releases it to the load (and therefore enabling the power conversion). Soft switching is assured to maintain very high efficiencies for high frequencies. A first topology (chapter 2 and 3) in which those principles are applied is introduced. An analytical model which integrates the mechanical losses and a simulation model are developed enabling a good understanding of the converter behavior. The concept is experimentally validated and very high efficiency conversions (up to 98 %) are achieved for a large range of output power (from mW to 1.8 W) and for different output gains. The study of five different-size piezoelectric resonators enables to understand the impact of geometric parameters of the resonator on the converter performances and therefore to propose a resonator design methodology. More complex topologies are also described (chapter 4) and a discussion on improvement possibilities and perspectives to have a complete and industrialized converter concludes the thesis.

京都大学 / 0048 / 新制・課程博士 / 博士(工学) / 甲第21108号 / 工博第4472号 / 新制||工||1695(附属図書館) / 京都大学大学院工学研究科電気工学専攻 / (主査)教授 篠原 真毅, 教授 山川 宏, 教授 木本 恒暢 / 学位規則第4条第1項該当 / Doctor of Philosophy (Engineering) / Kyoto University / DFAM