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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
11

True linearized intensity modulation for photonic analog to digital conversion using an injection-locked mode-locked laser

Sarailou, Edris 01 January 2015 (has links)
A true linearized interferometric intensity modulator for pulsed light has been proposed and experimentally presented in this thesis. This has been achieved by introducing a mode-locked laser into one of the arms of a Mach-Zehnder interferometer and injection-locking it to the input light (which is pulsed and periodic). By modulating the injection-locked laser, and combining its output light with the light from the other arm of interferometer in quadrature, one can achieve true linearized intensity modulator. This linearity comes from the arcsine phase response of the injection-locked mode-locked laser (as suggested by steady-state solution of Adler's equation) when it is being modulated. Mode-locked lasers are fabricated using a novel AlGaInAs-InP material system. By using the BCB for planarization and minimizing the metal pad size and directly modulating the laser, we have achieved very effective fundamental hybrid mode-locking at the repetition rate of ~ 23 GHz. This laser also provided the short pulses of 860 fs and 280 fs timing jitter integrated from 1 Hz- 100 MHz. The linearized intensity modulator has been built by using two identical two-section mode-locked lasers with the same length, one as the slave laser in one of the arms of the Mach-Zehnder interferometer injection-locked to the other one as the master which is the input light to the modulator. A low V? of 8.5 mV is achieved from this modulator. Also the current of the gain section or the voltage of the saturable absorber section of the slave laser has been used to apply the modulation signal. A spur free dynamic range of 70 dB.Hz2/3 is achieved when modulating the modulator through the saturable absorber. Modulating the saturable absorber provides a reduced third-order intermodulation tone with respect to modulating the gain. This is simply because of the unwanted amplitude modulation created when modulating the gain section current. Finally an improved design is proposed and demonstrated to improve the modulator performance. This is achieved by introducing a third section to the laser. Using the impurity free vacancy disordering technique the photoluminescence peak of this section is blue-shifted selectively and therefore there would not be any absorption in that passive section. By applying the modulation signal to this passive section rather than applying it to the gain section or saturable absorber section, the amplitude and phase modulation could be decoupled. The experimental results have presented here and an almost six-fold reduction in V? and 5 dB improvement in spur free dynamic range have been achieved. The proposed and demonstrated configuration as an analog optical link has the potential to increase the performance and resolution of photonic analog-to-digital converters.
12

Injection-locked Semiconductor Lasers For Realization Of Novel Rf Photonics Components

Hoghooghi, Nazanin 01 January 2012 (has links)
This dissertation details the work has been done on a novel resonant cavity linear interferometric modulator and a direct phase detector with channel filtering capability using injection-locked semiconductor lasers for applications in RF photonics. First, examples of optical systems whose performance can be greatly enhanced by using a linear intensity modulator are presented and existing linearized modulator designs are reviewed. The novel linear interferometric optical intensity modulator based on an injection-locked laser as an arcsine phase modulator is introduced and followed by numerical simulations of the phase and amplitude response of an injection-locked semiconductor laser. The numerical model is then extended to study the effects of the injection ratio, nonlinear cavity response, depth of phase and amplitude modulation on the spur-free dynamic range of a semiconductor resonant cavity linear modulator. Experimental results of the performance of the linear modulator implemented with a multi-mode Fabry-Perot semiconductor laser as the resonant cavity are shown and compared with the theoretical model. The modulator performance using a vertical cavity surface emitting laser as the resonant cavity is investigated as well. Very low Vπ in the order of 1 mV, multi-gigahertz bandwidth (-10 dB bandwidth of 5 GHz) and a spur-free dynamic range of 120 dB.Hz2/3 were measured directly after the modulator. The performance of the modulator in an analog link is experimentally investigated and the results show no degradation of the modulator linearity after a 1 km of SMF. The focus of the work then shifts to applications of an injection-locked semiconductor laser as a direct phase detector and channel filter. This phase detection technique does not iv require a local oscillator. Experimental results showing the detection and channel filtering capability of an injection-locked semiconductor diode laser in a three channel system are shown. The detected electrical signal has a signal-to-noise ratio better than 60 dB/Hz. In chapter 4, the phase noise added by an injection-locked vertical cavity surface emitting laser is studied using a self-heterodyne technique. The results show the dependency of the added phase noise on the injection ratio and detuning frequency. The final chapter outlines the future works on the linear interferometric intensity modulator including integration of the modulator on a semiconductor chip and the design of the modulator for input pulsed light.
13

Injection-Locked Fabry-Perot Laser Diode In Wavelength Division Multiplexing Passive Optical Network

Yan, Yudan 07 1900 (has links)
The bandwidth demanding in the access network has been increasing rapidly over the past several years. The predominant broadband access network solutions deployed today are digital subscriber line (DSL) and community antenna television (CATV) (cable TV) based networks. However, the passive optical network (PON) which is a point to multipoint access network based on optical fibers provides much higher bandwidth compared to current access networks based on copper lines. Incorporating wavelength division multiplexing (WDM) in a PON allows a much higher bandwidth compared to the standard PON which operates in the single wavelength mode where the one wavelength is used for upstream transmission and another different wavelength is used for downstream transmission. Moreover, WDM-PON offers the advantages in terms of capacity, low latency and service transparency. In the past five years WDM-PON technology has been developed to a mature for commercial consideration. In this thesis, we start from some fundamentals about WDM-PON and the technology challenge for WDM-PON which is to avoid the need for expensive wavelength selective optical components in the end-user optical network unit (ONU). Then we investigate Injection Locked Fabry-Perot Laser Diode with narrow band amplified spontaneous emission (ASE) noise as an approach to be a wavelength independent ONU. We study its theoretical model and compare the experimental results with the simulation results based on the theoretical model. / Thesis / Candidate in Philosophy
14

Frequency Locking Techniques Based on Envelope Detection for Injection-Locked Signal Sources

Shin, Dongseok 21 July 2017 (has links)
Signal generation at high frequency has become increasingly important in numerous wireline and wireless applications. In many gigahertz and millimeter-wave frequency ranges, conventional frequency generation techniques have encountered several design challenges in terms of frequency tuning range, phase noise, and power consumption. Recently, injection locking has been a popular technique to solve these design challenges for frequency generation. However, the narrow locking range of the injection locking techniques limits their use. Furthermore, they suffer from significant reference spur issues. This dissertation presents novel frequency generation techniques based on envelope detection for low-phase-noise signal generation using injection-locked frequency multipliers (ILFMs). Several calibration techniques using envelope detection are introduced to solve conventional problems in injection locking. The proposed topologies are demonstrated with 0.13um CMOS technology for the following injection-locked frequency generators. First, a mixed-mode injection-frequency locked loop (IFLL) is presented for calibrating locking range and phase noise of an injection-locked oscillator (ILO). The IFLL autonomously tracks the injection frequency by processing the AM modulated envelope signal bearing a frequency difference between injection frequency and ILO free-running frequency in digital feedback. Second, a quadrature injection-locked frequency tripler using third-harmonic phase shifters is proposed. Two capacitively-degenerated differential pairs are utilized for quadrature injection signals, thereby increasing injection-locking range and reducing phase error. Next, an injection-locked clock multiplier using an envelope-based frequency tracking loop is presented for a low phase noise signal and low reference spur. In the proposed technique, an envelope detector constantly monitors the VCO's output waveform distortion caused by frequency difference between the VCO frequency and reference frequency. Therefore, the proposed techniques can compensate for frequency variation of the VCO due to PVT variations. Finally, this dissertation presents a subharmonically injection-locked PLL (SILPLL), which is cascaded with a quadrature ILO. The proposed SILPLL adopts an envelope-detection based injection-timing calibration for synchronous reference pulse injection into a VCO. With one of the largest frequency division ratios (N=80) reported so far, the SILPLL can achieve low RMS jitter and reference spur. / Ph. D.
15

Ηλεκτρονικές διατάξεις υψηλών συχνοτήτων για ασύρματα συστήματα ευρείας ζώνης

Πλέσσας, Φώτιος 12 February 2009 (has links)
Στη διατριβή αυτή προτείνονται, αναλύονται και υλοποιούνται εναλλακτικές τοπολογίες για δυο από τα κύρια υποσυστήματα ενός πομποδέκτη, τον τοπικό ταλαντωτή και τον ενισχυτή χαμηλού θορύβου. Το κύριο σύστημα που εξετάζεται είναι αυτό του τοπικού ταλαντωτή, όπου μελετούνται και υλοποιούνται τοπολογίες ταλαντωτών και βρόχων που λειτουργούν υπό εμβολή, με κύριο προσανατολισμό την ελαχιστοποίηση του θορύβου φάσης. Ο προτεινόμενος βρόχος εμβολής προσφέρει την δυνατότητα χρησιμοποίησής του σε multiband συστήματα με ταυτόχρονη μάλιστα λειτουργία στις ζώνες των 2.4 GHz και 5.2 GHz για την περίπτωση των ασύρματων τοπικών δικτύων. Ένας τέτοιος βρόχος μπορεί να συμβάλει καθοριστικά στην ελαχιστοποίηση του μεγέθους και της κατανάλωσης του συνολικού multiband συστήματος. Προτείνεται και υλοποιείται ένας ταλαντωτής εμβολής (injection-locked oscillator) και διερευνάται η δυνατότητά του να λειτουργεί παράλληλα και ως μίκτης δίνοντας ένα κύκλωμα πολλαπλών λειτουργιών και εφαρμογών. Το κύκλωμα αυτό ανάλογα με τα σήματα που εμφανίζονται στην είσοδό του λειτουργεί ως απλός ταλαντωτής, ως ταλαντωτής εμβολής, ή ως ίδιο-ταλαντούμενος μίκτης. Προτείνεται και υλοποιείται βρόχος εμβολής (injection-locked phase-locked loop, ILPLL) και μελετάται η βελτίωση στον θόρυβο φάσης και την περιοχή κλειδώματος. Στα πλαίσια των ILPLL μελετώνται και υλοποιούνται βρόχοι εμβολής στην θεμελιώδη συχνότητα και βρόχοι υπό-αρμονικής (sub-harmonic) εμβολής (s-ILPLL). Ο βρόχος υπό-αρμονικής εμβολής χρησιμοποιεί σήμα εμβολής στα 2.5 GHz και παράγει συχνότητα εξόδου 5 GHz. Στα πλαίσια της διερεύνησης του θορύβου φάσης σε συστήματα τοπικών ταλαντωτών μελετάται η διάταξη του συνθέτη διπλού βρόχου και αναπτύσσεται μία πρωτότυπη τοπολογία με καλύτερα χαρακτηριστικά στον θόρυβο φάσης σε σύγκριση με τις κλασικές αρχιτεκτονικές διπλού βρόχου. Σε όλες τις παραπάνω διατάξεις, παρουσιάζονται, η μαθηματική ανάλυση για τον θόρυβο φάσης και τα αποτελέσματα των θεωρητικών υπολογισμών. Η ορθότητα των προτάσεων και η λειτουργία των προτεινόμενων διατάξεων επαληθεύεται με μετρήσεις των πειραματικών πρωτοτύπων. Τέλος, στα πλαίσια της διατριβής προτείνεται ένας ενισχυτής χαμηλού θορύβου που περιλαμβάνει κύκλωμα ελέγχου του κέρδους, το οποίο δίνει την δυνατότητα στο σύστημα να «επιλέξει» την επιθυμητή ενίσχυση ανάλογα με τις συνθήκες, μειώνοντας έτσι σημαντικά την κατανάλωση σε περιπτώσεις όπου αυτό είναι δυνατό. Περιλαμβάνει επίσης και φίλτρο απόρριψης ειδώλου που ελέγχεται από εξωτερική τάση συντονισμού. / In this dissertation we propose, study and develop alternative topologies for two of the most important blocks of a Front-End, the Local Oscillator and the Low Noise Amplifier. We are mainly concerned with the analysis of various local oscillator topologies, studying the phase noise and the injection-locking performance of oscillators and phase-locked loops. The overall performance of the experimental design demonstrates the applicability of the proposed approach to the development of dual-band synthesizers (2.4 GHz and 5.2 GHz), which constitute very important subsystems for modern multiband/multistandard transceivers in WLAN applications. We propose and develop an injection locked oscillator (ILO) and investigate the ability to operate simultaneously as a mixer resulting in a multifunctional circuit. The proposed circuit topology operates as: a) a free-running oscillator, b) both an injection-locked oscillator and a subharmonic injection-locked oscillator (s-ILO), c) both a self-oscillating mixer and a harmonic self-oscillating mixer (h-SOM), and d) a subharmonic injection-locked self-oscillating mixer (s-ILSOM). We propose and develop a different approach for ILPLL design at 5 GHz by applying a technique used in optical communications. We newly address the phase-noise analysis using the loop linear model and compare the results with previously reported work. Furthermore, we address the phase noise improvement of subharmonic ILPLLs, especially for the 5-GHz band. Theoretical analysis and computer calculations demonstrate an improved performance for phase noise and power consumption. We present the analysis and experimental evaluation of a modified dual-loop phase locked loop synthesizer, using the phase noise transfer functions resulting from the linear model of the synthesizer. The different arrangement in the high frequency loop, in contrast to previous reported series-connected dual-loop topologies, offers various advantages, such as improved phase noise, finer resolution and lower spurious levels. Discrete elements are used to implement a prototype system for testing. This adds to the flexibility of the design and allows for experimental optimisation of the loop trade-offs. The synthesizer generates signals in the 4850 MHz to 5050 MHz range with a 10 MHz resolution and can match the specifications for wireless LANs operating at 5 GHz. The design resulted in a prototype with very good characteristics suitable for future integration. For all the proposed topologies we present the mathematical analysis and calculated results for the phase noise. Measurement results illustrate the validity of the proposed analyses, demonstrate the main characteristics, and confirm the feasibility of the proposed systems. Finally, a bipolar Low Noise Amplifier (LNA) is designed in this thesis. The IC contains the LNA core, an externally programmed bias network and an image rejection filter. The externally programmed bias network allows the user to select the bias current in an adaptive manner, depending upon the requirements of the individual system. (Low NF, high gain, low consumption etc). Furthermore, the chip can be powered down by sending an appropriate bit stream to the bias network.
16

Integrated Optoelectronic Devices and System Limitations for WDM Passive Optical Networks

Taebi Harandi, Sareh January 2012 (has links)
This thesis puts focus on the technological challenges for Wavelength Division Multiplexed Passive Optical Network (WDM-PON) implementation, and presents novel semiconductor optical devices for deployment at the optical network unit (ONU). The first-ever reported L-band Reflective semiconductor optical amplifier (RSOA) is presented based on InP-base material. A theoretical model is developed to estimate the optical gain and the saturation power of this device compared to a conventional SOA. Experiments on this device design show long-range telecom wavelength operation, with polarization-independent gain of greater than 20 dB, and low saturation output power of 0 dBm suitable for PON applications. Next, the effect of the amplified spontaneous emission noise of RSOA devices on WDM-PON system is investigated. It is shown through theoretical modeling and simulations that the RSOA noise combined with receiver noise statistics increase probability of error, and induce considerable power penalties to the WDM-PON system. By improving the coupling efficiencies, and by distributing more current flow to the input of these devices, steps can be taken to improve device noise characteristics. Further, in spectrally-spliced WDM-PONs deploying RSOAs, the effect of AWG filter shape on system performance is investigated. Simulation modeling and experiments show that deployment of Flat-band AWGs is critical for reducing the probability of error caused by AWG spectral shape filtering. Flat-band athermal AWGs in comparison to Gaussin-shape counterparts satisfy the maximum acceptable error probability requirements, and reduce the power penalty associated with filtering effect. In addition, detuning between two AWG center wavelengths impose further power penalties to the WDM-PON system. In the last section of this thesis, motivated by RSOA device system limitations, a novel injection-locked Fabry-Perot (IL-FP) device is presented which consists of a gain section monolithically integrated with a phase section. The gain section provides locking of one FP mode to a seed source wavelength, while the phase modulator allows for adjusting the wavelength of the internal modes by tuning bias current to maintain mode-locking. This device counters any mode drifts caused by temperature variations, and allows for cooler-less operation over a wide range of currents. The devices and the performance metrics subsequently allow for a hybrid integration platform on a silicon substrate and integrate many functionalities like reflective modulator with thin film dielectric filter and receiver on a single chip for deployment at the user-end of future-proof low cost WDM-PONs.
17

Integrated Optoelectronic Devices and System Limitations for WDM Passive Optical Networks

Taebi Harandi, Sareh January 2012 (has links)
This thesis puts focus on the technological challenges for Wavelength Division Multiplexed Passive Optical Network (WDM-PON) implementation, and presents novel semiconductor optical devices for deployment at the optical network unit (ONU). The first-ever reported L-band Reflective semiconductor optical amplifier (RSOA) is presented based on InP-base material. A theoretical model is developed to estimate the optical gain and the saturation power of this device compared to a conventional SOA. Experiments on this device design show long-range telecom wavelength operation, with polarization-independent gain of greater than 20 dB, and low saturation output power of 0 dBm suitable for PON applications. Next, the effect of the amplified spontaneous emission noise of RSOA devices on WDM-PON system is investigated. It is shown through theoretical modeling and simulations that the RSOA noise combined with receiver noise statistics increase probability of error, and induce considerable power penalties to the WDM-PON system. By improving the coupling efficiencies, and by distributing more current flow to the input of these devices, steps can be taken to improve device noise characteristics. Further, in spectrally-spliced WDM-PONs deploying RSOAs, the effect of AWG filter shape on system performance is investigated. Simulation modeling and experiments show that deployment of Flat-band AWGs is critical for reducing the probability of error caused by AWG spectral shape filtering. Flat-band athermal AWGs in comparison to Gaussin-shape counterparts satisfy the maximum acceptable error probability requirements, and reduce the power penalty associated with filtering effect. In addition, detuning between two AWG center wavelengths impose further power penalties to the WDM-PON system. In the last section of this thesis, motivated by RSOA device system limitations, a novel injection-locked Fabry-Perot (IL-FP) device is presented which consists of a gain section monolithically integrated with a phase section. The gain section provides locking of one FP mode to a seed source wavelength, while the phase modulator allows for adjusting the wavelength of the internal modes by tuning bias current to maintain mode-locking. This device counters any mode drifts caused by temperature variations, and allows for cooler-less operation over a wide range of currents. The devices and the performance metrics subsequently allow for a hybrid integration platform on a silicon substrate and integrate many functionalities like reflective modulator with thin film dielectric filter and receiver on a single chip for deployment at the user-end of future-proof low cost WDM-PONs.
18

Návrh injekcí zavěšeného kruhového oscilátoru pro aplikaci v systémech LIDAR přímo měřících čas průletu / Injection locked ring oscillator design for application in Direct Time of Flight LIDAR

Fránek, Jakub January 2021 (has links)
Diplomová práce přibližuje systémy LIDAR přímo měřící čas průletu a časově digitální převodníky určené k použití v těchto systémech. Představuje problematiku distribuce hodinových signálů napříč soubory časově digitálních převodníků v LIDAR systémech a věnuje se jednomu z nových řešení této problematiky, které je založené na injekcí zavěšených oscilátorech. Technika injekčního zavěšení oscilátorů je důkladně matematicky popsána. V programu Matlab byl vytvořen simulační model injekcí zavěšeného kruhového oscilátoru, který potvrzuje správnost uvedených analytických predikcí. Ve výrobní technologii ONK65 byl navržen injekcí zavěšený kruhový oscilátor stabilizovaný pomocí smyčky závěsu zpoždění, určený pro implementaci časově digitálního převodníku pro systém LIDAR. Navržený injekcí zavěšený kruhový oscilátor byl verifikován počítačovými simulacemi zohledňujícími vliv procesních, napěťových i teplotních variací. Oscilátor poskytuje specifikované časové rozlišení 50 pikosekund a dosahuje dvakrát nižší hodnoty fázového neklidu než ekvivalentní volnoběžný oscilátor v dané technologii.
19

Modélisation, conception et intégration de nouvelles architectures différentielles pour des capteurs M/NEMS résonants / Modelling, design and integration of new differential architectures for M/NEMS resonant sensors

Prache, Pierre 09 November 2017 (has links)
Les capteurs M/NEMS résonants, grâce à leur petite taille, faible consommation, et caractère quasi-numérique (leur grandeur de sortie est une fréquence la plupart du temps), sont des outils incontournables dans les systèmes embarqués modernes, des objets connectés simples à l’industrie aérospatiale et militaire.Cependant, ils sont soumis aux dérives environnementales, et malgré la possibilité d’en diminuer l’effet par différentes techniques de conception, parfois l’association de deux capteurs en mode différentiel est nécessaire pour assurer la fiabilité de l’information en environnement difficiles. Dans cette thèse, une technique particulière de mesure différentielle est étudiée, qui consiste à synchroniser deux résonateurs, dont l’un est une référence et l’autre soumis à la grandeur physique à mesurer. Placés dans une seule boucle de rétroaction, les deux résonateurs oscillent à la même fréquence, et un désaccord entre les deux, issu de la grandeurphysique à mesurer entraine un déphasage. La mesure de ce déphasage est un moyen simple de remonter à l’information à mesurer, théoriquement insensible aux variations environnementales identiquement appliquées aux deux résonateurs. Cette technique bénéficie est également peu complexe au niveau de son implémentation, donc adapté à l’intégration à grande échelle. Après avoir étudié le cadre théorique de la synchronisation de résonateurs par verrouillage par injection, on dégage des contraintes d’implémentation, qui servent de ligne directrice dans la fabrication d’un démonstrateur. On dégage également des performances théoriques, qui sont comparées aux performances du démonstrateur. / M/NEMS resonant sensors, due to their small size, consumption and quasi-digital output (a frequency most of the time) are unavoidable tools for on-board systems, from smartphones to aeronautic technology. However, they suffer from environmental drifts, and even though the effect of these drifts can be limited by the design, it is sometimes necessary to use differential architectures to properly remove the drifts from the measurements and ensure the output reliability even in harsh environments. In this work, a special technique for differential measurement is studied, consisting in the synchronization of two resonators, one reference and one sensor. Placed in a single feedback loop, they oscillate at the same frequency and eventual phase shift when the physical quantity to be sensed is applied. This phase shift is a theoretically drift-free way to measure this physical quantity. This technique also benefits from its ease of integration, making it a good candidate for large scale integration. After studying the theoretical framework, several design guidelines are found, which are used in the fabrication of a proof of concept. The theoretical performances are found as well, and compared to the experimental ones.
20

A 26 GHz Phase-Locked Loop Frequency Multiplier in 0.18-um CMOS

Carr, John 25 April 2009 (has links)
This thesis presents the analysis, design and characterization of an integrated high-frequency phase-locked loop (PLL) frequency multiplier. The frequency multiplier is novel in its use of a low multiplication factor of 4 and a fully differential topology for rejection of common mode interference signals. The PLL is composed of a voltage controlled oscillator (VCO), injection-locked frequency divider (ILFD) for the first divide-by-two stage, a static master-slave flip-flop (MSFF) divider for the second divide-by-two stage and a Gilbert cell mixer phase detector (PD). The circuit has been fabricated using a standard CMOS 0.18-um process based on its relatively low cost and ready availability. The PLL frequency multiplier generates an output signal at 26 GHz and is the highest operational frequency PLL in the technology node reported to date. Time domain phase plane analysis is used for prediction of PLL locking range based on initial conditions of phase and frequency offsets. Tracking range of the PLL is limited by the inherent narrow locking range of the ILFD, and is confirmed via experimental results. The performance benefits of the fully differential PLL are experimentally confirmed by the injection of differential- and common-mode interfering signals at the VCO control lines. A comparison of the common- and differential-mode modulation indices reveals that a common mode rejection ratio (CMRR) of greater than 20 dB is possible for carrier offset frequencies of less than 1 MHz. Closed-loop frequency domain transfer functions are used for prediction of the PLL phase noise response, with the PLL being dominated by the reference and VCO phase noise contributions. Regions of dominant phase noise contributions are presented and correlated to the overall PLL phase noise performance. Experimental verifications display good agreement and confirm the usefulness of the techniques for PLL performance prediction. The PLL clock multiplier has an operational output frequency of 26.204 to 26.796 GHz and a maximum output frequency step of 16 MHz. Measured phase noise at 1 MHz offset from the carrier is -103.9 dBc/Hz. The PLL clock multiplier core circuit (VCO/ILFD/MSFF Divider/PD) consumes 186 mW of combined power from 2.8 and 4.3 V DC rails. / Thesis (Ph.D, Electrical & Computer Engineering) -- Queen's University, 2009-04-24 11:31:35.384

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