• Refine Query
  • Source
  • Publication year
  • to
  • Language
  • 1
  • Tagged with
  • 81
  • 81
  • 49
  • 49
  • 47
  • 47
  • 40
  • 32
  • 29
  • 21
  • 21
  • 19
  • 18
  • 17
  • 17
  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
71

Electronic and Magnetic Properties of Two-dimensional Nanomaterials beyond Graphene and Their Gas Sensing Applications: Silicene, Germanene, and Boron Carbide

Mehdi Aghaei, Sadegh 28 June 2017 (has links)
The popularity of graphene owing to its unique properties has triggered huge interest in other two-dimensional (2D) nanomaterials. Among them, silicene shows considerable promise for electronic devices due to the expected compatibility with silicon electronics. However, the high-end potential application of silicene in electronic devices is limited owing to the lack of an energy band gap. Hence, the principal objective of this research is to tune the electronic and magnetic properties of silicene related nanomaterials through first-principles models. I first explored the impact of edge functionalization and doping on the stabilities, electronic, and magnetic properties of silicene nanoribbons (SiNRs) and revealed that the modified structures indicate remarkable spin gapless semiconductor and half-metal behaviors. In order to open and tune a band gap in silicene, SiNRs were perforated with periodic nanoholes. It was found that the band gap varies based on the nanoribbon’s width, nanohole’s repeat periodicity, and nanohole’s position due to the quantum confinement effect. To continue to take advantage of quantum confinement, I also studied the electronic and magnetic properties of hydrogenated silicene nanoflakes (SiNFs). It was discovered that half-hydrogenated SiNFs produce a large spin moment that is directly proportional to the square of the flake’s size. Next, I studied the adsorption behavior of various gas molecules on SiNRs. Based on my results, the SiNR could serve as a highly sensitive gas sensor for CO and NH3 detection and a disposable gas sensor for NO, NO2, and SO2. I also considered adsorption behavior of toxic gas molecules on boron carbide (BC3) and found that unlike graphene, BC3 has good sensitivity to the gas molecules due to the presence of active B atoms. My findings divulged the promising potential of BC3 as a highly sensitive molecular sensor for NO and NH3 detection and a catalyst for NO2 dissociation. Finally, I scrutinized the interactions of CO2 with lithium-functionalized germanene. It was discovered that although a single CO2 molecule was weakly physisorbed on pristine germanene, a significant improvement on its adsorption energy was found by utilizing Li-functionalized germanene as the adsorbent. My results suggest that Li-functionalized germanene shows promise for CO2 capture.
72

Development of a Lab-on-a-Chip Device for Rapid Nanotoxicity Assessment In Vitro

Shah, Pratikkumar 11 December 2014 (has links)
Increasing useof nanomaterials in consumer products and biomedical applications creates the possibilities of intentional/unintentional exposure to humans and the environment. Beyond the physiological limit, the nanomaterialexposure to humans can induce toxicity. It is difficult to define toxicity of nanoparticles on humans as it varies by nanomaterialcomposition, size, surface properties and the target organ/cell line. Traditional tests for nanomaterialtoxicity assessment are mostly based on bulk-colorimetric assays. In many studies, nanomaterials have found to interfere with assay-dye to produce false results and usually require several hours or days to collect results. Therefore, there is a clear need for alternative tools that can provide accurate, rapid, and sensitive measure of initial nanomaterialscreening. Recent advancement in single cell studies has suggested discovering cell properties not found earlier in traditional bulk assays. A complex phenomenon, like nanotoxicity, may become clearer when studied at the single cell level, including with small colonies of cells. Advances in lab-on-a-chip techniques have played a significant role in drug discoveries and biosensor applications, however, rarely explored for nanomaterialtoxicity assessment. We presented such cell-integrated chip-based approach that provided quantitative and rapid response of cellhealth, through electrochemical measurements. Moreover, the novel design of the device presented in this study was capable of capturing and analyzing the cells at a single cell and small cell-population level. We examined the change in exocytosis (i.e. neurotransmitterrelease) properties of a single PC12 cell, when exposed to CuOand TiO2 nanoparticles. We found both nanomaterials to interfere with the cell exocytosis function. We also studied the whole-cell response of a single-cell and a small cell-population simultaneously in real-time for the first time. The presented study can be a reference to the future research in the direction of nanotoxicity assessment to develop miniature, simple, and cost-effective tool for fast, quantitative measurements at high throughput level. The designed lab-on-a-chip device and measurement techniques utilized in the present work can be applied for the assessment of othernanoparticles' toxicity, as well.
73

Nanofabrication and Spectroscopy of Magnetic Nanostructures Using a Focused Ion Beam

Hadjikhani, Ali 08 July 2016 (has links)
This research used a focused ion beam in order to fabricate record small nano-magnetic structures, investigate the properties of magnetic materials in the rarely studied range of nanometer size, and exploit their extraordinary characteristics in medicine and nano-electronics. This study consists of two parts: (i) Fabrication and study of record small magnetic tunnel junctions (ii) Introduction of a novel method for detection of magnetoelectric nanoparticles (MENs) in the tissue. A key challenge in further scaling of CMOS devices is being able to perform non-volatile logic with near zero power consumption. Sub-10-nm nanomagnetic spin transfer torque (STT) magnetic tunneling junctions (MTJs) have the potential for a universal memory that can address this key challenge. The main problem is to decrease the switching current density. This research studied these structures in sub-10-nm size range. In this range, spin related excitations consume considerably smaller amounts of energy as compared to the larger scale. This research concluded that as predicted a decrease in switching current superior to that of the linear scaling will happen in this size range. Magneto-electric nanoparticles (MENs) can be used to directly couple intrinsic electric-field-driven processes with external magnetic fields for controlling neural activity deep in the brain. These particles have been proven to be capable of inducing deep brain stimulation non-invasively. Furthermore, these magneto-electric nano-particles can be used for targeted drug delivery and are contenders to replace conventional chemotherapy. The circulatory system can deliver a drug to almost every cell in the body; however, delivering the drug specifically into the tumor cell and then releasing it on demand remains a formidable task. Nanomedicine can accomplish this, but ensuring that the drug is released at an appropriate rate once at the target site is an important task. In order to have a complete understanding of the behavior of these MENs when injected into the body, a comprehensive bio-distribution study was performed. This study introduced a novel spectroscopy method for tracing the nanoparticles in the bloodstream. This study investigated the post injection distribution of the MENs in vital organs throughout a period of two months.
74

Design and Characterization of 15nm FinFET Standard Cell Library

Sadhu, Phanindra Datta 01 June 2021 (has links)
The processors and digital circuits designed today contain billions of transistors on a small piece of silicon. As devices are becoming smaller, slimmer, faster, and more efficient, the transistors also have to keep up with the demands and needs of the daily user. Unfortunately, the CMOS technology has reached its limit and cannot be used to scale down due to the breakdown of the transistor caused by short channel effects. Alternative solution to this is the FinFET transistor technology where the gate of the transistor is a 3D fin which surrounds the transistor and prevents the breakdown caused by scaling and short channel effects. FinFET devices are reported to have excellent control over short channel effects, high On/Off Ratio, extremely low gate leakage current and relative immunization over gate edge line roughness. Sub 20 nm is perceived to the limit of scaling the CMOS transistors but FinFETs can be scaled down further due the above-mentioned reasons. Due to these advantages the VLSI industry have now shifted to FinFET in their designs. Although these transistors have not been completely opened to academia. Analyzing and observing the effects of these devices can be pivotal in gaining an in depth understanding of them. This thesis explores the application of FinFETs using a standard cell library developed using these transistors and are analyzed and compared with CMOS transistors. The FinFET package files used to develop these cell is a 15nm FinFET technology file developed by NCSU in collaboration with Cadence and Mentor Graphics. Post design the cells were characterized and then the results were compared to through various CMOS packages to understand and extrapolate conclusions on the FinFET devices.
75

Design and Characterization of Standard Cell Library Using FinFETs

Sadhu, Phanindra Datta 01 June 2021 (has links) (PDF)
The processors and digital circuits designed today contain billions of transistors on a small piece of silicon. As devices are becoming smaller, slimmer, faster, and more efficient, the transistors also have to keep up with the demands and needs of the daily user. Unfortunately, the CMOS technology has reached its limit and cannot be used to scale down due to the transistor's breakdown caused by short channel effects. An alternative solution to this is the FinFET transistor technology, where the gate of the transistor is a three dimensional fin that surrounds the transistor and prevents the breakdown caused by scaling and short channel effects. FinFET devices are reported to have excellent control over short channel effects, high On/Off Ratio, extremely low gate leakage current and relative immunization over gate edge line roughness. Sub 20 nm node size is perceived to be the limit of scaling the CMOS transistors, but FinFETs can be scaled down further because of its unique design. Due to these advantages, the VLSI industry has now shifted to FinFET in implementation of their designs. However, these transistors have not been completely opened to academia. Analyzing and observing the effects of these devices can be pivotal in gaining an in-depth understanding of them. This thesis explores the implementation of FinFETs using a standard cell library designed using these transistors. The FinFET package file used to design these cells is a 15nm FinFET technology file developed by NCSU in collaboration with Cadence and Mentor Graphics. Post design, the cells were characterized, the results were analyzed and compared with cells designed using CMOS transistors at different node sizes to understand and extrapolate conclusions on FinFET devices.
76

MOS Current Mode Logic (MCML) Analysis for Quiet Digital Circuitry and Creation of a Standard Cell Library for Reducing the Development Time of Mixed Signal Chips

Marusiak, David 01 June 2014 (has links) (PDF)
Many modern digital systems use forms of CMOS logical implementation due to the straight forward design nature of CMOS logic and minimal device area since CMOS uses fewer transistors than other logic families. To achieve high-performance requirements in mixed-signal chip development and quiet, noiseless circuitry, this thesis provides an alternative toCMOSin the form of MOS Current Mode Logic (MCML). MCML dissipates constant current and does not produce noise during value changing in a circuit CMOS circuits do. CMOS logical networks switch during clock ticks and with every device switching, noise is created on the supply and ground to deal with the transitions. Creating a noiseless standard cell library with MCML allows use of circuitry that uses low voltage switching with 1.5V between logic levels in a quiet or mixed-signal environment as opposed to the full rail to rail swinging of CMOS logic. This allows cohesive implementation with analog circuitry on the same chip due to constant current and lower switching ranges not creating rail noise during digital switching. Standard cells allow for the Cadence tools to automatically generate circuits and Cadence serves as the development platform for the MCML standard cells. The theory surrounding MCML is examined along with current and future applications well-suited for MCML are researched and explored with the goal of highlighting valid candidate circuits for MCML. Inverters and NAND gates with varying current drives are developed to meet these specialized goals and are simulated to prove viability for quiet, mixed-signal applications. Analysis and results show that MCML is a superior implementation choice compared toCMOSfor high speed and mixed signal applications due to frequency independent power dissipation and lack of generated noise during operation. Noise results show rail current deviations of 50nA to 300nA during switching over an average operating current of 20µA to 80µA respectively. The multiple order of magnitude difference between noise and signal allow the MCML cells to dissipate constant power and thus perform with no noise added to a system. Additional simulated results of a 31-stage ring oscillator result in a frequency for MCML of 1.57GHz simulated versus the 150.35MHz that MOSIS tested on a fabricated 31-stage CMOS oscillator. The layouts designed for the standard cell library conform to existing On Semiconductor ami06 technology dimensions and allow for design of any logical function to be fabricated. The I/O signals of each cell operate at the same input and output voltage swings which allow seamless integration with each other for implementation in any logical configuration.
77

Surfactant Driven Assembly of Freeze-casted, Polymer-derived Ceramic Nanoparticles on Grapehene Oxide Sheets for Lithium-ion Battery Anodes

Khater, Ali Zein 01 January 2018 (has links)
Traditional Lithium-Ion Batteries (LIBs) are a reliable and cost-efficient choice for energy storage. LIBs offer high energy density and low self-discharge. Recent developments in electric-based technologies push for replacing historically used Lead-Acid batteries with LIBs. However, LIBs do not yet meet the demands of modern technology. Silicon and graphene oxide (GO) have been identified as promising replacements to improve anode materials. Graphene oxide has a unique sheet-like structure that provides a mechanically stable, light weight material for LIB anodes. Due to its structure, reduced graphene oxide (rGO) is efficiently conductive and resistive to environmental changes. On the other hand, silicon-based anode materials offer the highest theoretical energy density and a high Li-ion loading capacity of various elements [20]. Silicon-based anodes that have previously been studied demonstrated extreme volumetric expansion over long cycles due to lithiation. Polysiloxane may be an interesting alternative as it is a Si-based material that can retain the high Li-ion loading capacity of Si while lacking the unattractive volumetric expansions of Si. Polymer derived ceramic-decorated graphene oxide anodes have been suggested to increase loading capacity, thermal resistance, power density, and mechanical stability of LIBs. Coupled with mechanically stable graphene oxide, polymer derived ceramic nanoparticle decorated graphene oxide anodes are studied to establish their efficiencies under operating conditions.
78

ELECTRICAL CHARACTERIZATION AND OPTIMIZATION OF GALLIUM ARSENIDE NANOWIRE ENSEMBLE DEVICES

Chia, Andrew 10 1900 (has links)
<p>III-V nanowire (NW) ensemble devices were fabricated using novel approaches to address key NW optoelectronic issues concerning electrical contacts, doping, surface effects and underlying electrostatics physics.</p> <p>NWs were first embedded in a filling medium, thus achieving low sheet resistance front contacts while preventing shunts. Various filling materials were assessed for porosity, surface roughness and thermal stability, giving Cyclotene as an ideal filing material. Sonication was also introduced as a novel method to achieve perfect planarization.</p> <p>The presence of the Cyclotene also enabled the NWs to be characterized precisely and easily by secondary ion mass spectrometry (SIMS) to give the NW dopant concentration with excellent spatial resolution. Additionally, SIMS characterization demonstrated the ability to characterize the height uniformity of individual segments in a heterostructure NW ensemble.</p> <p>The focus of the work shifted towards surface effects on NW device performance. Therefore, Poisson's equation was solved to provide a comprehensive model of NW surface depletion as a function of interface state density, NW radius and doping density. Underlying physics was examined where surface depletion was found to significantly reduce the conductivity of thin NWs, leading to carrier inversion for some.</p> <p>This model was then applied in conjunction with a transport model to fit current-voltage curves of an AlInP-passivated GaAs NW ensemble device. A 55% decrease in surface state density was achieved upon passivation, corresponding to an impressive four order of magnitude increase in the effective carrier concentration. Additionally, conventional and time-resolved photoluminescence measurements showed intensity and carrier lifetime improvement greater than 20x upon passivation.</p> <p>Finally, the model was extended to describe radial pn junction NWs with surface depletion to give radial energy band profiles for any arbitrary set of NW parameters. Specific cases were analyzed to extract pertinent underlying physics, while the built-in potential was optimized for the design for an optimal device.</p> / Doctor of Philosophy (PhD)
79

Surface Analysis of Materials for Direct Wafer Bonding

Alam, Arif Ul 04 1900 (has links)
<p>Surface preparation and its exposure to different processing conditions is a key step in heterogeneous integration of electronics, photonics, fluidics and/or mechanical components for More-than-Moore applications. Therefore, it is critical to understand how various processing and environmental conditions affect the surface properties of bonding substrates. In this thesis, the effects of oxygen reactive-ion etching (O<sub>2</sub> RIE) plasma followed by storage in ambient and 98% relative humidity on some key surface properties such as roughness, water contact angle, hardness, and the elemental and compositional states of three materials – silicon (Si), silicon dioxide (SiO<sub>2</sub>) and glass – are investigated to analyze their influence on bondability. Lower O<sub>2</sub> RIE plasma activation times cause low surface roughness, high surface reactivity and high hydrophilicity of Si, SiO<sub>2</sub> and glass. The decrease of hardness of Si and SiO<sub>2</sub> with increased activation time is attributed to higher surface roughness and formation of amorphous layers of Si. While contact angle and surface roughness results show correlation with bondability, the role of hardness on bondability requires further investigation. The high-resolution X-ray Photoelectron Spectroscopy (XPS) spectra of O<sub>2</sub> RIE treated Si, SiO<sub>2</sub> and glass showed the presence of Si(-O)<sub>2</sub> resulting in highly reactive surfaces. The high surface reactivity of Si, SiO<sub>2</sub> and glass obtained from oxygen plasma activation at lower activation times can result in better bondability. Also, the ambient humidity-induced Si(-OH)<sub>x</sub> plays an important role in the hydrophilic wafer bonding of Si and SiO<sub>2</sub> which may require a low temperature heating.</p> / Master of Applied Science (MASc)
80

Beyond conventional c-plane GaN-based light emitting diodes: A systematic exploration of LEDs on semi-polar orientations

Monavarian, Morteza 01 January 2016 (has links)
Despite enormous efforts and investments, the efficiency of InGaN-based green and yellow-green light emitters remains relatively low, and that limits progress in developing full color display, laser diodes, and bright light sources for general lighting. The low efficiency of light emitting devices in the green-to-yellow spectral range, also known as the “Green Gap”, is considered a global concern in the LED industry. The polar c-plane orientation of GaN, which is the mainstay in the LED industry, suffers from polarization-induced separation of electrons and hole wavefunctions (also known as the “quantum confined Stark effect”) and low indium incorporation efficiency that are the two main factors that contribute to the Green Gap phenomenon. One possible approach that holds promise for a new generation of green and yellow light emitting devices with higher efficiency is the deployment of nonpolar and semi-polar crystallographic orientations of GaN to eliminate or mitigate polarization fields. In theory, the use of other GaN planes for light emitters could also enhance the efficiency of indium incorporation compared to c-plane. In this thesis, I present a systematic exploration of the suitable GaN orientation for future lighting technologies. First, in order to lay the groundwork for further studies, it is important to discuss the analysis of processes limiting LED efficiency and some novel designs of active regions to overcome these limitations. Afterwards, the choice of nonpolar orientations as an alternative is discussed. For nonpolar orientation, the (1-100)-oriented (m-plane) structures on patterned Si (112) and freestanding m-GaN are studied. The semi-polar orientations having substantially reduced polarization field are found to be more promising for light-emitting diodes (LEDs) owing to high indium incorporation efficiency predicted by theoretical studies. Thus, the semi-polar orientations are given close attention as alternatives for future LED technology. One of the obstacles impeding the development of this technology is the lack of suitable substrates for high quality materials having semi-polar and nonpolar orientations. Even though the growth of free-standing GaN substrates (homoepitaxy) could produce material of reasonable quality, the native nonpolar and semi-polar substrates are very expensive and small in size. On the other hand, GaN growth of semi-polar and nonpolar orientations on inexpensive, large-size foreign substrates (heteroepitaxy), including silicon (Si) and sapphire (Al2O3), usually leads to high density of extended defects (dislocations and stacking faults). Therefore, it is imperative to explore approaches that allow the reduction of defect density in the semi-polar GaN layers grown on foreign substrates. In the presented work, I develop a cost-effective preparation technique of high performance light emitting structures (GaN-on-Si, and GaN-on-Sapphire technologies). Based on theoretical calculations predicting the maximum indium incorporation efficiency at θ ~ 62º (θ being the tilt angle of the orientation with respect to c-plane), I investigate (11-22) and (1-101) semi-polar orientations featured by θ = 58º and θ = 62º, respectively, as promising candidates for green emitters. The (11-22)-oriented GaN layers are grown on planar m-plane sapphire, while the semi-polar (1-101) GaN are grown on patterned Si (001). The in-situ epitaxial lateral overgrowth techniques using SiNx nanoporous interlayers are utilized to improve the crystal quality of the layers. The data indicates the improvement of photoluminescence intensity by a factor of 5, as well as the improvement carrier lifetime by up to 85% by employing the in-situ ELO technique. The electronic and optoelectronic properties of these nonpolar and semi-polar planes include excitonic recombination dynamics, optical anisotropy, exciton localization, indium incorporation efficiency, defect-related optical activities, and some challenges associated with these new technologies are discussed. A polarized emission from GaN quantum wells (with a degree of polarization close to 58%) with low non-radiative components is demonstrated for semi-polar (1-101) structure grown on patterned Si (001). We also demonstrated that indium incorporation efficiency is around 20% higher for the semi-polar (11-22) InGaN quantum wells compared to its c-plane counterpart. The spatially resolved cathodoluminescence spectroscopy demonstrates the uniform distribution of indium in the growth plane. The uniformity of indium is also supported by the relatively low exciton localization energy of Eloc = 7meV at 15 K for these semi-polar (11-22) InGaN quantum wells compared to several other literature reports on c-plane. The excitons are observed to undergo radiative recombination in the quantum wells in basal-plane stacking faults at room temperature. The wurtzite/zincblende electronic band-alignment of BSFs is proven to be of type II using the time-resolved differential transmission (TRDT) method. The knowledge of band alignment and degree of carrier localization in BSFs are extremely important for evaluating their effects on device properties. Future research for better understanding and potential developments of the semi-polar LEDs is pointed out at the end.

Page generated in 0.1467 seconds