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91	Analysis & Design of Radio Frequency Wireless Communication Integrated Circuits with Nanoscale Double Gate MOSFETs Laha, Soumyasanta 25 August 2015 (has links) No description available. Electrical Engineering Wireless Communication Double Gate MOSFET 60 GHz OOK Modulation and Demodulation Oscillator Power Amplifier Low Noise Amplifier RF Mixer Phase Frequency Detector 65 nm RF CMOS TRx Design
92	Increasing Forage Production on a Semiarid Rangeland Watershed Tromble, J. M. 20 April 1974 (has links) From the Proceedings of the 1974 Meetings of the Arizona Section - American Water Resources Assn. and the Hydrology Section - Arizona Academy of Science - April 19-20, 1974, Flagstaff, Arizona / Two native grass species, blue grama and sidecoats, were successfully seeded on a semiarid rangeland on the walnut gulch experimental watershed in southeastern Arizona. Optimum seeding dates selected were those within the time period most likely to receive precipitation, and grass stands were established in two successive years with average rainfall. Shrubs were killed by root-plowing at a depth of 14 inches, a procedure which was more than 95% successful in controlling sprouting shrubs. Forage production measurements taken on nm-28 sideoats and Vaughn sideoats showed a yield of 1,950 and 2,643 pounds of forage per acre, respectively, for the 2 years following the seeding, whereas untreated sites produced 23 and 25 pounds per acre of forage. Results indicate that success in establishing a stand of native grass is increased through use of existing hydrologic data. Hydrology -- Arizona. Water resources development -- Arizona. Hydrology -- Southwestern states. Forage grasses Semiarid climates Grama grasses Crop production Range management Arizona Hydrologic data Range grasses Small watersheds Precipitation (atmospheric) Ranges Planting management Plant growth Vegetation establishment Water requirements Nm-28 sideoats Vaughn sidecoats
93	Nelineární řízení komplexních soustav s využitím evolučních přístupů / Nonlinear Control of Complex Systems by utilization of Evolutionary Approaches Minář, Petr Unknown Date (has links) Control theory of complex systems by utilization of artificial intelligent algorithms is relatively new science field and it can be used in many areas of technical practise. Best known algorithms to solved similar tasks are genetic algorithm, differential evolution, HC12 Nelder-Mead method, fuzzy logic and grammatical evolution. Complex solution is presented at selected examples from mathematical nonlinear systems to examples of anthems design and stabilization of deterministic chaos. The goal of this thesis is present examples of implementation and utilization of artificial algorithms by multi-objective optimization. To achieve optimal results is used designed software solution by multi-platform application, which used Matlab and Java interfaces. The software solution integrate every algorithms of this thesis to complex solution and it extends possible application of those approaches to real systems and practical world.
94	Power-Efficient Settling Time Reduction Techniques for a Folded-Cascode Amplifier in 1.8 V, 0.18 um CMOS / Energi-effektiva metoder för att minska insvängningstiden för en folded-cascodeförstärkare i 1.8V, 0.18um CMOS Johansson, Jimmy January 2017 (has links) Testability is crucial in today’s complex industrial system on chips (SoCs), where sensitive on-chip analog voltages need to be measured. In such cases, an operational amplifier (opamp) is required to sufficiently buffer the signals before they can drive the chip pad and probe parasitics. A single-stage opamp offers an attractive choice since it is power efficient and eliminates the need for frequency compensation. However, it has to satisfy demanding specifications on its stability, input common mode range, output swing, settling time, closed-loop gain and offset voltage. In this work, the settling time performance of a conventional folded-cascode (FC) opamp is substantially improved. Settling time of an opamp consists of two major components, namely the slewing period and the linear settling period. In order to reduce the settling time significantly without incurring excessive area and power penalty, a prudent circuit implementation that minimizes both these constituents is essential. In this work, three different slew rate enhancement (SRE) circuits have been evaluated through extensive simulations. The SRE candidate providing robust slew rate improvement was combined with a current recycling folded cascode structure, resulting in lower slewing and linear settling time periods. Exhaustive simulations on a FC cascode amplifier with complementary inputs illustrate the effectiveness of these techniques in settling time reduction over all envisaged operating conditions. Folded-Cascode Settling Time Settling Time Reduction Slew Rate Slew Rate Enhancement Operational Amplifier Recycling Folded-Cascode 180 nm CMOS Test Buffer Power-Efficient Single-Stage Amplifier Linear Settling Period Slewing Period Annan elektroteknik och elektronik
95	Nelineární řízení komplexních soustav s využitím evolučních přístupů / Nonlinear Control of Complex Systems by Utilization of Evolutionary Approaches Minář, Petr January 2018 (has links) Control theory of complex systems by utilization of artificial intelligent algorithms is relatively new science field and it can be used in many areas of technical practise. Best known algorithms to solved similar tasks are genetic algorithm, differential evolution, HC12 Nelder-Mead method, fuzzy logic and grammatical evolution. Complex solution is presented at selected examples from mathematical nonlinear systems to examples of anthems design and stabilization of deterministic chaos. The goal of this thesis is present examples of implementation and utilization of artificial algorithms by multi-objective optimization. To achieve optimal results is used designed software solution by multi-platform application, which used Matlab and Java interfaces. The software solution integrate every algorithms of this thesis to complex solution and it extends possible application of those approaches to real systems and practical world.
96	A 1.8 ps Time-to-Digital Converter (TDC) Implemented in a 20 nm Field-Programmable Gate Array (FPGA) Using a Ones-Counter Encoding Scheme with Embedded Bin-Width Calibrations and Temperature Correction Sven, Engström January 2020 (has links) This thesis investigates the use of field-programmable gate arrays (FPGAs) to implement a time-to-digital converter (TDC) with on-chip calibration and temperature correction.Using carry-chains on the Xilinx Kintex UltraScale architecture to create a tapped delay line (TDL) has previously been proven to give good time resolution.This project improves the resolution further by using a bit-counter to handle bubbles in the TDL without removing any taps.The bit counter also adds the possibility of using a wave-union approach previously dismissed as unusable on this architecture.The final implementation achieves an RMS resolution of 1.8 ps. time-to-digital time-to-digital converter TDC 1.8 ps field-programmable gate array FPGA 20 nm Xilinx Kintex UltraScale tapped delay line TDL taps carry-chain ones-counter bit-counter bubbles wave-union embedded temperature correction Annan elektroteknik och elektronik

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