<div> <div> <p>Phase transition materials (PTM) have garnered immense interest in concurrent post-CMOS electronics, due to their unique properties such as - electrically driven abrupt resistance switching, hysteresis, and high selectivity. The phase transitions can be attributed to diverse material-specific phenomena, including- correlated electrons, filamentary ion diffusion, and dimerization. In this research, we explore the application space for these materials through extensive device-circuit co-design and propose new ideas harnessing their unique electrical properties. The abrupt transitions and high selectivity of PTMs enable steep (< 60 mV/decade) switching characteristics in Hyper-FET, a promising post-CMOS transistor. We explore device-circuit co-design methodology for Hyper-FET and identify the criterion for material down-selection. We evaluate the achievable voltage swing, energy-delay trade-off, and noise response for this novel device. In addition to the application in low power logic device, PTMs can actively facilitate non-volatile memory design. We propose a PTM augmented Spin Transfer Torque (STT) MRAM that utilizes selective phase transitions to boost the sense margin and stability of stored data, simultaneously. We show that such selective transitions can also be used to improve other MRAM designs with separate read/write paths, avoiding the possibility of read-write conflicts. Further, we analyze the application of PTMs as selectors in cross-point memories. We establish a general simulation framework for cross-point memory array with PTM based <i>selector</i>. We explore the biasing constraints, develop detailed design methodology, and deduce figures of merit for PTM selectors. We also develop a computationally efficient compact model to estimate the leakage through the sneak paths in a cross-point array. Subsequently, we present a new sense amplifier design utilizing PTM, which offers built-in tunable reference with low power and area demand. Finally, we show that the hysteretic characteristics of unipolar PTMs can be utilized to achieve highly efficient rectification. We validate the idea by demonstrating significant design improvements in a <i>Cockcroft-Walton Multiplier, </i>implemented with TS based rectifiers. We emphasize the need to explore other PTMs with high endurance, thermal stability, and faster switching to enable many more innovative applications in the future.</p></div></div>

Transportphänomene treten in biologischen und künstlichen Systemen auf allen Längenskalen auf. In dieser Arbeit untersuchen wir sie für verschiedene Systeme aus einer mesoskopischen Perspektive, in der Fluktuationen physikalischer Größen um ihre Mittelwerte eine wichtige Rolle spielen. Im ersten Teil untersuchen wir die persistente Bewegung aktiver Brownscher Teilchen mit zusätzlichem Drehmoment, wie sie z.B. für Spermien oder Janus Teilchen auftritt. Wird ihre Bewegung auf einen Tunnel variierender Breite beschränkt, so setzt im thermischen Nichtgleichgewicht Transport ein; ungerichtete Fluktuationen des rauschhaften Antriebs werden gleichgerichtet. Hierdurch wird ein neuer Ratschentyp realisiert. Im zweiten Teil untersuchen wir den intrazellulären Cargotransport in den Axonen von Nervenzellen mithilfe molekularer Motoren. Sie werden als asymmetrischer Ausschlussprozess simuliert. Zusätzlich können die Cargos zwischen benachbarten Motoren ausgetauscht werden. Dadurch lassen sich charakteristische Eigenschaften des langsamen axonalen Transports mit einer einzigen Motorspezies reproduzieren. Bewerkstelligt wird dies durch die transiente Anbindung der Cargos an rückwärtslaufende Motorstaus. Im dritten Teil diskutieren wir resistive switching, die nicht volatile Widerstandsänderung eines Dielektrikums durch elektrische Impulse. Es wird für Anwendungen im Computerspeicher ausgenutzt, dem resistive RAM. Wir schlagen ein auf Sauerstoffvakanzen basierendes stochastisches Gitterhüpfmodell vor. Wir definieren binäre logische Zustände mit Hilfe der zugrunde liegenden Vakanzenverteilung und definieren Schreibe- und Leseoperationen durch Spannungsimpulse für ein solches Speicherelement. Überlegungen über die Unterscheidbarkeit dieser Operationen unter Fluktuationen zusammen mit der Deutlichkeit der unterschiedlichen Widerstandszustände selbst ermöglichen es uns, eine optimale Vakanzenzahl vorherzusagen. / Transport phenomena occur in biological and artificial systems at all length scales. In this thesis, we investigate them for various systems from a mesoscopic perspective, in which fluctuations around their average properties play an important role. In the first part, we investigate the persistent diffusive motion of active Brownian particles with an additional torque. It can appear in many real life systems, for example in sperm cells or Janus particles. If their motion is confined to a tunnel of varying width, transport arises out of thermal equilibrium; unbiased fluctuations of the noisy drive are rectified. This way, we have realized a novel kind of ratchet. In the second part, we study intracellular cargo transport in the axons of nerve cells by molecular motors. They are modeled by an asymmetric exclusion process. In a new approach, we add a cargo exchange interaction between the motors. This way, the characteristics of slow axonal transport can be accounted for with a single motor species. It is explained by the transient attachment of cargos to reverse walking motors jams. In the third part, we discuss resistive switching, the non-volatile change of resistance in a dielectric due to electric pulses. It is exploited for applications in computer memory, the resistive random access memory (ReRAM). We propose a stochastic lattice hopping model based on the on oxygen vacancies. We define binary logical states by means of the underlying vacancy distributions, and establish a framework of writing and reading such a memory element with voltage pulses. Considerations about the discriminability of these operations under fluctuations together with the markedness of the resistive switching effect itself enable us to predict an optimal vacancy number.

Les mémoires non-volatiles programmables une fois sont en plein essor dans le monde de l’électronique embarquée. La traçabilité, la configuration ou encore la réparation de systèmes sur puce avancés font partis des applications adressées par ce type de mémoire. Plus particulièrement, la technologie antifusible présente des propriétés de sécurité autorisant le stockage d’information sensible.Ce travail de thèse est orienté vers la compréhension des mécanismes de claquage d’oxydes minces sollicités pour la programmation des cellules antifusibles ainsi que l’intégration au niveau système de moyens de détections. Une première étape fut d’étudier les phénomènes de claquage de diélectrique type SiO2 et à haute permittivité sous l’application d’un fort champ ́électrique. Des techniques de mesures dédiées ont été développées afin de réaliser des caractérisations dans les conditions de programmation des mémoires antifusible sollicitant des temps au claquage inférieurs à la micro-seconde. Ces mesures ont ensuite permis l’étude statistique du claquage des diélectriques ainsi que la modélisation sous de hautes tensions ; hors des gammes étudiées traditionnellement dans le domaine de la fiabilité. Le modèle proposé permet l’optimisation des dimensions d’une cellule élémentaire en fonction d’un temps au claquage défini au préalable. Un mécanisme inattendu occasionnant un sur courant substrat a également été mis en évidence pendant la phase de programmation. L’étude de ce phénomène a été réalisée par des caractérisations électriques et des simulations afin de conclure sur l’hypothèse d’un déclenchement d’un transistor bipolaire parasite de type PNP dans la cellule antifusible. L’impact des conditions de programmation sur le courant de lecture mesuré sous une basse tension a également été analysé. Des structures de tests analogiques dédiés ont été conçues afin de contrôler l’amplitude du courant de programmation. Le contrôle du temps de programmation est quant à lui accompli par un système de détection de courant et de temporisation. Finalement, ces solutions sont validées par un démonstrateur d’une capacité de 1-kb conçu et fabriqué sur une technologie CMOS standard avancée 32nm. / Non-volatile one-time programmable memories are gaining an ever growing interest in embedded electronics. Chip ID, chip configuration or system repairing are among the numerous applications addressed by this type of semiconductor memories. In addition, the antifuse technology enables the storage of secured information with respect to cryptography or else. The thesis focuses on the understanding of ultrathin gate-oxide breakdown physics that is involved in the programming of antifuse bitcells. The integration of advanced programming and detection schemes is also tackled in this thesis. The breakdown mechanisms in the dielectric material SiO2 and high-K under a high electric field were studied. Dedicated experimental setups were needed in order to perform the characterization of antifuse bitcells under the conditions define in memory product. Typical time-to-breakdown values shorter than a micro second were identified. The latter measurements allowed the statistical study of dielectric breakdown and the modeling in a high voltage range, i.e. beyond the conventional range studied in reliability. The model presented in this PhD thesis enables the optimization of the antifuse bitcell sizes according to a targeted mean time-to- breakdown value. A particular mechanism leading to a high bulk current overshoot occuring during the programming operation was highlighted. The study of this phenomenon was achieved using electrical characterizations and simulations. The triggering of a parasitic P-N-P bipolar transistor localized in the antifuse bitcell appeared as a relevant hypothesis. The analysis of the impact of the programming conditions on the resulting read current measured under a low voltage was performed using analog test structures. The amplitude of the programming current was controlled in an augmented antifuse bitcell. The programming time is controlled by a programming detection system and a delay. Finally, these solutions are to be validated using a 1-kb demonstrator yet designed and fabricated in a logic 32-nm CMOS process.

In this review the different concepts of nanoscale resistive switching memory devices are described and classified according to their I–V behaviour and the underlying physical switching mechanisms. By means of the most important representative devices, the current state of electrical performance characteristics is illuminated in-depth. Moreover, the ability of resistive switching devices to be integrated into state-of-the-art CMOS circuits under the additional consideration with a suitable selector device for memory array operation is assessed. From this analysis, and by factoring in the maturity of the different concepts, a ranking methodology for application of the nanoscale resistive switching memory devices in the memory landscape is derived. Finally, the suitability of the different device concepts for beyond pure memory applications, such as brain inspired and neuromorphic computational or logic in memory applications that strive to overcome the vanNeumann bottleneck, is discussed.