Thesis--Auburn University, 2007. / Abstract. Vita. Includes bibliographic references (p.181-188).

Thesis (M.S.)--Rochester Institute of Technology, 2005. / Typescript. Includes bibliographical references (leaves 89-94).

ISO 9000:2000 is the newest version of the ISO 9000 family of standards. Unlike the 1994 version, it does not distinguish between servicing, testing and designing standards. It emphasizes quality improvement rather than quality control and briefly explains how to implement the Plan-Do-Check- Act (PDCA) cycle for improvement and the use of statistical techniques to improve the quality of process and product instead of controlling the quality of the output. The thesis explains why companies need to be certified and how to implement quality improvement programs. The objective of this thesis is to provide generic certification guidelines for printed circuit board manufacturers, based on ISO 9000:2000 standard. This standardized framework could assist companies in achieving ISO 9000 certification. Since every manufacturer has its own proprietary set of controls on their processes, these generic guidelines provide an opportunity for the user to plug in their own information and to write their own processes. Another objective of this thesis is to introduce a methodology for the implementation of the various methods and tools that can be applied for process improvement in printed circuit boards manufacturing.

by Mok Chun-Hung. / Thesis (M.B.A.)--Chinese University of Hong Kong, 1987. / Bibliography: leaves 72-75.

Solution processed circuits are expected to be the main components to achieve low cost, large area, flexible electronics. However, the commercialization of solution processed flexible electronics face several challenges. The passive component such as capacitors are limited in frequency range and operating voltage. The active component such as transistors suffer from low mobility ultimately leading to limited current-carrying capacity. Just as in traditional silicon technology, the fabrication process and material choices significantly impact the performance of the fabricated devices. My thesis focuses on the optimization of the performance of printed capacitors and transistors through investigation of several aspects of the device structure and fabrication process. The first part of this work focuses on the optimization of printed nanoparticle/polymer composite capacitors. Thin film metal oxide nanoparticle/polymer composites have enormous potential to achieve printable high-k dielectrics. The combination of high-k ceramic nanoparticle and polymer enables room temperature deposition of high dielectric constant film without the need of high temperature sintering process. The polymer matrix host fills the packing voids left behind by the nanoparticles resulting to higher effective dielectric permittivity as a system and suppresses surface states leading to reduced dielectric loss. Such composite systems have been employed in a number of flexible electronic applications such as the dielectrics in capacitors and thin film transistors. One of the most important properties of thin film capacitors is the breakdown field. In a typical capacitor system, the breakdown process leads to catastrophic failure that destroys the capacitor; however, in a nanoparticle/polymer composite system with self-healing property, the point of breakdown is not well-defined. The breakdown of the dielectric or electrodes in the system limits the leakage observed. It is possible, however, to define a voltage/field tolerance. Field tolerance is defined as the highest practical field at which the device stays operational with low failure rate by qualifying the devices with defined leakage current density. In my work, the optimization of the field tolerance of (Ba,Sr)TiO₃ (BST)/parylene-C composite capacitors is achieved by studying the influence of the electromigration parameter on leakage and field strength through the inherit asymmetrical structure of the fabricated capacitors. One approach to creating these composites is to use a spin-coated nanoparticle film together with vapor deposited polymers, which can yield high performance, but also forms a structurally asymmetric device. The performance of a nanoparticle BST/parylene-C composite capacitor is compared to that of a nanoparticle BST capacitor without the polymer layer under both directions of bias. The composite device shows a five orders of magnitude improvement in the leakage current under positive bias of the bottom electrode relative to the pure-particle device, and four orders of magnitude improvement when the top electrode is positively biased. The voltage tolerance of the device is also improved, and it is asymmetric (44 V vs. 28 V in bottom and top positive bias, respectively). This study demonstrates the advantage of this class of composite device construction, but also shows that proper application of the device bias in this type of asymmetrical system can yield an additional benefit. The dependence of the field tolerance of nanoparticle/polymer composite capacitors on the electromigration parameter of the electrodes is investigated using the symmetrical dielectric system. The breakdown is suppressed by selecting the polarity used in nanoparticle (Ba,Sr)TiO₃/parylene-C composite film-based capacitors. Metals including gold, silver, copper, chromium, and aluminum with comparable surface conditions were examined as the electrodes. The asymmetric silver, aluminum, gold, copper, and chromium electrode devices show a 64 %, 29 %, 28 %, 17 %, 33 %, improvement in the effective maximum operating field, respectively, when comparing bias polarity. The field at which filament formation is observed shows a clear dependence on the electromigration properties of the electrode material and demonstrates that use of electromigration resistant metal electrodes offers an additional route to improving the performance of capacitors using this nanoparticle/polymer composite architecture. The second part of my thesis focuses on the novel pneumatic printing process that enables manipulation of the crystal growth of the organic semiconductors to achieve oriented crystal with high mobility. Small molecule organic semiconductors are attracting immense attention as the active material for the large-area flexible electronics due to their solution processability, mechanical flexibility, and potential for high performance. However, the ability to rapidly pattern and deposit multiple materials and control the thin-film morphology are significant challenges facing industrial scale production. A novel and simple pneumatic nozzle printing approach is developed to control the crystallization of organic thin-films and deposit multiple materials with wide range of viscosity including on the same substrate. Pneumatic printing uses capillary action between the nozzle and substrate combined with control of air pressure to dispense the solution from a dispense tip with a reservoir. Orientation and size of the crystals is controlled by tuning the printing direction, speed, and the temperature of the substrate. The main advantages of pneumatic printing technique are 1) simple setup and process, 2) multi-material layered deposition applicable to wide range of solution viscosity, 3) control over crystal growth. The manipulation of crystal growth will be discussed in the next chapter. This method for performance optimization and patterning has great potential for advancing printed electronics. The dependence of the mobility of printed thin film 6,13-bis(triisopropylsilylethynyl) pentacene [TIPS-pentacene] and C8-BTBT on printing conditions is investigated, and the result indicates that the formation of well-ordered crystals occurs at an optimal head translation speed. A maximum mobility of 0.75 cm²/(Vs) is achieved with 0.3 mm/s printing speed and 1.3 cm²/(Vs) with 0.3 mm/s printing speed at 50C for TIPS-pentacene and C8-BTBT respectively. In summary, pneumatic printing technique can be an attractive route to industrial scale large area flexible electronics fabrication.

Orientador: Ailton Akira Shinoda / Banca: Amarildo Tabone Paschoalini / Banca: Marcio Antonio Bazani / Banca: Thiago Antonini Alves / Banca: Valtemir Emerencio do Nascimento / Resumo: Quando equipamentos e dispositivos eletrônicos são desenvolvidos, o conhecimento de todas as características do projeto é imprescindível. Certos circuitos eletrônicos apresentam componentes com elevada dissipação térmica devido à potência, podendo acarretar problemas no produto desenvolvido. Os componentes eletrônicos, em sua maioria, apresentam um limite em relação à temperatura, tal propriedade é denominada temperatura de junção, temperatura na qual o die do componente eletrônico se encontra. Se a temperatura de junção for excedida, o componente eletrônico poderá apresentar um comportamento inadequado ou até mesmo a parada total de suas atividades. O ideal é que o projeto elétrico e térmico avancem concomitantemente no desenvolvimento do equipamento, de modo a se obter um produto otimizado. Uma maneira eficiente de avaliar o comportamento térmico dos equipamentos eletrônicos é através de simulações computacionais em softwares de Computational Fluid Dynamics (CFD). O emprego dessa ferramenta não é trivial pela dificuldade da elaboração do modelo numérico. Além disso, alguns valores dos parâmetros necessários do modelo numérico, muitas vezes, não são conhecidos. Um exemplo típico é a potência térmica dissipada dos componentes eletrônicos, não dos elementos passivos como resistores ou capacitores, mas dos circuitos integrados (CIs). Os CIs possuem uma estrutura interna complexa contendo milhares ou até milhões de transistores. Outro exemplo é a placa de circuito impresso (PCI) com vários componentes eletrônicos no seu interior. Neste contexto, esta tese propõe uma metodologia para a obtenção de um modelo numérico correlacionado que pode ser extrapolado para um cenário desejado e a partir deste conhecer o campo de temperatura e de velocidade do equipamento. A metodologia é baseada em uma correlação entre o modelo numérico simplificado e teste... / Abstract: When electronic equipment and devices are developed, the knowledge of all the features of this project is essential. Some electronic circuits have components with high thermal power dissipation, which can cause problems to the product developed. The electronic components have a limit on the temperature, such property is called junction temperature. If the junction temperature is exceeded, the electronic components will display inappropriate behavior or even a complete stop their activities. Ideally, the electrical design and thermal design concurrently advance in the development of the equipment in order to obtain an optimum product. A efficient way to meet the thermal performance of electronic equipment is through computer simulations in Computational Fluid Dynamics (CFD) software. However make use of this tool can be difficult. The difficulty is creating the numerical model. For this procedure is necessary to know some variables that are unknown. The thermal power dissipation of electronic components, not resistors or capacitors, but integrated circuits that has in its interior a very complex structure containing thousands or millions of transistors is an example. The complex structures of the geometries to be modeled that are inside electronic components and PCBs are other examples. In this context, this thesis proposes a methodology based on numerical correlations and experimental tests in order to know the device's temperature range designed running in a desired situation. The methodology is based on a correlation between the simplified numerical model and experimental test. The thermal simulation methodology presented in this thesis brings contributions to the thermal management in the design of electronic equipment. The approach allows doing numerical simulations of equipment for a desired scene and the results assist in project analysis, particularly in reliability and lifetime of electronic ... / Doutor

published_or_final_version / Environmental Management / Master / Master of Science in Environmental Management

This study was a follow up to P. C. Dams' (1996) unpublished University of North Texas masters thesis, The effect of defect probability during training on inspection accuracy in a quality control simulation. Graphics of computer circuit boards were presented in dyads with an error free sample on the left and a comparison on the right. Comparisons had either a rotation or transposition defect, or were error free. Subjects had 10-s to accept or reject the comparison as identical to the sample. They were trained using two different stimulus fading procedures (using descending defect probabilities) and immediate feedback. Defect probabilities for the Tens were 0.60, 0.50, 0.40, and 0.30 and for the Twenties were 1.00, 0.80, 0.60, and 0.40. The last 4 pretraining and posttraining sessions were compared and the posttraining performance of the Twenties, as compared to the Tens, demonstrated greater improvement over pretraining performance. No firm conclusions could be drawn as to the effectiveness of either training procedure. The significance of the current investigation and suggestions for future research are discussed.

Apresenta-se inicialmente o problema do Circuito Impresso na Automação de Projetos de Sistemas Digitais. É descrito um processo de fabricação, já em uso mencionando-se as principais fases da implementação de circuitos impressos. Dá-se ênfase aos algoritmos desenvolvidos para a definição do mapa de rotas, bem como à forma de descrição dos dados para processamento de problemas. São descritos sumariamente os arquivos e programas usados para a realização do \"Lay-out\", e complementarmente, discute-se um caso exemplo desde o seu preparo até as saídas gráficas. Alguns exemplos reais são expostos a na forma como foram processados. Dá-se destaque ainda ao conjunto de mensagens de erro emitidas pelos programas, que auxiliam o usuário no projeto do mapa de rotas de interconexão. / The problem of printed circuit boards in digital systems Project automation is initially presented. A manufacturing process for printed circuit boards is considered and the important phases of its implementation are described. This manufacturing process has been already successfully implemented. The central point of this dissertation is the set of algorithms developed for route mapping. The format description for processing is also a problem of importance and concern. The files and program for lay-out construction are briefly described, and an example illustrates all the relevant steps in the process, starting from data preparation and ending with the graphic outputs. Several real case examples are also presented in the form they were processed. A set of error messages printed by the program is presented. These messages are of great help to the user in projecting interconnection routing map.

Orientador: André Luis Seixlack / Co-orientador: Marcio Antônio Bazani / Co-orientador: Amarildo Tabone Paschoalini / Banca: João Batista Campos Silva / Banca: Thiago Antonini Alves / Resumo: Este trabalho apresenta uma proposta de modelagem de uma réplica térmica de placa de circuito impresso, feita a partir de componentes com potência conhecidas objetivando analisar a distribuição de temperatura e os processos de troca de calor quando elementos semelhantes são utilizados em conjunto nos sistemas eletrônicos, visto que com o aumento da necessidade de maior capacidade de processamento os componentes estão cada vez menores e dissipando muito mais calor. Os obstáculos aquecidos que simulam componentes constituem-se em um resistor comercial envolvido por resina especial para encapsulamentos eletrônicos. Este modelo será criado para ter suas equações governantes resolvidas em software comercial. A réplica térmica será representada por blocos, com diferentes dissipações de potências e áreas de troca de calor. Uma vez que o desempenho térmico global depende da dissipação térmica de cada bloco, a avaliação poderá dizer quais blocos contribuem para uma melhor eficiência na troca de calor. Os experimentos fornecerão os valores de temperaturas dos componentes e velocidades de escoamentos para serem comparados com o modelo computacional, e desta forma, o melhor modelo de turbulência que descreve a análise experimental poderá ser encontrado. Foi estudada também a aplicação da teoria dos coeficientes de influência entre componentes. Este trabalho é adequado para a identificação de problemas que se relacionam direta ou indiretamente com falhas em componentes eletrônicos devido à alta temperatura / Abstract: This paper proposes a modeling of a thermal replica of the printed circuit board, made from components with known power aimed at analyzing the temperature distribution and the processes of heat exchange when similar elements are used together in the electronic systems, as that with the increasing need for higher processing components are smaller and more heat dissipating. The heated obstacles simulating components are in a trade resistor surrounded by special resin for electronic encapsulation. This model will be created to be their governing equations solved in commercial software. The thermal replica is represented by blocks with different power dissipation and heat exchange areas. Once the overall thermal performance depends on the thermal dissipation of each block, the evaluation can tell which blocks contribute to better efficiency in heat exchange. The experiments provide the values of the temperature and velocity components of flow to be compared with the computational model, and thus the turbulence model that best describes the experimental analysis can be found. The application of the theory of influence coefficients between components was also studied. This work is suitable for the identification of problems that relate directly or indirectly to failures in electronic components due to high temperature / Mestre