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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
21

Conception d'amplificateurs intégrés de puissance en technologies Silicium pour station de base de la quatrième génération des systèmes de radiocommunications cellulaires / Design of base stations integrated power amplifier in silicon technology for the fourth generation of cellular radio communication networks

Plet, Sullivan 30 November 2016 (has links)
Ces travaux de recherche concernent les amplificateurs RF de puissance pour stations de base. La technologie actuelle de transistor RF la plus compétitive, le LDMOS, est confrontée à l’augmentation constante du débit et à la concurrence d’autres technologies comme le HEMT GaN. Un autre challenge est l’intégration de l’adaptation de sortie réalisée en dehors du boîtier qui n’est plus compatible avec les futurs standards combinant jusqu’à soixante-quatre amplificateurs de puissance proches les uns des autres.Une première piste envisagée dans cette thèse est le substrat Si à haute résistivité. A partir de simulations puis de mesures sur plaques, l’amélioration du facteur de qualité des éléments passifs a été démontrée mais ces premières investigations ne permettent pas l’intégration de l’adaptation de sortie avec la technologie actuelle bien que les résultats soient très encourageants. Les challenges technologiques de ce nouveau substrat ont mené à considérer la structure différentielle pour les amplificateurs. En plus des avantages connus de cette configuration, nous avons montré que la conception d’un amplificateur de puissance différentiel montre une amélioration importante de la bande instantanée répondant au besoin d’un débit toujours plus élevé. Cette amélioration ne dégrade pas les autres performances en gain, rendement et puissance de sortie. Dans la continuité de cette thèse, les perspectives concernent la conception d’un amplificateur de puissance sur substrat SI à haute résistivité combinée à une structure différentielle qui pourrait permettre une avancée majeure sur toutes les performances tout en gardant l’avantage du faible coût du LDMOS Silicium en comparaison des autres substrats. / This research concerns the RF power amplifiers for base stations. The current most competitive technology of RF transistor, the LDMOS, faces the constantly increasing data rate and competition from other technologies such as GaN HEMT. Another challenge is the integration of the output matching made outside of the package which is not compatible with future standards combining up to sixty-four power amplifiers close to each other. A first track proposed in this thesis is the high resistivity Si substrate. From simulations and measurements on wafers, improved passive elements quality factor has been demonstrated but these initial investigations do not allow the integration of the output matching with the current technology, although the results are very encouraging. The technological challenges of this new substrate led to consider the differential structure for amplifiers. Besides to the known advantages of this configuration, we have shown that the design of a differential power amplifier shows a significant improvement in the instantaneous band width meeting the need for higher data rate. This improvement does not degrade other performance as gain, efficiency and output power. In continuation of this thesis, the perspective concerns the design of a power amplifier on a high resistivity Si substrate combined with a differential structure that could enable a major advance over all performance while keeping the advantage of low cost of LDMOS silicon compared to other substrates.
22

Frequency domain model fitting and Volterra analysis implemented on top of harmonic balance simulation

Aikio, J. P. (Janne P.) 24 April 2007 (has links)
Abstract The modern wireless communication techniques are aiming on increasing bandwidth and the number of carriers for higher data rate. This sets challenging linearity requirements for RF power amplifiers (PAs). Unfortunately, high linearity can only be obtained at the cost of efficiency. In order to improve the performance of the PA, in-depth understanding of nonlinear behaviour is mandatory. This calls for techniques that can give componentwise information of the causes of the distortion. The aim of this thesis is to develop a technique that can provide such information. This thesis proposes a detailed distortion analysis technique that is based on frequency domain fitting of polynomial models. Simulated large-signal spectra are used for fitting as these contain the necessary information about the large-signal bias point and amplitude range. Moreover, in the frequency domain the delays are easy to compensate, and detailed analysis to any fitted tone can be performed. The fitting procedure as such is simple but becomes difficult in multi-dimensional nonlinearities if the controlling voltages correlate strongly. In this thesis the solvability and reliability of the fitting procedure is increased by numerical operations, model-degree reduction and by using different excitations. A simplified Volterra method is used to calculate the distortion contributions by using the fitted model. The overall distortion is analysed by calculating the voltage response of the contributions of each nonlinearity to the terminal nodes of the device by the use of linear transfer functions of the circuit. The componentwise analysis is performed by phasor presentation enabling the cancelling mechanisms to be seen. The proposed technique is implemented on top of harmonic balance simulation in an APLAC circuit simulator in which extensive distortion simulations are performed. The technique relies on the existing device model and thus the fitted model can be only as accurate as the particular simulation model. However, two different RF PAs are analysed that show a good agreement between measurements and simulations. The proposed technique is verified with several test cases including amplitude dependent amplitude and phase distortion, intermodulation distortion sweet spots, bandwidth dependent memory effects and impedance optimization. The main finding of the detailed analysis is that the distortion is a result of several cancelling mechanisms. In general, cubic nonlinearity of transconductance is dominating the in-band distortion but is cancelled by the 2nd-degree nonlinearity that is mixed to the fundamental band from envelope and 2nd harmonic bands that is usually the main cause of memory effects.
23

Amplification de puissance linéaire à haut rendement en technologie GaN intégrant un contrôle de polarisation de grille / Linear and high efficiency microwave GaN-based power amplification with a gate bias control

Medrel, Pierre 21 October 2014 (has links)
Cette thèse s’inscrit dans le domaine de l’amplification de puissance microonde linéaire et haut rendement en technologie GaN. Le premier chapitre décrit le contexte général de l’émission de signaux microondes de puissance pour les télécommunications sans fil, avec un focus particulier apporté sur l’amplificateur de puissance RF. Les différents critères de linéarité et d’efficacité énergétique sont introduits.Le second chapitre présente plus particulièrement la technologie GaN et le transistor de puissance comme brique de base pour l’amplification de puissance microonde. Une revue synthétique des différentes architectures relevées dans la littérature relative à l’amplification à haut rendement est faite.En troisième chapitre, le banc de mesure temporelle d’enveloppe développé et servant de support expérimental à cette étude est présenté. Les procédures d’étalonnage et de synchronisation sont décrites. En illustration, une nouvelle méthode de mesure du NPR large bande est présentée, et validée expérimentalement.Une solution d’amplification adaptative innovante est étudiée dans le quatrième chapitre, et constitue le cœur de ce mémoire. Celle-ci se base sur le contrôle dynamique de la polarisation de grille autour du point de pincement, au rythme de l’enveloppe de modulation. Un démonstrateur d’amplification 10W GaN en bande S (2.5GHz) est développé. Comparativement à la classe B fixe, une forte amélioration de la linéarité est obtenue, sans impact notable sur le rendement moyen de l’amplificateur RF. Finalement, une investigation de la technique proposée pour l’amélioration du rendement du modulateur dans l’architecture d’envelope tracking de drain est menée. / This work deals with linear and high efficiency microwave power amplification in GaN technology.The first chapter is dedicated to the general context of wireless telecommunication with a special emphasis on the RF power amplifier. The most representative figures of merit in terms of linearity and power efficiency are introduced.The second chapter deals more specifically with the GaN technology and GaN-based transistor for microwave power amplification. A description of the principal architectures found in the literature related to high efficiency and linear amplification is summarized.In the third chapter, the developed envelope time-domain test bench is presented. Time-synchronization and envelope calibration procedures are discussed. As an illustration, a new specific wideband NPR measurement is presented and experimentally validated.An innovative power amplifier architecture is presented in the fourth chapter. It is based on a specific dynamic gate biasing technique of the power amplifier biased close to the pinch-off point. A 10W GaN S-band demonstrator has been developed. Compared to fixed class-B conditions, a linearity improvement has been reported without any prohibitive efficiency degradation of the RF power amplifier. Finally, an investigation of the proposed technique for the efficiency improvement in the drain envelope tracking technique is proposed.
24

Analysis, measurement and cancellation of the bandwidth and amplitude dependence of intermodulation distortion in RF power amplifiers

Vuolevi, J. (Joel) 05 October 2001 (has links)
Abstract The main emphasis in modern RF power amplifier (PA) research is on improving linearity while at the same time maintaining reasonably good efficiency, for which purpose external linearization in the form of feedforward or predistortion is often used. Linearity and linearization can be considered from both a fundamental signal (amplitude and phase conversions, AM-AM & AM-PM) and an intermodulation distortion (IMD) regeneration point of view, and since a study of intermodulation gives more information on the behaviour of an amplifier, linearity is studied in this thesis by analysing the amplitude and phase of IM components under varying signal conditions, i.e. as functions of temperature, modulation bandwidth and amplitude. To study the behaviour of IM components analytically, a Volterra model including electro-thermal distortion mechanisms is developed and a simulation technique is introduced to determine how easily the amplifier can be linearized. An S-parameter characterization method for extracting the Volterra model and the simulation model is developed, and the amplitude and phase dependences of the IM components are shown by means of measurements performed by a novel technique developed here. The results show that the behaviour of IM components is more complicated than had commonly been expected. Three techniques are developed for eliminating the frequency dependence of IM components, impedance optimization, envelope filtering and envelope injection. In the envelope injection technique, a low frequency envelope signal is added to the input of the amplifier in order to improve both the bandwidth and amplitude range of the memoryless predistortion. The functionality of envelope injection is demonstrated by Volterra calculations, simulations and measurements, and the technique is applied to 1W, 1.8 GHz common-emitter BJT and common-source MESFET amplifiers. IM cancellation better than 20 dB is achieved over a wide range of bandwidths and amplitudes. It is concluded that an inherently linear amplifier is not necessarily easy to linearize any further using external techniques, but that the part of the distortion that varies with bandwidth and amplitude can be cancelled out using envelope injection and the remaining memoryless distortion by means of a simple polynomial RF predistorter. This results in good cancellation of distortion, and since both envelope injection and RF predistortion consume little power, both good efficiency and linearity can be achieved.
25

Constant Conduction Angle Biasing for Class C Monolithic RF Power Amplifiers

Rai, Gursewak Singh 01 November 2012 (has links)
In modern wireless communication systems, a base station typically serves a few hundred users within its cell coverage. To combat the near-far problem – the situation where a nearby user’s strong cellular signal masks the cellular signal of a faraway user – base stations continually enforce power control. That is, nearby users must lower their transmit power. In CDMA technology, power control can be as large as 70-80dB. At low power outputs, this greatly impacts the performance of the RF power amplifier (PA) in the cellular device. For small RF drives, the magnitude of the output RF current approaches the magnitude of the DC current and thus the efficiency suffers. Operating the RF PA in class C operation improves the efficiency, but results in poor linearity. Several methods of so-called dynamic biasing have been proposed. These strategies entail lowering the bias of the PA as the RF drive increases. The proposed methods, however, fail to explain how to achieve linearity and low third-order intermodulation distortion. Additionally, the methods utilize open-loop implementations. This work presents a novel dynamic biasing topology that results in a much improved linear class C PA. The topology utilizes a closed loop that cleverly senses the operating conditions of the "power device." Particularly, the loop operates on the principle of keeping the conduction angle remarkably constant and thereby ensuring linearity. The work details a thorough design methodology that should provide assistance to a designer wanting to implement the topology in an RF integrated circuit. Agilent ADS simulations and laboratory results from a functional PCB prototype bring merit to the topology.
26

Výkonový zesilovač pro pásmo krátkých vln / Shortwave power amplifier

Fiala, Roman January 2016 (has links)
This master’s thesis describes RF power amplifier design. The designed amplifier has been built. The first three chapters outline basics about radio frequency amplifiers. The basic theory needed for amplifier implementation is also described there. In the fourth chapter the power amplifier is designed. The design is based on the theoretical knowledge. Complete amplifier contains RF preamplifier, power amplifier and filters. The OrCAD PSpice, Ansoft Designer SV and EAGLE programs have been used for the design and verification of some sections of circuits. Measurement results of the built amplifier are in the fifth chapter. This thesis contains also the draft for laboratory exercise.
27

Vysokofrekvenční výkonové zesilovače / RF Power Amplifiers

Hrazděra, Tomáš January 2012 (has links)
This work deals with high-frequency power amplifiers. In the theoretical part are briefly summarized the general characteristics and properties of particular working classes of amplifiers focusing on their efficiency. The next section is aimed on design of high-frequency power amplifier for 1296MHz band and its individual components. In this part is desribed design of hybrid combiners - splitters, directional couplers of the coupled lines, amplifiers with RA18H1213G module and power amplifier with transistor BLV958. The work also includes the results of simulations of designed circuit, realization procedure and the measured parameters of manufactured components. In conclusion of this work the theoretical and measured values are compared.
28

Improved RF Power Extraction from 1.55um GE-on-SOI PIN Photodiodes with Load Impedance Optimization

Huard, Andrew L 01 June 2010 (has links) (PDF)
VLSI miniaturization has created the need for high-density, low-cost, monolithically-integrated optical interconnects. High output power photodetectors are needed to directly drive load circuitry, which improves the noise performance and dynamic range of optical communications links by eliminating a post amplifier stage. Elimination of the post amplifier also reduces circuit cost and complexity. A new Si-Ge PIN waveguide photodiode with 31GHz bandwidth and 93% quantum efficiency at 1550nm has been developed by Yin et al., which was fabricated using standard CMOS processes on a Silicon substrate. This thesis demonstrates a method for improving the RF power extraction from these photodiodes by increasing the impedance of the load. An RF output power improvement of 5.5dB is obtained by increasing the load resistance from 50 ohms to 177 ohms with 15MHz modulation. The maximum obtainable RF power of all devices tested using 50 ohm and 100 ohm loads at 15MHz is 15.73dBm and 17.83dBm, respectively. The maximum obtainable RF power using a 177 ohm load for all devices tested is 17.67dBm, which is slightly smaller than that obtained with a 100 ohm load. A measurement procedure for RF power extraction at microwave frequencies is also described. Quarter-wavelength 70.71 ohm thin film coplanar waveguides are designed to transform 50 ohms to a higher impedance of 100 ohms for measurements of improved RF power extraction at 3GHz and 7GHz.
29

Design of Power Efficient Power Amplifier for B3G Base Stations.

Hussaini, Abubakar S., Gwandu, B.A.L., Abd-Alhameed, Raed, Rodriguez, Jonathan 11 November 2010 (has links)
Yes / Fourth generation systems require the use of both amplitude and phase modulation to efficiently utilize the available spectrum and to obtain high data rates, hence imposing stringent requirements on the power amplifier in terms of efficiency and linearity and requires the power amplifier to operate linearly and efficiently. The B3G base station transceiver Doherty power amplifier was designed to operate over the frequency range of 3.47GHz to 3.53GHz mobile WiMAX band using Freescale¿s N-Channel Enhancement-Mode Lateral MOSFET Transistor, MRF7S38010HR3; The performances of the Doherty amplifier are compared with that of the conventional Class AB amplifier. The results of 43 dBm output power and 66% power added efficiency are achieved.
30

CMOS linear RF power amplifier with fully integrated power combining transformer / Um amplificador de potência RFCMOS linear com combinador de potência totalmente integrado

Guimarães, Gabriel Teófilo Neves January 2017 (has links)
Este trabalho apresenta o projeto de um amplificador de potência (PA) de rádio-frequência (RF) linear em tecnologia complementar metal-oxido silício (CMOS). Nele são analisados os desafios encontrados no projeto de PAs CMOS assim como soluções encontradas no estado-da-arte. Um destes desafios apresentados pela tecnologia é a baixa tensão de alimentação e passivos com alta perda, o que limita a potência de saída e a eficiência possível de ser atingida com métodos tradicionais de projeto de PA e suas redes de transformação de impedância. Este problema é solucionado através do uso de redes de combinação de impedância integradas, como a usada neste trabalho chamada transformador combinador em série (SCT). Os problemas com o uso de tecnologia CMOS se tornam ainda mais críticos para padrões de comunicação que requerem alta linearidade como os usados para redes sem-fio locais (WLAN) ou padrões de telefonia móvel 3G e 4G. Tais protocolos requerem que o PA opere em uma potência menor do que seu ponto de operação ótimo, degradando sua eficiência. Técnicas de linearização como pré-distorção digital são usadas para aumentar a potência média transmitida. Uma ténica analógica de compensação de distorção AM-PM através da linearização da capacitância de porta dos transistores é usada neste trabalho. O processo de projeto é detalhado e evidencia as relações de compromisso em cada passo, particularmente o impacto da terminação de harmônicos e a qualidade dos passivos na rede de transformação de carga. O projeto do SCT é otimizado para sintonia da impedância de modo comum que é usada para terminar o segundo harmonico de tensão do amplificador. O amplificador projetado tem um único estágio devido a área do chip ser limitada a 1:57 x 1:57 mm2, fato que impacta seu desempenho. O PA foi analisado através de simulação numérica sob várias métricas. Ele atinge uma potência máxima de saída de 24:4 dBm com uma eficiência de dreno de 24:53% e Eficiência em adição de potência (PAE) de 22%. O PA possui uma curva de ganho plana em toda faixa ISM de 2.4 GHz, com magnitude de 15:8 0:1dB. O PA tem um ponto de compressão de OP1dB = 20:03 dBm e o sinal tem um defasamento não-linear de = 1:2o até esta potência de saída. Um teste de intermodulação de dois tons com potência 3dB abaixo do OP1dB tem como resultado uma relação entre intermodulação de terceira ordem e fundamental de IMD3 = 24:22 dB, e de quinta ordem inferior e superior e fundamental de IMD5Inferior = 48:16 dB e IMD5Superior = 49:8 dB. Por fim, mostra-se que o PA satisfaz os requerimentos para operar no padrão IEEE 802.11g. Ele atinge uma potência média de saída de 15:4 dBm apresentando uma magnitude do vetor erro (EVM) de 5:43%, ou 25:3 dB e satisfazendo a máscara de saída para todos os canais. / This work presents the design of a fully integrated Radio-frequency (RF) linear Power Amplifier( PA) in complementary metal-oxide silicon (CMOS) technology. In this work we analyse the challenges in CMOS PA design as well as the state-of-the-art solutions. One such challenge presented by this technology is the low supply voltage and high-loss passives, which pose severe limits on the output power and efficiency achieved with traditional PA design methods and load impedance transformation networks. This issue is addressed by the use of on-chip, highly efficient power combining networks such as the one in this work: A series combining transformer (SCT). The problem of using CMOS becomes even more critical for recent communications standards that require high transmitter linearity such as the ones used for wireless local area network (WLAN) or 3G and 4G mobile communications. This requirement is such that the PA operate at a high power back-off from its optimum operating point, degrading efficiency. To address this problem linearization techniques such as digital pre-distortion can be used in order to decrease the necessary power back-off. In this work an analog technique of AM-PM distortion compensation is used to linearize the capacitance at the input of the amplifier’s transistors and reduce this type of distortion that severely impacts the error vector magnitude (EVM) of the signal. The design process is detailed and aims to make evident the trade-offs of PA design and particularly the impact of harmonic termination and the quality of passives on the load transformation network, the series combining transformer design is optimized for common-mode impedance tuning used for 2nd harmonic termination. The circuit has only a single amplifying stage due to its area being limited to 1:57 x 1:57 mm2 and the design is very constrained by this fact. The PA simulated performance is analyzed under various metrics. It achieves a simulated maximum output power of 24:4 dBm with a drain efficiency of 24:53% and power added efficiency (PAE) of 22%. The PA has a very flat power gain of 15:8 0:1 dB throughout the 2.4 GHz industrial, scientific and medical (ISM) band and is unconditionally stable with 4:9. The PA has a compression point of OP1dB = 20:03 dBm and the signal has a non-linear phase shift of = 1:2o up to this output power. A two-tone intermodulation test with 3dB back-off from OP1dB has a ratio of third-order intermodulation to fundamental of IMD3 = 24:22 dB, and lower and upper fifth order intermodulation to fundamental of IMD5Lower = 48:16 dB and IMD5Upper = 49:8 dB. Finally the PA is shown to satisfy the requirements for operation within the institute of electrical and electronic engineers (IEEE) 802.11g standard. It achieves an average output power of 15:4 dBm while having an EVM of 5:43% or 25:3 dB while satisfying the output spectrum mask for all channels.

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