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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
41

High Frequency High-Efficiency Voltage Regulators for Future Microprocessors

Wei, Jia 27 September 2004 (has links)
Microprocessors in today's computers continue to get faster and more powerful. From the Intel 80X86 series to today's Pentium IV, CPUs have greatly improved in performance. Accordingly, their power consumption has increased dramatically [1][2]. An evolution began in power loss reduction when the high-performance Pentium processor was driven by a non-standard, less-than-5V power supply, instead of drawing its power from the 5V plane on the system board. In order to provide the power as quickly as possible, the voltage regulator (VR), a dedicated DC-DC converter, is placed in close proximity to power the processor. At first, VRs drew power from the 5V output of the silver box. As the power delivered through the VR increased so dramatically, it became no longer efficient to use the 5V bus. Then for desktop and workstation applications, the VR input voltage moved to the 12V output of the silver box. For laptop application, the VR input voltage range covers the battery voltage range and the adaptor voltage. In the meantime, microprocessors will run at very low voltage (sub 1V), and will consume up to 150A of current, and will have dynamics of about 400A/us. The current VR solution is the 12V-input multiphase interleaved buck converter. The switching frequency is around 300KHz. This approach has several limitations for the future. OSCON capacitor is one limitation due to its large ESR and ESL; the low switching frequency the second limitation and the large inductance is the third limitation. Analysis shows that the all-ceramic solution is a better solution than the OSCON solution when the VR switching frequency reaches 1MHz. However, the 12V-input multiphase buck converter suffers low efficiency at high switching frequency, which rules out a legitimate chance of the current VR topology benefiting from high switching frequency. The extreme duty cycle is the fundamental reason why the 12V-input multiphase buck converter is not suitable for future VRs. Employing the transformer concept can extend duty cycle, and therefore offer an opportunity to improve efficiency. The push-pull buck (PPB) converter is proposed as a solution. The efficiency is improved compared with the buck converter. Integrated magnetic techniques can be used to further improve the efficiency and simplify the implementation. The impact of transformer concept on transient response is analyzed. The PPB converter efficiency is still not satisfactory at 1MHz due to the switching loss. Switching loss being a barrier, soft switching is needed. The proposed soft-switched phase-shift buck (PSB) converter achieves soft switching for the top switches. Highly efficient power conversion is achieved at high switching frequency. The integrated magnetics makes the implementation concise and delivers good performance. Given that the PSB converter has good performance, the matrix-transformer phase-shift buck (MTPSB) converter is a simplified version of the four-phase PSB converter. The MTPSB converter trades off some performance with circuit complexity. This feature establishes itself as a very cost-effective solution for future VRs. The magnetic structure of the MTPSB converter is also very simple with the use of integrated magnetics. Mobile CPUs are used in laptop computers. They require very challenging power management. The challenges for a laptop VR are different from and greater than those for a desktop VR. A laptop VR needs to have high efficiency at both heavy load and light load, good transient response and small and light form-factor, and work well with the wide input voltage range. Future mobile CPUs demand very aggressive power. The current single-stage VR approach cannot provide a suitable solution for the future. The PSB converter has disadvantages in light-load efficiency and does not work well with wide input voltage range; therefore it is not a suitable solution for laptop VRs although it is still a suitable solution for desktop VRs. The two-stage approach solves the wide-input-voltage-range issue and improves efficiency at heavy load significantly. The intermediate bus voltage Vbus is a very important parameter impacting overall efficiency. There is not one optimal Vbus value for all load conditions. The heavier the load, the higher the optimal Vbus. Based on this fact, the ABVP control is proposed. Vbus is adaptively positioned according to the load current therefore optimal Vbus is achieved under most conditions. Experimental results verify the theoretical prediction. The ONP control is another control scheme proposed to improve the light-load efficiency. By selecting optimal number of phases based on mobile processor power states, the VR light-load efficiency is improved. Experimental results show the proof. The baby-buck concept is the third concept proposed to improve the very-light-load efficiency. By operating the baby-buck channel, the two-stage VR improves efficiency at very light load. The two-stage VR featuring the three proposed control schemes has much higher efficiency than the single-stage VR over a very wide load range; therefore the battery life is extended. The two-stage VR with the proposed control schemes is a good solution for future laptop VRs. The problem solving process in this work proves that good solutions in isolated converters can be modified to fit into the non-isolated application. Non-isolated converters and isolated converters are not two separated worlds. On the contrary, these two worlds have many things in common. Good concepts can be transplanted from one world to another with minor modification and many problems can be solved this way. Another proven point in this work is that sometimes the solution is a fundamental, such as the change of power delivery architecture. One should not be limited by what is available right now, and should think outside the box. Once a fundamental change is made, it is very beneficial to take full advantage of the change, as it provides new opportunities. / Ph. D.
42

High-Frequency and High-Performance VRM Design for the Next Generations of Processors

Yao, Kaiwei 29 April 2004 (has links)
It is perceived that Moore's Law will prevail at least for the next decade with the continuous advancement of processing technologies for integrated circuits. According to Intel's roadmap, over one billion transistors will be integrated in one processor by the year 2010; the processor's clock speed will approach 15 GHz; the core static currents will increase up to 200 A; the dynamic current slew rate will rise up to 250 A/ns; and the core voltage will decrease to 0.8 V. The rapid advancement of processor technology has posed stringent challenges to power management for both an efficient power delivery and an accurate voltage regulation. The primary objectives of this dissertation are to understand the fundamental limitations of the state-of-the-art solution for the power management, and hence to support possible solutions for meeting the power requirement of the next generations of processors. First, today's voltage-regulator module (VRM) design, which is based on the multiphase interleaving buck topology, is thoroughly analyzed. The analysis results of the control bandwidths versus the VRM transient voltage spikes highlight the trend of high-frequency VRM design for smaller size and faster transient response. Based on the concept of achieving constant VRM output impedance, design guidelines are proposed for different kinds of control methods. However, the high switching-related losses in the conventional multiphase buck converter limit its further applications. This dissertation proposes a series of new topologies in order to break through the barriers by applying an inductor-coupling or autotransformer structure to reduce the switching-related losses by extending the duty cycle. Then, this dissertation pushes the topology innovation further by introducing soft-switching quasi-resonant converters for the VRM design. The combination of the quasi-resonant and active-clamped concepts derives a family of new converters, which can eliminate all the switching and body-diode losses. The experimental results at 1-2MHz switching frequencies prove that the proposed solutions for the VRM design can realize very high efficiency and high power density. / Ph. D.
43

Any-Cap Low Dropout Voltage Regulator

January 2012 (has links)
abstract: Power management plays a very important role in the current electronics industry. Battery powered and handheld applications require novel power management techniques to extend the battery life. Most systems have multiple voltage regulators to provide power sources to the different circuit blocks and/or sub-systems. Some of these voltage regulators are low dropout regulators (LDOs) which typically require output capacitors in the range of 1's to 10's of µF. The necessity of output capacitors occupies valuable board space and can add additional integrated circuit (IC) pin count. A high IC pin count can restrict LDOs for system-on-chip (SoC) solutions. The presented research gives the user an option with regard to the external capacitor; the output capacitor can range from 0 - 1µF for a stable response. In general, the larger the output capacitor, the better the transient response. Because the output capacitor requirement is such a wide range, the LDO presented here is ideal for any application, whether it be for a SoC solution or stand-alone LDO that desires a filtering capacitor for optimal transient performance. The LDO architecture and compensation scheme provide a stable output response from 1mA to 200mA with output capacitors in the range of 0 - 1µF. A 2.5V, 200mA any-cap LDO was fabricated in a proprietary 1.5µm BiCMOS process, consuming 200µA of ground pin current (at 1mA load) with a dropout voltage of 250mV. Experimental results show that the proposed any-cap LDO exceeds transient performance and output capacitor requirements compared to previously published work. The architecture also has excellent line and load regulation and less sensitive to process variation. Therefore, the presented any-cap LDO is ideal for any application with a maximum supply rail of 5V. / Dissertation/Thesis / M.S. Electrical Engineering 2012
44

Automatic Sound Level System : Constant volume at all times / Automatisk Ljudsystemsregulator

Röing, Jacob, Zheng, Martin January 2019 (has links)
Studies have shown that music has plenty of positive effects on performances in working environments. The purpose of this project was to reap those benefits by developing a prototype that could automatically adjust the volume of a speaker. The prototype was also able to measure the total sound level in the surrounding environment. It would then regulate the speaker’s sound level in accordance with the measured sound and a desired volume set by the user. The main focus was to measure, filter and calibrate sound and to develop a regulatory system that could control the volume of the sound system. The final prototype had a user interface with an LCDdisplay and buttons. It had the ability to successfully measure the sound and its amplitude. Calibration of the sound sensor was done using two reference microphones. Measurements at eight different sound levels were taken. A model to convert the digital signal into decibels was then calculated through linear regression with a standard error of 2.9 dB. With this model the prototype could automatically adjust the volume of a Marshall Kilburn speaker to the desired level of 90 dB in approximately 40 seconds. It was found that the largest limiting factor was the sensor’s ability to pick up different sound sources at longer distances from the sensor. Further work may include optimizing the microphone and making an integrated product that can be applied to any sound system. / Studier har visat att musik har mycket positiv påverkan på effektivitet i arbetsmiljöer. Syftet med detta projekt var att lyfta fram dessa fördelar genom att utveckla en prototyp med förmågan att automatiskt reglera volymen av en högtalare. Tanken var att prototypen skulle kunna reglera högtalarens volym i enlighet med den uppmätta ljudvolymen och en önskad volym angiven av användaren. Huvudfokus var att mäta, filtrera och kalibrera ljud samt att utveckla en regulator med möjlighet att kontrollera volymen av ljudsystemet. Slutprototypen hade ett användargränssnitt med en LCDskärm och knappar. Den hade möjlighet att framgångsrikt mäta ljudet och dess amplitud. Kalibrering av ljudsensorn genomfördes med hjälp av två referensmikrofoner och uppmätning med dessa gjordes vid åtta olika ljudnivåer. En modell för konvertering av digitala signalen till decibel beräknades genom linjär regression med ett standardfel på 2,9 dB. Utifrån denna modell kunde prototypen automatiskt justera volymen på en högtalare av typen Marshall Kilburn. Detta gjordes på 40 sekunder då önskade volymen sattes till 90 dB. Den största begränsningen var ljudsensorns förmåga att uppmäta ljud från ljudkällor som var placerade på längre avstånd från sensorn. Vidareutveckling sker lämpligtvis genom optimering av mikrofonen samt skapa en integrerad produkt som kan tillämpas på godtyckligt ljudsystem.
45

Transient Response Improvement For Multi-phase Voltage Regulators

Xiao, Shangyang 01 January 2008 (has links)
Next generation microprocessor (Vcore) requirements for high current slew rates and fast transient response together with low output voltage have posed great challenges on voltage regulator (VR) design . Since the debut of Intel 80X86 series, CPUs have greatly improved in performance with a dramatic increase on power consumption. According to the latest Intel VR11 design guidelines , the operational current may ramp up to 140A with typical voltages in the 1.1V to 1.4V range, while the slew rate of the transient current can be as high as 1.9A/ns [1, 2]. Meanwhile, the transient-response requirements are becoming stringer and stringer. This dissertation presents several topics on how to improve transient response for multi-phase voltage regulators. The Adaptive Modulation Control (AMC) is a type of non-linear control method which has proven to be effective in achieving high bandwidth designs as well as stabilizing the control loop during large load transients. It adaptively adjusts control bandwidth by changing the modulation gain, depending on different load conditions. With the AMC, a multiphase voltage regulator can be designed with an aggressively high bandwidth. When in heavy load transients where the loop could be potentially unstable, the bandwidth is lowered. Therefore, the AMC provides an optimal means for robust high-bandwidth design with excellent transient performance. The Error Amplifier Voltage Positioning (EAVP) is proposed to improve transient response by removing undesired spikes and dips after initial transient response. The EAVP works only in a short period of time during transient events without modifying the power stage and changing the control loop gain. It facilitates the error amplifier voltage recovering during transient events, achieving a fast settling time without impact on the whole control loop. Coupled inductors are an emerging topology for computing power supplies as VRs with coupled inductors show dynamic and steady-state advantages over traditional VRs. This dissertation first covers the coupling mechanism in terms of both electrical and reluctance modeling. Since the magnetizing inductance plays an important role in the coupled-inductor operation, a unified State-Space Averaging model is then built for a two-phase coupled-inductor voltage regulator. The DC solutions of the phase currents are derived in order to show the impact of the magnetizing inductance on phase current balancing. A small signal model is obtained based on the state-space-averaging model. The effects of magnetizing inductance on dynamic performance are presented. The limitations of conventional DCR current-sensing for coupled inductors are addressed. Traditional inductor DCR current sensing topology and prior arts fail to extract phase currents for coupled inductors. Two new DCR current sensing topologies for coupled inductors are presented in this dissertation. By implementation of simple RC networks, the proposed topologies can preserve the coupling effect between phases. As a result, accurate phase inductor currents and total current can be sensed, resulting in excellent current and voltage regulation. While coupled-inductor topologies are showing advantages in transient response and are becoming industry practices, they are suffering from low steady-state operating efficiency. Motivated by the challenging transient and efficiency requirements, this dissertation proposes a Full Bridge Coupled Inductor (FBCI) scheme which is able to improve transient response as well as savor high efficiency at (a) steady state. The FBCI can change the circuit configuration under different operational conditions. Its "flexible" topology is able to optimize both transient response and steady-state efficiency. The flexible core configuration makes implementation easy and clear of IP issues. A novel design methodology for planar magnetics based on numerical analysis of electromagnetic fields is offered and successfully applied to the design of low-voltage high power density dc-dc converters. The design methodology features intense use of FEM simulation. The design issues of planar magnetics, including loss mechanism in copper and core, winding design on PCB, core selections, winding arrangements and so on are first reviewed. After that, FEM simulators are introduced to numerically compute the core loss and winding loss. Consequently, a software platform for magnetics design is established, and optimized magnetics can then be achieved. Dynamic voltage scaling (DVS) technology is a common industry practice in optimizing power consumption of microprocessors by dynamically altering the supply voltage under different operational modes, while maintaining the performance requirements. During DVS operation, it is desirable to position the output voltage to a new level commanded by the microprocessor (CPU) with minimum delay. However, voltage deviation and slow settling time usually exist due to large output capacitance and compensation delay in voltage regulators. Although optimal DVS can be achieved by modifying the output capacitance and compensation, this method is limited by constraints from stringent static and dynamic requirements. In this dissertation, the effects of output capacitance and compensation network on DVS operation are discussed in detail. An active compensator scheme is then proposed to ensure smooth transition of the output voltage without change of power stage and compensation during DVS. Simulation and experimental results are included to demonstrate the effectiveness of the proposed scheme.
46

Cascaded Linear Regulator with Positive Voltage Tracking Switching Regulator

Nghe, Brandon K 01 May 2020 (has links) (PDF)
This thesis presents the design, simulation, and hardware implementation of a proposed method for improving efficiency of voltage regulator. Typically, voltage regulator used for noise-sensitive and low-power applications involves the use of a linear regulator due to its high power-supply rejection ratio properties. However, the efficiency of a linear regulator depends heavily on the difference between its input voltage and output voltage. A larger voltage difference across the linear regulator results in higher losses. Therefore, reducing the voltage difference is the key in increasing regulator’s efficiency. In this thesis, a pre switching regulator stage with positive voltage tracking cascaded to a linear regulator is proposed to provide an input voltage to a linear regulator that is slightly above the output of the linear regulator. The tracking capability is needed to provide the flexibility in having different positive output voltage levels while maintaining high overall regulator’s efficiency. Results from simulation and hardware implementation of the proposed system showed efficiency improvement of up to 23% in cases where an adjustable output voltage is necessary. Load regulation performance of the proposed method was also overall better compared to the case without the output voltage tracking method.
47

Irrigation management effects on nitrate leaching and mowing requirements of tall fescue

Chabon, Joshua D. January 1900 (has links)
Master of Science / Department of Horticulture, Forestry, and Recreation Resources / Dale J. Bremer / Jack D. Fry / Irrigation management may influence nitrate leaching under tall fescue (Festuca arundinacea) and also affect its mowing requirements. Two experiments were conducted on tall fescue growing on a Chase silt loam soil near Manhattan, Kansas. Each experiment was arranged in a split-plot design, with irrigation treatments applied to whole plots: 1) frequency-based irrigation, water was applied three times weekly to deliver a total of 19 mm water wk⁻¹ regardless of weather conditions; and 2) soil moisture sensor (SMS)--based irrigation, 34 mm of water was applied when soil dried to a predetermined threshold. In the first experiment, sub-plots consisted of unfertilized turf, and N applied as urea or polymer-coated urea at 122 and 244 kg ha⁻¹ yr⁻¹. Suction lysimeters at a 0.76 m depth were used to extract nitrate leachate bi-monthly. Turf quality was rated weekly. In the second experiment, subplots were mown at 5.1 cm or 8.9 cm, based upon the 1/3 rule, with or without monthly applications of the growth regulator trinexapac-ethyl (TE). Data were collected on total mowings and visual turf quality. Soil moisture sensor-based irrigation resulted in water savings of 32 to 70% compared to frequency-based irrigation. Leaching levels did not exceed 0.6 mg L⁻¹ and no differences in leaching were observed between irrigation treatments or among N sources. All fertilized turf had acceptable quality throughout the study. In the second experiment, irrigation strategy did not influence total number of mowings. In the first year, TE application reduced total mowings by 3 in tall fescue mowed at 5.1 cm, but only by 1.5 when mowed at 8.9 cm. In the second year, mowing at 8.9 vs. 5.1 cm or using TE vs. not resulted in a 9% reduction in total mowings each. The SMS-based irrigation saved significant amounts of water applied compared to frequency-based irrigation, while maintaining acceptable quality, but irrigation treatments did not affect nitrate leaching or mowing frequency in tall fescue on fine silt-loam soil. Nitrate leaching, regardless of amount, was well below the standards set for human health (10 mg L⁻¹). Applications of TE are more beneficial for turfgrass mowed at lower cutting heights.
48

Defoliation of Pima Cotton

Silvertooth, Jeff, Howell, Don R. 03 1900 (has links)
Afield study was conducted in Yuma County to evaluate the relative effects of a plant growth regulator application and several defoliation treatments on Pima cotton. There were no statistically significant effects recorded with regard to the plant growth regulator application. There was a significant difference among defoliation treatments by analysis of percent leaf drop estimates. Promising results were recorded for DROPP as a defoliant material for Pima cotton under the given test conditions.
49

Effect of Pix on Three Tall Statured Short Staple Cotton Varieties and One Short Statured Cotton Variety, in Graham County, 1987

Clark, Lee J., Cluff, Ronald E. 03 1900 (has links)
Four short staple cotton varieties were grown with and without an application of PIX to see its affect on their growth, maturity and yield. PIX is a plant growth regulator thatmodifies plant architecture, Two of the tall -statured varieties, Delta Pine 90 and Acala 1517-75, showed increases in lint yield of 5.8 and 13.7%, respectively, coupled with a hastening of their maturity. Stoneville 506, a short- statured, medium- maturing variety was unaffected by the plant growth regulator. A tall, gangly variety, Germains GC 365, was shortened in height and in maturity, but exhibited a small decrease in yield.
50

Changes in Free and Bound Auxin with Development of Squares and Bolls in Relation to Shedding

Guinn, Gene, Brummett, Donald L. 03 1900 (has links)
Hormone analyses were conducted to determine why large squares seldom shed while young bolls do. Large squares contained five times as much free auxin as flowers, and they contained 16 times as much bound auxin. The high auxin content of large squares is probably a major reason that they almost never shed unless injured (for example, by insects). Free and bound auxin both decreased to very low levels at flowering and remained low for four days thereafter. This low concentration of auxin at, and just after, flowering is probably a major reason that bolls are likely to shed during the week after flowering. Both free and bound auxin increased rapidly between 7 and 9 days after flowering, possibly accounting for the decrease in boll shedding rate at this stage of development. Amide-linked IAA was the major form of auxin in squares, whereas ester IAA (presumably bound to sugars) was the major form of auxin in bolls.

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