<p> The thesis presents an efficient self-adjoint approach to the S-parameter sensitivity analysis based on full-wave electromagnetic (EM) time-domain simulations with two commonly used numerical techniques: the finite-difference time-domain (FDTD) method and the transmission-line matrix (TLM) method. Without any additional simulations, we extract the response gradient with respect to all the design variables making use of the full-wave solution already generated by the system analysis. It allows the computation of the S-parameter derivatives as an independent post-process with negligible overhead. The sole requirement is the ability of the solver to export the field solution at user-defined points. Most in-house and commercial solvers have this ability, which makes our approach readily applicable to practical design problems.</p> <p> In the TLM-based self-adjoint techniques, we propose an algorithm to convert the electrical and magnetic field solutions into TLM voltages. The TLM-based discrete adjoint variable method (AVM) is originally developed to use incident and reflected voltages as the state variables. Our conversion algorithm makes the TLM-AVM method applicable to all time-domain commercial solvers, FDTD simulators included, with comparable accuracy and less memory overhead. Our approach is illustrated through waveguide examples using a TLM-based commercial simulator.</p> <p> Currently, our TLM-based self-adjoint approach is limited to loss-free homogeneous problems. However, our FDTD-based self-adjoint approach is valid for lossy inhomogeneous cases as well. The FDTD-based self-adjoint technique needs only the E-field values as the state variables. In order to make it also applicable to a TLM-based solver, whose mesh grid is displaced from the FDTD grid, we interpolate the E-field solution from the TLM mesh to that on the FDTD mesh. Our FDTD-based approach is validated through the response derivatives computation with respect to both shape and constitutive parameters in waveguide and antenna structures. The response derivatives can be used not only to guide a gradient-based optimizer, but also to provide a sufficient good initial guess for the solution of nonlinear inverse problems.</p> <p> Suggestions for further research are provided.</p> / Thesis / Master of Applied Science (MASc)

Two methods of dielectric characterization are presented that offer quick and cost-effective solutions for screening complex dielectric material properties. Through Direct-Print Additive Manufacturing (DPAM) methods, a dielectric material of choice is dispensed into a capacitor structure and characterized through 1-port s-parameter measurements. The presented methods use fixtures that are modeled and validated through simulation then implemented in practice. Advanced simulations are performed to gain insights which are used to optimize the dielectric characterization performance of the fixtures. Additional investigations are performed which investigate the durability of the fixture and material within by exposing the combination to rough environmental conditions for an extended duration. The presented capacitor structures are investigated to characterize dielectric materials within the bandwidth of 0.1-15 GHz, saving the time and effort required in using multiple dielectric characterization methods that cover the same bandwidth. Both methods are compared based on the results for each method achieved in practice while considering the process required perform each method. The pros and cons of the presented characterization methods are weighed which highlights the key aspects for successfully characterizing dielectric materials with each method as well as revealing the potential limitations associated with each.

Η ανάγκη για ολοκληρωμένα κυκλώματα που λειτουργούν σε υψηλές συχνότητες/ταχύτητες πηγάζει από το γεγονός ότι οι τηλεπικοινωνιακές εφαρμογές νέας γενιάς βασίζονται στη μετάδοση και τη λήψη δεδομένων με πολύ μεγάλους ρυθμούς. Οι υλοποιήσεις των εφαρμογών αυτών σε τεχνολογίες πυριτίου παρουσιάζουν μεγάλες σχεδιαστικές προκλήσεις. Στα πλαίσια της παρούσης διδακτορικής διατριβής, έχοντας κατά νου τις παραπάνω προκλήσεις, αρχικά παρουσιάζεται μια αναλυτική διαδικασία για την εξαγωγή των παραμέτρων μετάδοσης διαφορικών γραμμών μεταφοράς υλοποιημένων σε τεχνολογία πυριτίου. Η μέθοδος αυτή βασίζεται στη χρήση των παραμέτρων σκέδασης μεικτού ρυθμού και έχει το πλεονέκτημα ότι εξάγει τα χαρακτηριστικά των διαφορικών γραμμών μεταφοράς χωρίς τη χρήση επαναληπτικών μεθόδων. Ένα άλλο θέμα που πραγματεύεται η παρούσα διατριβή είναι μια μεθοδολογία βαθμονόμησης (calibration) για την αύξηση της ακρίβειας ηλεκτρομαγνητικού εξομοιωτή στην εξαγωγή των παραμέτρων που έχουν παθητικά στοιχεία (γραμμές μεταφοράς και σπειροειδείς επαγωγοί υλοποιημένα σε τεχνολογία πυριτίου). Οι δύο παραπάνω μεθοδολογίες χρησιμοποιήθηκαν για τη σχεδίαση και την υλοποίηση πλήρως διαφορικού κατανεμημένου ταλαντωτή ελεγχόμενου από τάση σε τεχνολογία πυριτίου 0.35μm SiGe BiCMOS. Για τη ρύθμιση της συχνότητας χρησιμοποιείται η τεχνική της μεταβολής καθυστέρησης με την αρωγή θετικής ανάδρασης. Η συνεισφορά της παρούσης διδακτορικής διατριβής είναι ότι ο παραπάνω ταλαντωτής είναι ο πρώτος πλήρως ολοκληρωμένος κατανεμημένος διαφορικός ταλαντωτής. / The demand for high speed/high frequency integrated circuits stems from the fact that modern communication applications require high bit rate data transfer. The implementations of these applications on silicon based technologies impose several design challenges. This dissertation tries to address some of these issues. First, we propose a direct parameter extraction procedure for the case of symmetrical differential transmission lines. This method is based on the mixed-mode S-parameter theory and its main advantage is the fact that it doesn’t use any kind repetitive algorithms. Another issue that this dissertation addresses is a calibration methodology for the augmentation of the parameter extraction accuracy of high frequency passive elements (transmission lines and spiral inductors) when an electromagnetic simulator is used. The abovementioned methodologies were utilized in the design and implementation of a fully integrated differential distributed voltage controlled oscillator in a 0.35 μm SiGe BiCMOS technology. As a frequency tuning technique the delay variation by positive feedback is used. The main contribution of this dissertation is the fact that this oscillator is the first fully integrated differential distributed oscillator.

Les applications microélectroniques telles que les communications sans fil ou les radars nécessitent des traitements d’information avec des débits ou des résolutions de plus en plus élevés. Cela implique de travailler à des fréquences millimétriques voir sub-millimétriques. Grâce aux progrès des technologies silicium, des circuits intégrés travaillant dans les gammes de fréquences millimétriques émergent mais souffrent d'un manque de solution de caractérisation complète. Par exemple, il n’existe à ce jour aucun analyseur vectoriel de réseaux commercial qui soit capable de mesurer les paramètres S dans la bande G (140-220 GHz) en 4 ports. La caractérisation classique des circuits millimétriques en n ports (avec n>2) consiste alors à utiliser un analyseur vectoriel de réseaux 2 ports et à adapter les autres ports non utilisés à 50Ω. Par permutation circulaire, on arrive ainsi à extraire la matrice S d’un dispositif à n ports (avec n>2). Ce protocole de mesure est très long et délicat à mettre en place car il nécessite d’une part un investissement en appareil de mesure très couteux aux fréquences millimétriques et d’autre part de mettre en œuvre des méthodes de calibrage et de de-embedding précises et dédiées.Le travail développé dans le cadre de cette thèse a visé à intégrer dans la puce, des systèmes de caractérisation petits signaux (paramètres S) au plus près du Dispositif Sous Test (DST). Le fait d’être au plus près du DST permet de réduire les pertes d’insertion, de réduire l’amplitude des vecteurs d’erreurs et donc les erreurs résiduelles après calibrage. Par ailleurs, il est possible de mieux contrôler la puissance du signal envoyé et de considérer des méthodes de calibrage utilisant des charges intégrées, ce qui permet de réduire le temps de traitement et le cout. La technologie utilisée est la technologie SiGe BiCMOS 55 nm développée par la société STMicroelectronics, technologie particulièrement adaptée aux circuits en bande millimétrique. La solution développée dans cette thèse consiste à connecter le wafer avec des pointes de mesure qui amènent un signal hyperfréquence balayant le spectre 35-55 GHz. Une fois dans la puce, ce signal hyperfréquence est quadruplé en fréquence et amplifié afin d’atteindre des niveaux de puissance suffisant (bon rapport Signal/bruit) dans la bande G aux bornes du DST. Les paramètres de réflexion (S11 et S22) sont ensuite extraits grâce à deux coupleurs très directifs, placés sur l’entrée et la sortie du DST respectivement. Les sorties du coupleur sont ensuite ramenées en basse fréquence (0.5GHz < IF < 2.4 GHz) par l’intermédiaire de mélangeurs de fréquence.L’approche choisie est argumentée en se basant sur une étude des systèmes de mesures existant présentée dans la première partie de ce manuscrit. Puis la conception et la caractérisation de chacun des blocs composant le système sont détaillées : le quadrupleur de fréquence en bande G (constitué d’un doubleur de fréquence en bande W cascadé avec un doubleur de fréquence en bande G), le transfert switch en bande G permettant de commuter entre l’entrée et la sortie du DST, le coupleur directif à ondes lentes, les mélangeurs permettant de ramener les mesures en basse fréquence, etc…. Une fois tous les différents blocs présentés, le manuscrit aborde les deux systèmes de mesure conçus. Un premier système un port a été développé pour valider cette approche. Le second système conçu permet de mesurer un DST à deux ports (HBT). Ce second système conserve l’architecture hétérodyne du premier, intégrant en plus un transfert switch en bande G qui dirige le signal incident vers l’un des deux ports du DST. / Microelectronic applications such as wireless communications, radar or space detections require higher data rate resolutions, implying the use of millimeter wave and submillimeter frequencies. Thanks to the silicon technologies improvement, some microelectronic circuits are emerging working in the frequency range of 140-220 GHz (G-band) but they suffer from a lack of complete characterization tools involving costly investment. For example, there is currently no commercial vectorial network analyser (VNA) that can measure S parameters in the 4-ports G-band. The classical characterization of millimeter wave circuits in n ports (with n> 2) consists in using a vectorial analyzer of 2-ports networks and matching the other unused ports to 50Ω. By circular permutation, one thus manages to extract the S matrix from a device with n ports (with n> 2). This set up induces very long and difficult measurements and it requires on the one hand some very expensive measuring equipment at millimeter frequencies and on the other hand to implement accurate and dedicated calibration and de-embedding methods.Therefore, the work developed into this PhD study aimed to integrate in the die the measurement systems that would measure small signals "S-parameters" of the device under test (DUT). Being closer to the DST makes it possible to reduce the insertion losses, to reduce the amplitude of the error vectors and thus the residual errors after calibration. Moreover, it is possible to better control the power of the signal sent and to consider calibration methods using integrated loads, which reduces the time and cost processing. The technology used is the SiGe BiCMOS 55 nm technology developed by STMicroelectronics, a technology dedicated to RF and millimeter wave’s circuits.The system developed is a 1-port system. The solution developed consists on connecting the wafer with some probes and driving it with an external signal that spans the 35-55 GHz band. Once into the die, this signal is then quadrupled in frequency and amplified to reach good power level in G band at the DUT inputs. Some S-parameters (S11 and S22) are extracted from the DUT thanks to some very directive couplers designed respectively at the input and at the output of the DUT. The outputs of the couplers are then converted to low frequencies (IF =0.5-2.4 GHz) through passive frequency mixers.In a first part of the thesis manuscript, the way to work is argued, supported by a study of the state of the art concerning the measurement systems. Then, design and characterization of each blocks of the system are detailed: the frequency quadrupler in G band (composed of a W band frequency doubler, followed with a G band frequency doubler), the fully integrated transfer switch in G-band allowing driving the millimeter waves signal to the DUT input or to the DUT output, the directive couplers based on the slow wave lines, the frequency mixers used to bring back the results in base band frequency, etc… All the different blocks detailed, the measurement systems can be introduced. A first system, a one-port measurement system, has been designed as a proof of concept. Once the approach validated, a second system, two-ports measurement system, has been developed presenting an heterodyne architecture and a transfer switch in G band driving the input signal toward the DUT input or output.

Amorphous and polycrystalline microwires cast from ferromagnetic Fe-based or Co-based alloys in glass envelope demonstrate unique magneto-anisotropic and high frequency impedance properties that make them very attractive for sensor applications. Magnetic anisotropies of different types result from the inverse magnetostriction effect (positive or negative) at the interface between the glass shell and the metal core, in the presence of the residual stresses induced during the Taylor-Ulitovski casting method. Therefore, the glass shell is not just isolation, but also is one of most important factors that defines the physical properties of microwires. In particular, magnetic anisotropy allows high frequency impedance to be tuned by external stimuli such as magnetic field, tensile stress, or temperature. In the project, these effects are explored for the creation of low density microwire inclusions that might introduce tuneable microwave properties to polymer composite materials. The project aims to study high frequency impedance effects in ferromagnetic wires in the presence of tensile stress, temperature, and magnetic field. The integration of microwave equipment with mechanical and thermal measurement facilities is a very challenging task. In the project, we develop new experimental techniques allowing comprehensive study of composite materials with electromagnetic functionalities. The wire surface impedance recovered from such measurements can then be used to model the microwave response from wire-filled composites in free space. The obtained results significantly expand the horizon of potential applications of ferromagnetic wires for structural health monitoring.

Ces travaux de thèse portent sur l’étude des solutions innovantes de caractérisation destinées à l’amélioration de la précision du schéma équivalent petit signal à des fréquences d’ordre millimétrique. Après un état de l’art dans ce domaine et suite à plusieurs caractérisations au niveau composant, une nouvelle structure de test “nouvelle approche” est conçue, réalisée et caractérisée. Cette approche est basée sur une nouvelle méthode d’extraction du schéma équivalent petit signal à partir d’une structure adaptée. Cette méthode réalise une adaptation des impédances du transistor sous test aux impédances des équipements de mesure. Comme résultats, la transmission du signal entre la source et le composant sous test ainsi que la précision de la mesure des paramètres extraits sont améliorés. La méthode développée permet la validation des modèles compacts des composants fabriqués en technologie BiCMOS 0.25μm au niveau circuit. Les mesures réalisées ont montré une bonne amélioration de l’extraction entre un transistor sous test seul et un transistor sous test adapté. La méthode d’investigation proposée permet l’extraction des modèles à des très hautes fréquences avec une meilleure précision. Cette thèse ouvre donc des perspectives pour la caractérisation en bande millimétrique notamment caractérisation des structures adaptées en impédances et de méthodes de de-embedding dédiées à ces dernières. / This thesis deals with the study of innovative solutions for small signal characterization at millimeter wave frequency. After a state of the art in this field and following to several characterizations at device level, a new test structure “new approach” is designed, fabricated, and characterized. The approach of characterizing at circuit level is based on a new method to extract the small signal equivalent circuit using matched test structures. This method proposed here makes the DUT impedances carefully match the characteristic impedances of the measurement equipment. In results, the transmission of the signal from the source to the DUT is improved while the parameters extraction accuracy is improved. The developed method enables the BiCMOS 0.25μm compact models validation in circuit level in mm-Wave band and enables accurate parameter extraction in a narrow band at higher frequencies. The verification results demonstrated that the new test structure significantly outperformed the conventional method in measurement accuracy specifically in very high frequency. Some aspects of the matched test structure could be subject of further investigation. In particularly topics such as, characterization over multiple test structure geometries and deembedding test structure losses.

The growing interest in high speed and RF technologies assert for the importance of reliability characterization beyond the conventional DC methodology. In this work, the influence of bias temperature instability (BTI) stress on RF small signal parameters is shown. The correlation between degradation of DC and RF parameters is established which enables the empirical modelling of stress induced changes. Furthermore, S-Parameters characterization is demonstrated as the tool to qualitatively distinguish between HCI and BTI degradation mechanisms with the help of extracted small signal gate capacitances.

No description available.

Объектом исследования являются качественные характеристики фруктов и овощей. Цель работы – разработать методику неразрушающего определения качественных характеристик фруктов и овощей. В данной работе представлены неразрушающие методы определения качественных характеристик различных фруктов и овощей. Все представленные методы используются для определения физических параметров фрукта или овоща, и затем соотношения их с качественными характеристиками, например, сортом или размером. В работе исследовались характеристики яблока при помощи метода измерения S-параметров. Представлены измерения коэффициента отражения яблока при помощи баночной антенны. Написана программа для определения сорта и размера яблок. Определение сорта происходит с высокой точностью. Актуальность данной работы заключается в том, что данная методика определения при должной доработке может использоваться на конвейере в целях сортировки яблок, данное применение позволит уменьшить затраты человеческого труда на сортировку, и позволит увеличить ее точность. / The object of the research is the qualitative characteristics of fruits and vegetables. The purpose of the work is to develop a method for non-destructive determination of the qualitative characteristics of fruits and vegetables. This paper presents non-destructive methods for determining the quality characteristics of various fruits and vegetables. All the methods presented are used to determine the physical parameters of a fruit or vegetable, and then correlate them with qualitative characteristics, such as variety or size. In the work, the characteristics of the apple were investigated using the method of measuring the S-parameters. Presented are measurements of the reflection coefficient of an apple using a can antenna. A program has been written to determine the variety and size of apples. The definition of the variety is carried out with high precision. The relevance of this work lies in the fact that this determination method, with proper refinement, can be used on the conveyor for sorting apples, this application will reduce the cost of human labor for sorting, and will increase its accuracy.

Modern technology needs and advancements have introduced various new concepts such as Internet-of-Things, electric automotive, and Artificial intelligence. This implies an increased activity in the electronics domain of analog and high frequency. Silicon devices have emerged as a cost-effective solution for such diverse applications. As these silicon devices are pushed towards higher performance, there is a continuous need to improve fabrication, power efficiency, variability, and reliability. Often, a direct trade-off of higher performance is observed in the reliability of semiconductor devices. The acceleration-based methodologies used for reliability assessment are the adequate time-saving solution for the lifetime's extrapolation but come with uncertainty in accuracy. Thus, the efforts to improve the accuracy of reliability characterization methodologies run in parallel. This study highlights two goals that can be achieved by incorporating high-frequency characterization into the reliability characteristics. The first one is assessing high-frequency performance throughout the device's lifetime to facilitate an accurate description of device/circuit functionality for high-frequency applications. Secondly, to explore the potential of high-frequency characterization as the means of scanning reliability effects within devices. S-parameters served as the high-frequency device's response and mapped onto a small-signal model to analyze different components of a fully depleted silicon-on-insulator MOSFET. The studied devices are subjected to two important DC stress patterns, i.e., Bias temperature instability stress and hot carrier stress. The hot carrier stress, which inherently suffers from the self-heating effect, resulted in the transistor's geometry-dependent magnitudes of hot carrier degradation. It is shown that the incorporation of the thermal resistance model is mandatory for the investigation of hot carrier degradation. The property of direct translation of small-signal parameter degradation to DC parameter degradation is used to develop a new S-parameter based bias temperature instability characterization methodology. The changes in gate-related small-signal capacitances after hot carrier stress reveals a distinct signature due to local change of flat-band voltage. The measured effects of gate-related small-signal capacitances post-stress are validated through transient physics-based simulations in Sentaurus TCAD.:Abstract Symbols Acronyms 1 Introduction 2 Fundamentals 2.1 MOSFETs Scaling Trends and Challenges 2.1.1 Silicon on Insulator Technology 2.1.2 FDSOI Technology 2.2 Reliability of Semiconductor Devices 2.3 RF Reliability 2.4 MOSFET Degradation Mechanisms 2.4.1 Hot Carrier Degradation 2.4.2 Bias Temperature Instability 2.5 Self-heating 3 RF Characterization of fully-depleted Silicon on Insulator devices 3.1 Scattering Parameters 3.2 S-parameters Measurement Flow 3.2.1 Calibration 3.2.2 De-embedding 3.3 Small-Signal Model 3.3.1 Model Parameters Extraction 3.3.2 Transistor Figures of Merit 3.4 Characterization Results 4 Self-heating assessment in Multi-finger Devices 4.1 Self-heating Characterization Methodology 4.1.1 Output Conductance Frequency dependence 4.1.2 Temperature dependence of Drain Current 4.2 Thermal Resistance Behavior 4.2.1 Thermal Resistance Scaling with number of fingers 4.2.2 Thermal Resistance Scaling with finger spacing 4.2.3 Thermal Resistance Scaling with GateWidth 4.2.4 Thermal Resistance Scaling with Gate length 4.3 Thermal Resistance Model 4.4 Design for Thermal Resistance Optimization 5 Bias Temperature Instability Investigation 5.1 Impact of Bias Temperature Instability stress on Device Metrics 5.1.1 Experimental Details 5.1.2 DC Parameters Drift 5.1.3 RF Small-Signal Parameters Drift 5.2 S-parameter based on-the-fly Bias Temperature Instability Characterization Method 5.2.1 Measurement Methodology 5.2.2 Results and Discussion 6 Investigation of Hot-carrier Degradation 6.1 Impact of Hot-carrier stress on Device performance 6.1.1 DC Metrics Degradation 6.1.2 Impact on small-signal Parameters 6.2 Implications of Self-heating on Hot-carrier Degradation in n-MOSFETs 6.2.1 Inclusion of Thermal resistance in Hot-carrier Degradation modeling 6.2.2 Convolution of Bias Temperature Instability component in Hot-carrier Degradation 6.2.3 Effect of Source and Drain Placement in Multi-finger Layout 6.3 Vth turn-around effect in p-MOSFET 7 Deconvolution of Hot-carrier Degradation and Bias Temperature Instability using Scattering parameters 7.1 Small-Signal Parameter Signatures for Hot-carrier Degradation and Bias Temperature Instability 7.2 TCAD Dynamic Simulation of Defects 7.2.1 Fixed Charges 7.2.2 Interface Traps near Gate 7.2.3 Interface Traps near Spacer Region 7.2.4 Combination of Traps 7.2.5 Drain Series Resistance effect 7.2.6 DVth Correction 7.3 Empirical Modeling based deconvolution of Hot-carrier Degradation 8 Conclusion and Recommendations 8.1 General Conclusions 8.2 Recommendations for Future Work A Directly measured S-parameters and extracted Y-parameters B Device Dimensions for Thermal Resistance Modeling C Frequency response of hot-carrier degradation (HCD) D Localization Effect of Interface Traps Bibliography