Five chapters of this dissertation concentrate on the characterization and cancellation of high frequency parasitic parameters in EMI filters. One chapter addresses the interaction between the power interconnects and the parasitic parameters in EMI filters. The last chapter addresses the characterization, evaluation and design of noise separators. Both theoretical and experimental analyses are applied to each topic. This dissertation tries to explore several important issues related to EMI filters and noise separators. The author wishes to find some helpful approaches to benefit the understanding and design of EMI filters. The contributions of the dissertation can be summarized below: 1) Identification of mutual couplings and their effects on EMI filter performance 2) Extraction of mutual couplings using scattering parameters 3) Cancellation of mutual couplings to improve EMI filter performance 4) Cancellation of equivalent series inductance to improve capacitor performance 5) Analysis of mode transformations due to the imperfectly balanced parameters in EMI filters 6) Analysis of interaction between power interconnects and EMI filters on filter high-frequency performance 7) Modeling and design of high-performance noise separator for EMI diagnosis 8) Identification of the effects of parasitics in boost PFC inductor on DM noise Although all topics are supported by both theory and experiments, there may still be some mistakes in the dissertation. The author welcomes any advice and comments. Please send them via email to shuowang@ieee.org. Thanks / Ph. D.

L’intégration de l’électronique dans des environnements sévères d’un point de vue électromagnétique a entraîné en contrepartie l’apparition de problèmes de compatibilité électromagnétique (CEM) entre les différents systèmes. Afin d’atteindre un niveau de performance satisfaisant, des tests de sécurité et de certification sont nécessaires. Ces travaux de thèse, réalisés dans le cadre du projet SIMUCEDO (SIMUlation CEM basée sur la norme DO-160), contribuent à la modélisation du test de qualification "Bulk Current Injection" (BCI). Ce test, abordé dans la section 20 dans la norme DO-160 dédiée à l’aéronautique, est désormais obligatoire pour une très grande gamme d’équipements aéronautiques. Parmi les essais de qualification, le test BCI est l’un des plus contraignants et consommateurs du temps. Sa modélisation assure un gain de temps, et une meilleure maîtrise des paramètres qui influencent le passage des tests CEM. La modélisation du test a été décomposée en deux parties : l’équipement sous test (EST) d’une part, et la pince d’injection avec les câbles d’autre part. Dans cette thèse, seul l’EST est pris en compte. Une modélisation "boîte grise" a été proposée en associant un modèle "boîte noire" avec un modèle "extensif". Le modèle boîte noire s’appuie sur la mesure des impédances standards. Son identification se fait avec un modèle en pi. Le modèle extensif permet d’étudier plusieurs configurations de l’EST en ajustant les paramètres physiques. L’assemblage des deux modèles en un modèle boîte grise a été validé sur un convertisseur analogique-numérique (CAN). Une autre approche dénommée approche modale en fonction du mode commun (MC) et du mode différentiel (MD) a été proposée. Elle se base sur les impédances modales du système sous test. Des PCB spécifiques ont été conçus pour valider les équations développées. Une investigation est menée pour définir rigoureusement les impédances modales. Nous avons démontré qu’il y a une divergence entre deux définitions de l’impédance de MC dans la littérature. Ainsi, la conversion de mode (ou rapport Longitudinal Conversion Loss : LCL) a été quantifiée grâce à ces équations. Pour finir, le modèle a été étendu à N-entrées pour représenter un EST de complexité industrielle. Le modèle de l’EST est ensuite associé avec celui de la pince et des câbles travaux réalisés au G2ELAB. Des mesures expérimentales ont été faites pour valider le modèle complet. D’après ces mesures, le courant de MC est impacté par la mise en œuvre des câbles ainsi que celle de l’EST. Il a été montré que la connexion du blindage au plan de masse est le paramètre le plus impactant sur la distribution du courant de MC. / Electronic equipments intended to be integrated in aircrafts are subjected to normative requirements. EMC (Electromagnetic Compatibility) qualification tests became one of the mandatory requirements. This PhD thesis, carried out within the framework of the SIMUCEDO project (SIMulation CEM based on the DO-160 standard), contributes to the modeling of the Bulk Current Injection (BCI) qualification test. Concept, detailed in section 20 in the DO-160 standard, is to generate a noise current via cables using probe injection, then monitor EUT satisfactorily during test. Among the qualification tests, the BCI test is one of the most constraining and time consuming. Thus, its modeling ensures a saving of time, and a better control of the parameters which influence the success of the equipment under test. The modeling of the test was split in two parts : the equipment under test (EUT) on one hand, and the injection probe with the cables on the other hand. This thesis focuses on the EUT modeling. A "gray box" modeling was proposed by associating the "black box" model with the "extensive" model. The gray box is based on the measurement of standard impedances. Its identification is done with a "pi" model. The model, having the advantage of taking into account several configurations of the EUT, has been validated on an analog to digital converter (ADC). Another approach called modal, in function of common mode and differential mode, has been proposed. It takes into account the mode conversion when the EUT is asymmetrical. Specific PCBs were designed to validate the developed equations. An investigation was carried out to rigorously define the modal impedances, in particular the common mode (CM) impedance. We have shown that there is a discrepancy between two definitions of CM impedance in the literature. Furthermore, the mode conversion ratio (or the Longitudinal Conversion Loss : LCL) was quantified using analytical equations based on the modal approach. An N-input model has been extended to include industrial complexity. The EUT model is combined with the clamp and the cables model (made by the G2ELAB laboratory). Experimental measurements have been made to validate the combined model. According to these measurements, the CM current is influenced by the setup of the cables as well as the EUT. It has been shown that the connection of the shield to the ground plane is the most influent parameter on the CM current distribution.

Accurate transistor models are important in wireless and microwave circuit design. Large-signal field-effect transistor (FET) models are generally extracted from current-voltage (IV) characteristics, small-signal S-parameters, and large-signal measurements. This dissertation describes improved characterization and measurement validation techniques for FET models that correctly account for thermal and trapping effects. Demonstration of a customized pulsed-bias, pulsed-RF S-parameter system constructed by the author using a traditional vector network analyzer is presented, along with the design of special bias tees to allow pulsing of the bias voltages. Pulsed IV and pulsed-bias S-parameter measurements can provide results that are electrodynamically accurate; that is, thermal and trapping effects in the measurements are similar to those of radio-frequency or microwave operation at a desired quiescent bias point. The custom pulsed S-parameter system is benchmarked using passive devices and advantages and tradeoffs of pulsed S-parameter measurements are explored. Pulsed- and continuous-bias measurement results for a high-power transistor are used to validate thermal S-parameter correction procedures. A new implementation of the steepest-ascent search algorithm for load-pull is presented. This algorithm provides for high-resolution determination of the maximum power and associated load impedance using a small number of measured or simulated reflection-coefficient states. To perform a more thorough nonlinear model validation, it is often desired to find the impedance providing maximum output power or efficiency over variations of a parameter such as drain voltage, input power, or process variation. The new algorithm enables this type of validation that is otherwise extremely tedious or impractical with traditional load-pull. A modified nonlinear FET model is presented in this work that allows characterization of both thermal and trapping effects. New parameters and equation terms providing a trapping-related quiescent-bias dependence have been added to a popular nonlinear ("Angelov") model. A systematic method for fitting the quiescent-dependence parameters, temperature coefficients, and thermal resistance is presented, using a GaN high electron-mobility transistor as an example. The thermal resistance providing a good fit in the modeling procedure is shown to correspond well with infrared measurement results.

La caractérisation des composants hyperfréquences après leur fabrication, est généralement réalisée par la mesure de paramètres S à l’aide d’un analyseur vectoriel de réseau (VNA). La précision de mesure dépend étroitement de la qualité du calibrage de l’analyseur vectoriel, qui permet de corriger les erreurs inhérentes au système de mesure. Des composants particuliers, dits étalons ou standards, dont les paramètres sont complètement ou partiellement connus, sont mesurés lors de la procédure de calibrage afin de déterminer les erreurs systématiques du système. La réalisation d’un circulateur coplanaire (les trois ports sont à 120 degrés les uns des autres) travaillant autour de 40 GHz est l’un des axes de recherche du laboratoire depuis plusieurs années et la caractérisation des prototypes a toujours été un souci important. Le calibrage est réalisé avec un kit commercial, avec les pointes positionnées en face à face. La mesure des dispositifs CPW à accès orthogonaux ou obliques après un calibrage avec un ensemble de standards conventionnels (droits) peut engendrer des erreurs supplémentaires. L’objectif de notre travail est donc de concevoir un ensemble de standards à accès inclinés à 120 degrés permettant de calibrer l’analyseur vectoriel « 2-ports » en positionnant directement les pointes à 120 degrés. La méthode de calibrage TRL (THRU – REFLECT - LINE) a été choisie. Le travail à accomplir se résume comme suit : - faire une étude de simulation du nouveau kit de calibrage à concevoir ; - mettre en évidence l’effet des accès coudés sur les lignes de transmission des standards ; - proposer une méthode de calcul qui tient compte de ces effets lors de la procédure de calibrage ; - mesurer quelques échantillons réalisés afin de vérifier la validité de la procédure de calibrage proposée. Les résultats obtenus au cours de ce travail ont pu être validés expérimentalement et offrent de nouvelles perspectives pour la mesure des composants planaires à accès non conventionnels / Microwave components characterization after the fabrication steps is usually performed by measuring S parameters using a Vector Network Analyzer (VNA). The measurement accuracy is highly dependent on the quality of the VNA calibration, which corrects the inherent errors in the measurement system. Specific components, called standards and whose parameters are completely or partially known, are measured during the calibration procedure to determine systematic errors of the system. Fabricating a coplanar circulator (the three ports are at 120 degrees position) functioning around 40 GHz is one of the laboratory’s research areas for several years and characterization of prototypes has always been a major concern. Usually, the calibration is made with a commercial kit ; probes are in face-to-face position. Measurements of CPW devices with orthogonal or bended accesses (120 degrees in our case) after VNA calibration with conventional (straight) set of standards may generate additional errors. The aim of our work is to design a set of standards with 120_ bended accesses allowing the calibration of the “2-ports” network analyzer. Therefore, probes are directly set at 120_ position. TRL (THRU - REFLECT -LINE) calibration procedure is chosen for the standards design. The work to be done is as follows : - to make a simulation study of the new calibration kit to design ; - to determine the bended accesses effects on the standards transmission lines ; - to propose a calculation method that takes account of these effects during the calibration procedure ; - to measure some fabricated samples to verify the validity of the proposed calibration procedure. The results of this research work have been experimentally validated and offer new perspectives for measuring planar components with unconventional accesses

The Internet of Things (IoT) has ushered in an age where low-power sensors generate data which are communicated to a back-end cloud for massive data computation tasks. From the hardware perspective this implies co-existence of several power-efficient sub-systems working harmoniously at the sensor nodes capable of communication and high-speed processors in the cloud back-end. The package-board system-level design plays a crucial role in determining the performance of such low-power sensors and high-speed computing and communication systems. Although there exist several commercial solutions for electromagnetic and circuit analysis and verification, problem diagnosis and design tools are lacking leading to longer design cycles and non-optimal system designs. This work aims at developing methodologies for faster analysis, sensitivity based diagnosis and multi-objective design towards signal integrity and power integrity of such package-board system layouts. The first part of this work aims at developing a methodology to enable faster and more exhaustive design space analysis. Electromagnetic analysis of packages and boards can be performed in time domain, resulting in metrics like eye-height/width and in frequency domain resulting in metrics like s-parameters and z-parameters. The generation of eye-height/width at higher bit error rates require longer bit sequences in time domain circuit simulation, which is compute-time intensive. This work explores learning based modelling techniques that rapidly map relevant frequency domain metrics like differential insertion-loss and cross-talk, to eye-height/width therefore facilitating a full-factorial design space sweep. Numerical results performed with artificial neural network as well as least square support vector machine on SATA 3.0 and PCIe Gen 3 interfaces generate less than 2% average error with order of magnitude speed-up in eye-height/width computation. Accurate power distribution network design is crucial for low-power sensors as well as a cloud sever boards that require multiple power level supplies. Achieving target power-ground noise levels for low power complex power distribution networks require several design and analysis cycles. Although various classes of analysis tools, 2.5D and 3D, are commercially available, the presence of design tools is limited. In the second part of the thesis, a frequency domain mesh-based sensitivity formulation for DC and AC impedance (z-parameters) is proposed. This formulation enables diagnosis of layout for maximum impact in achieving target specifications. This sensitivity information is also used for linear approximation of impedance profile updates for small mesh variations, enabling faster analysis. To enable designing of power delivery networks for achieving target impedance, a mesh-based decoupling capacitor sensitivity formulation is presented. Such an analytical gradient is used in gradient based optimization techniques to achieve an optimal set of decoupling capacitors with appropriate values and placement information in package/boards, for a given target impedance profile. Gradient based techniques are far less expensive than the state of the art evolutionary optimization techniques used presently for a decoupling capacitor network design. In the last part of this work, the functional similarities between package-board design and radio frequency imaging are explored. Qualitative inverse-solution methods common to the radio frequency imaging community, like Tikhonov regularization and Landweber methods are applied to solve multi-objective, multi-variable signal integrity package design problems. Consequently a novel Hierarchical Search Linear Back Projection algorithm is developed for an efficient solution in the design space using piecewise linear approximations. The presented algorithm is demonstrated to converge to the desired signal integrity specifications with minimum full wave 3D solve iterations.

Submitted by Renata Lopes (renatasil82@gmail.com) on 2017-04-20T17:56:56Z No. of bitstreams: 1 luisguilhermedasilvacosta.pdf: 5093972 bytes, checksum: 6380895e21a76520d3f4a10aad5a3371 (MD5) / Approved for entry into archive by Adriana Oliveira (adriana.oliveira@ufjf.edu.br) on 2017-04-24T16:50:02Z (GMT) No. of bitstreams: 1 luisguilhermedasilvacosta.pdf: 5093972 bytes, checksum: 6380895e21a76520d3f4a10aad5a3371 (MD5) / Made available in DSpace on 2017-04-24T16:50:02Z (GMT). No. of bitstreams: 1 luisguilhermedasilvacosta.pdf: 5093972 bytes, checksum: 6380895e21a76520d3f4a10aad5a3371 (MD5) Previous issue date: 2012-02-24 / Atualmente, há um grande interesse no desenvolvimento de transceptores PLC (power line communication) para a transmissão banda larga e banda estreita de dados visando, sobretudo, aplicações smart grids e de acesso banda larga. Para o avanço da tecnologia PLC, há grande demanda pela introdução de acopladores com características e desempenhos que viabilizem a conexão dos tranceptores PLC `as redes de energia elétrica, com o mínimo de distorção possível. Neste contexto, a presente contribuição versa sobre o estudo, a investigação, especificação, projeto e análise de acopladores capacitados para transceptores PLC SISO (single input single output) banda larga e banda estreita. Para tanto, são introduzidos acopladores PLC nas seguintes faixas de frequências: de 9 kHz `a 2 MHz, de 1,7 MHz `a 100 MHz e de 1,7 MHz `a 150 MHz. As análises dos projetos e dos protótipos dos acopladores, concebidos para operar nas referidas bandas, mostram as dificuldades encontradas para garantir que as especificações de projeto sejam atendidas quando os componentes passivos são comerciais e a faixa de frequência de operação do acoplador aumenta. Além disso, as análises confirmam a necessidade de consideração de técnicas de prototipação de placas de circuitos impresso para sinais de frequência elevada. Finalmente, os resultados de medição mostram que os acopladores para baixa frequência discutidos podem ser utilizados em sistemas de medição de canais PLC. / Currently, there is a great interest to develop power line communications (PLC) transceivers for broadband and narrowband data communications for smart grids and network access. However, for advancing PLC technologies, there is a great demand for introduction of couplers for connecting the PLC tranceivers to the electric energy circuits with minimum distortion. This contribution addresses the study, investigation, specification, design, and analysis of capacitive couplers for single input single output (SISO), broadband and narrowband PLC transceivers. Capacity and SISO PLC couplers covering the following frequencies bandwidth are addressed: from 9 kHz up to 2 MHz, from 1,7 MHz up to 100 MHz and from 1,7 MHz up to 150 MHz. The analysis performance of the designed and prototyped PLC couplers for operating in the aforementioned frequencies bandwidths, shows the inherent difficulties to guarantee that the design specifications are fulfilled when passive components are commercial ones and the frequency bandwidth increase. Additionally, the analysis confirms the need for taking into account advancing prototyping techniques for dealing with high-frequency signals. Finally, the measurements show that the discussed narrowband PLC couplers can be used in a PLC channel system.

La constante amélioration des technologies silicium permet aux transistors bipolaires à hétérojonction (HBT) SiGeC (Silicium-Germanium : Carbone) de concurrencer les composants III-V pour les applications millimétriques et sous-THz (jusqu’à 300GHz). Le cycle de développement de la technologie (caractérisation-modélisation-conception-fabrication) nécessite plusieurs itérations, entraînant des coûts élevés. De plus, les méthodologies de mesure doivent être réévaluées et ajustées pour adresser des fréquences plus élevées. Afin de réduire le nombre d’itérations et de permettre la montée en fréquence de la mesure, un travail de fond sur la première étape, la caractérisation, s’avère indispensable.Pour répondre à cette exigence, une description et une étude des instruments de mesure (VNA) est réalisée dans un premier temps. Un état de l’art des méthodes de calibrage permet de choisir la solution la plus pertinente pour la calibration sur puce valable dans la gamme de fréquences sous-THz. Ensuite, après avoir relevé plusieurs défauts dans la méthode choisie (à savoir la méthode Thru-Reflect-Line : TRL), des solutions sont proposées concernant la modification des calculs des coefficients d’erreur et également en modifiant les standards utilisés durant le calibrage. Finalement, une étude sur les méthodes d’épluchage est réalisée. Une amélioration est proposée par la modification de deux standards évitant le principal problème de l’état de l’art, la surcompensation des composants parasites. / The continuous improvement in Silicon technologies allows SiGeC (Silicon-Germanium-Carbon) heterojunction bipolar transistors (HBT) to compete with III-V components for millimeter wave and sub-THz (below 300GHz) applications. The technology development cycle (characterization, modeling, design and fabrication) needs several iterations resulting in high costs. Furthermore, the measurement methodologies need to be re-assessed and modified to address higher measurement frequencies. In order to reduce the number of iterations and to allow reliable measurement in the sub-THz band, the characterization procedure has been revisited.First, a description and investigation of the measurement instrument (VNA) has been made. After exploring all possible calibration methods, the best candidate for an “on-wafer” calibration for the sub-THz frequency range has been selected. Then, after analyzing the limits of the chosen calibration method (Thru-Reflect-Line: TRL), workarounds are proposed, by modification of the errors coefficients calculation and by changing the standards used during the calibration process. At last, a study concerning the de-embedding methods is carried out. It is shown, that using two new standards helps to reduce the over-compensation of parasitic components.

Medical devices have made a big step forward in the past decades. One of the most noticeable medical events of the twenties century was the development of long-lasting, wireless electronic implants such as identification tags, pacemakers and neuronal stimulators. These devices were only made possible after the development of small scale radio frequency electronics. Small radio electronic circuits provided a way to operate in both transmission and reception mode allowing an implant to communicate with an external world from inside a living organism. Bidirectional communication is a vital feature that has been increasingly implemented in similar systems to continuously record biological parameters, to remotely configure the implant, or to wirelessly stimulate internal organs. Further miniaturisation of implantable devices to make the operation of the device more comfortable for the patient requires rethinking of the whole radio system concept making it both power efficient and of high performance. Nowadays, high data throughput, large bandwidth, and long term operation requires new radio systems to operate at UHF (ultra-high frequency) bands as this is the most suitable for implantable applications. For instance, the MICS (Medical Implant Communication System) band was introduced for the communication with implantable devices. However, this band could only enable communication at low data rates. This was acceptable for the transmission of telemetry data such as heart beat rate, respiratory and temperature with sub Mbps rates. Novel developments such as neuronal and prosthetic implants require significantly higher data rates more than 10 Mbps that can be achieved with large bandwidth communicating systems operating at higher frequencies in a GHz range. Higher operating frequency would also resolve a strong issue of MICS devices, namely the scale of implants defined by dimensions of antennas used at this band. Operation at 2.4 GHz ISM band was recognized to be the most adequate as it has a moderate absorption in the human body providing a compromise between an antenna/implant scale and a total power efficiency of the communicating system. This thesis addresses a key challenge of implantable radio communicating systems namely an efficient and small scale antenna design which allows a high yield fabrication in a microelectronic fashion. It was demonstrated that a helical antenna design allows the designer to precisely tune the operating frequency, input impedance, and bandwidth by changing the geometry of a self-assembled 3D structure defined by an initial 2D planar layout. Novel stimuli responsive materials were synthesized, and the rolled-up technology was explored for fabrication of 5.5-mm-long helical antenna arrays operating in ISM bands at 5.8 and 2.4 GHz. Characterization and various applications of the fabricated antennas are successfully demonstrated in the thesis.

This thesis deals with design and implementation of digital beamformer for 3D radar. The text of this thesis contains derivation of beamforming algorithm and detailed description of it’s implementation on development kit with Cyclone V circuit. At the end of the thesis the beamformer design is verified and it’s further usage is discused.

The diploma thesis deals with metamaterial structures. Metamaterials are periodic structures, which have got permittivity or permeability, eventually both parameters, negative. Test is applied on three basic structures: Split Loop Array; Spiral Array a Double Spiral Array. For each structure is made dispersion diagram and are monitored S – parameters. Test is run in Ansoft High Frequency Structure Simulator and CST Microwave Studio software. Are monitored bandgaps and when structure is as left – handed medium or right – handed medium. Results are compared with results in literature.