Parallel programming presents an efficient solution to exploit future multicore processors. Unfortunately, traditional programming models depend on programmer’s skills for synchronizing concurrent threads, which makes the development of parallel software a hard and errorprone task. In addition to this, current synchronization techniques serialize the execution of those critical sections that conflict in shared memory and thus limit the scalability of multithreaded applications. Transactional Memory (TM) has emerged as a promising programming model that solves the trade-off between high performance and ease of use. In TM, the system is in charge of scheduling transactions (atomic blocks of instructions) and guaranteeing that they are executed in isolation, which simplifies writing parallel code and, at the same time, enables high concurrency when atomic regions access different data. Among all forms of TM environments, Hardware TM (HTM) systems is the only one that offers fast execution at the cost of adding dedicated logic in the processor. Existing HTMsystems suffer considerable delays when they execute complex transactional workloads, especially when they deal with large and contending transactions because they lack adaptability. Furthermore, most HTM implementations are ad hoc and require cumbersome hardware structures to be effective, which complicates the feasibility of the design. This thesis makes several contributions in the design and analysis of low-cost HTMsystems that yield good performance for any kind of TM program. Our first contribution, FASTM, introduces a novel mechanism to elegantly manage speculative (and already validated) versions of transactional data by slightly modifying on-chip memory engine. This approach permits fast recovery when a transaction that fits in private caches is discarded. At the same time, it keeps non-speculative values in software, which allows in-place x memory updates. Thus, FASTM is not hurt from capacity issues nor slows down when it has to undo transactional modifications. Our second contribution includes two different HTM systems that integrate deferred resolution of conflicts in a conventional multicore processor, which reduces the complexity of the system with respect to previous proposals. The first one, FUSETM, combines different-mode transactions under a unified infrastructure to gracefully handle resource overflow. As a result, FUSETM brings fast transactional computation without requiring additional hardware nor extra communication at the end of speculative execution. The second one, SPECTM, introduces a two-level data versioning mechanism to resolve conflicts in a speculative fashion even in the case of overflow. Our third and last contribution presents a couple of truly flexible HTM systems that can dynamically adapt their underlying mechanisms according to the characteristics of the program. DYNTM records statistics of previously executed transactions to select the best-suited strategy each time a new instance of a transaction starts. SWAPTM takes a different approach: it tracks information of the current transactional instance to change its priority level at runtime. Both alternatives obtain great performance over existing proposals that employ fixed transactional policies, especially in applications with phase changes.

Nowadays clusters are one of the most used platforms in High Performance Computing and most programmers use the Message Passing Interface (MPI) library to program their applications in these distributed platforms getting their maximum performance, although it is a complex task. On the other side, OpenMP has been established as the de facto standard to program applications on shared memory platforms because it is easy to use and obtains good performance without too much effort. So, could it be possible to join both worlds? Could programmers use the easiness of OpenMP in distributed platforms? A lot of researchers think so. And one of the developed ideas is the distributed shared memory (DSM), a software layer on top of a distributed platform giving an abstract shared memory view to the applications. Even though it seems a good solution it also has some inconveniences. The memory coherence between the nodes in the platform is difficult to maintain (complex management, scalability issues, high overhead and others) and the latency of the remote-memory accesses which can be orders of magnitude greater than on a shared bus due to the interconnection network. Therefore this research improves the performance of OpenMP applications being executed on distributed memory platforms using a DSM with sequential consistency evaluating thoroughly the results from the NAS parallel benchmarks. The vast majority of designed DSMs use a relaxed consistency model because it avoids some major problems in the area. In contrast, we use a sequential consistency model because we think that showing these potential problems that otherwise are hidden may allow the finding of some solutions and, therefore, apply them to both models. The main idea behind this work is that both runtimes, the OpenMP and the DSM layer, should cooperate to achieve good performance, otherwise they interfere one each other trashing the final performance of applications. We develop three different contributions to improve the performance of these applications: (a) a technique to avoid false sharing at runtime, (b) a technique to mimic the MPI behaviour, where produced data is forwarded to their consumers and, finally, (c) a mechanism to avoid the network congestion due to the DSM coherence messages. The NAS Parallel Benchmarks are used to test the contributions. The results of this work shows that the false-sharing problem is a relative problem depending on each application. Another result is the importance to move the data flow outside of the critical path and to use techniques that forwards data as early as possible, similar to MPI, benefits the final application performance. Additionally, this data movement is usually concentrated at single points and affects the application performance due to the limited bandwidth of the network. Therefore it is necessary to provide mechanisms that allows the distribution of this data through the computation time using an otherwise idle network. Finally, results shows that the proposed contributions improve the performance of OpenMP applications on this kind of environments.

Epilepsy is a serious neurological disorder characterized by recurrent unprovoked seizures due to abnormal or excessive neuronal activity in the brain. An estimated 50 million people around the world suffer from this condition, and it is classified as the second most serious neurological disease known to humanity, after stroke. With early and accurate detection of seizures, doctors can gain valuable time to administer medications and other such anti-seizure countermeasures to help reduce the damaging effects of this crippling disorder. The time-varying dynamics and high inter-individual variability make early prediction of a seizure state a challenging task. Many studies have shown that EEG signals do have valuable information that, if correctly analyzed, could help in the prediction of seizures in epileptic patients before their occurrence. Several mathematical transforms have been analyzed for its correlation with seizure onset prediction and a series of experiments were done to certify their strengths. New algorithms are presented to help clarify, monitor, and cross-validate the classification of EEG signals to predict the ictal (i.e. seizure) states, specifically the preictal, interictal, and postictal states in the brain. These new methods show promising results in detecting the presence of a preictal phase prior to the ictal state.

This dissertation aims at analyzing complex problems arising in the context of dynamical networks, proteomics, and disease prevention. First, a new graph-based method for proving global stability of synchronization in directed dynamical networks is developed. This method utilizes stability and graph theories to clarify the interplay between individual oscillator dynamics and network topology. Secondly, a graph-theoretical algorithm is proposed to predict Ca2+-binding site in proteins. The new algorithm enables us to identify previously-unknown Ca2+-binding sites, and deepens our understanding towards disease-related Ca2+-binding proteins at a molecular level. Finally, an optimization model and algorithm to solve a disease prevention problem are described at the population level. The new resource allocation model is designed to assist clinical managers to make decisions on identifying at-risk population groups, as well as selecting a screening and treatment strategy for chlamydia and gonorrhea patients under a fixed budget. The resource allocation model and algorithm can have a significant impact on real treatment strategy issues.

Signal-scale cooperation is a class of techniques designed to harness the same gains offered by multi-antenna communication in scenarios where devices are too small to contain an array of antennas. While the potential improvements in reliability at the physical layer are well known, three key challenges must be addressed to harness these gains at the medium access layer: (a) the distributed synchronization and coordination of devices to enable cooperative behavior, (b) the conservation of energy for devices cooperating to help others, and (c) the management of increased inter-device interference caused by multiple spatially separate transmissions in a cooperative network. In this thesis, we offer three contributions that respectively answer the above three challenges. First, we present two novel cooperative medium access control protocols: Distributed On-demand Cooperation (DOC) and Power-controlled Distributed On-demand Cooperation (PDOC). These protocols utilize negative acknowledgments to synchronize and trigger cooperative relay transmissions in a completely distributed manner. Furthermore, they avoid cooperative transmissions that would likely be unhelpful to the source of the traffic. Second, we present an energy conservation algorithm known as Distributed Energy-Conserving Cooperation (DECC). DECC allows devices to alter their cooperative behavior based on measured changes to their own energy efficiency. With DECC, devices become self-aware of the impact of signal-scale cooperation -- they explicitly monitor their own performance and scale the degree to which they cooperate with others accordingly. Third and finally, we present a series of protocols to combat the challenge of inter-device interference. Whereas energy efficiency can be addressed by a self-aware device monitoring its own performance, inter-device interference requires devices with network awareness that understand the impact of their behavior on the devices around them. We investigate and quantify the impact of incomplete network awareness by proposing a modeling approximation to derive relaying policy behaviors. We then map these policies to protocols for wireless channels.

The Dual Clutch Transmission (DCT) is a relatively new kind of transmission which shows increased efficiency and comfort compared to manual transmissions. Its construction is much like two parallell manual transmissions, where the gearshifts are controlled automatically. The gear-shift of a manual transmission involves a synchronization process, which synchronizes and locks the input shaft to the output shaft via the desired gear ratio. This process, which means transportation of a synchronizer sleeve, is performed by moving the gear shift lever which is connected to the sleeve. In a DCT, there is no mechanical connection between the gear-shift lever and the sleeve. Hence, an actuator system, controlled by a control system, must be used. This report includes modelling, control system design and simulation results of a DCT synchronization process. The thesis work is performed at GM Powertrain (GMPT) in Trollhättan. At the time of this thesis, there is no DCT produced by GM, and therefore the results and conclusions rely on simulations. Most of the used system parameters are reasonable values collected from employees at GMPT and manual transmission literature. The focus of the control design is to achieve a smooth, rather than fast, movement of the synchronizer sleeve. Simulations show that a synchronization process can be performed in less than 400 ms under normal conditions. The biggest problems controlling the sleeve position occur if there is a large amount of drag torque affecting the input shaft. Delay problems also worsen the performance a lot. An attempt to predict the synchronizer sleeve position is made and simulations shows advantages of that. Some further work is needed before the developed control software can be used on a real DCT. Investigations of sensor noise robustness and the impact of dogging forces are the most important issues to be further investigated. Implementation of additional functionality for handling special conditions are also needed.

Wireless Sensor Networks (WSNs) are ad-hoc wireless networks for small form-factor embedded nodes with limited memory, processing and energy resources. Certain applications, like industrial automation and real-time process monitoring requires time synchronized reliable network protocol. Current work for WSNs provides either time synchronized with low reliability (WirelessHART) or reliable network without time synchronization (Collection Tree Protocol). The Collection Tree Protocol (CTP) provides the reliability from 94.7% to 99.9% for CSMA-CA based MAC layer. This paper addresses channel hopping, a class of frequency diverse communication protocol in which subsequent packets are sent over different frequency channels. Channel hopping combats external interference and persistent multipath fading, two of the main causes of failure along a communication link. Channel hopping technique leads to a high reliable and efficient protocol which is specified by HART Communication Foundation and named as WirelessHART. WirelessHART Data-Link layer designed based on TDMA and CSMA-CA mechanism. By implementing the CTP over WirelessHART Data-Link layer, the reliability of the network protocol can be improved compare to actual CTP standard implementation. This thesis describes the design and implementation of Collection Tree Protocol over WirelessHART Data-Link layer. The implementation is done using TinyOS, nesC programming language using Crossbow TelosB CC2420 radio chip nodes. The results and experiments show the evaluation of the system prototype.

The purpose of this thesis is to demonstrate the effects of mismatch errors that occur in time-interleaved analog-to-digital converters (TI-ADC) and how these are compensated for by proprietary methods from Signal Processing Devices Sweden AB. This will be demonstrated by two different implementations, both based on the combined digitizer/generator SDR14. These demonstrations shall be done in a way that is easy to grasp for people with limited knowledge in signal processing. The first implementation is an analog video demo where an analog video signal is sampled by such an TI-ADC in the SDR14, and then converted back to analog and displayed with the help of a TV tuner. The mismatch compensation can be turned on and off and the difference on the resulting video image is clearly visible. The second implementation is a digital communication demo based on W-CDMA, implemented on the FPGA of the SDR14. Four parallel W-CDMA signals of 5 MHz are sent and received by the SDR14. QPSK, 16-QAM, and 64-QAM modulated signals were successfully sent and the mismatch effects were clearly visible in the constellation diagrams. Techniques used are, for example: root-raised cosine pulse shaping, RF modulation, carrier recovery, and timing recovery.

POTS (Plain Old Telephony Service) systems have traditionally been connected via synchronous connections. When installing new nodes in the telephone network, they may sometimes be connected via packet networks such as Ethernet. Ethernet is an asynchronous network which means that nodes connected to the network don’t have access to the same clock frequency if it is not provided in some other way. If two nodes have different clock frequency, the receiver’s buffer will eventually overflow or starve. While not being a severe problem for telephony, devices used for data transmission, e.g. modems and fax will not be able to function properly. To avoid this it is necessary to synchronize the nodes. This thesis investigates methods to synchronize nodes connected over Ethernet by simulating them in Matlab. The simulations show that under certain circumstances it is possible to produce a clock signal conforming to relevant standards.

This thesis involved a research of mechanisms of MAC layer in the ad-hoc networks environment, the ad-hoc networks in the terminology of the standard are called IBSS Independent Basic Service, these type of networks are very useful in real situation where there are not the possibility of display a infrastructure, when there isn’t a network previous planning. The connection to a new network is one of the different with the most common type of Wireless Local Area Networks (WLAN) that are the ones with infrastructure. The connection is established without the presence of a central station, instead the stations discover the others with broadcast messages in the coverage area of each station. In the context of standard 802.11 networks the communication between the stations is peer to peer, only with one hop. To continue with initiation process is necessary the synchronization between the different stations of his timers. The other capital mechanism that is treated is the medium access mechanism, to hold a shared and unreliable medium, all the heavy of this issue goes to the distributed coordination function DCF. In this moment there is an emergent technology, WIMAX or standard IEEE 802.16, like the standard 802.11 is a wireless communication protocol. Some comparison between the MAC layer mechanisms would be realized between these two standards