This thesis provides insight into state-of-the-art 1.2 kV silicon carbide (SiC) power semiconductor transistors, including the MOSFET, BJT, SJT, and normally-on and normally-off JFETs. Both commercial and sample devices from the semiconductor industry's well-known manufacturers were evaluated in this study. These manufacturers include: Cree Inc., ROHM Semiconductor, General Electric, Fairchild Semiconductor, GeneSiC Semiconductor, Infineon Technologies, and SemiSouth Laboratories. To carry out this work, static characterization of each device was performed from 25 ºC to 200 ºC. Dynamic characterization was also conducted through double-pulse tests. Accordingly, this thesis describes the experimental setup used and the different measurements conducted, which comprise: threshold voltage, transconductance, current gain, specific on-resistance, parasitic capacitances, internal gate resistance, and the turn on and turn off switching times and energies. For the latter, the driving method used for each device is described in detail. Furthermore, for the devices that require on-state dc currents, driving losses are taken into consideration. While all of the SiC transistors characterized in this thesis demonstrated low specific on-resistances, the SiC BJT showed the lowest, with Fairchild's FSICBH057A120 SiC BJT having 3.6 mΩ•cm2 (using die area) at 25 ºC. However, the on-resistance of GE's SiC MOSFET proved to have the smallest temperature dependency, increasing by only 59 % from 25 ºC to 200 ºC. From the dynamic characterization, it was shown that Cree's C2M0080120D second generation SiC MOSFET achieved dv/dt rates of 57 V/ns. The SiC MOSFETs also featured low turn off switching energy losses, which were typically less than 70 µJ at 600 V bus voltage and 20 A load current. / Master of Science

Gallium Oxide (Ga2O3) is an ultra-wide bandgap semiconductor with a bandgap of 4.5–4.9 eV, which is higher than the bandgap of Silicon (Si), Silicon Carbide (SiC), and Gallium Nitride (GaN). A benefit of this wide-bandgap is the high critical electric field of Ga2O3, which is estimated to be from 5 MV/cm to 9 MV/cm. This allows a higher Baliga’s figure of merit (BFOM), i.e., unipolar Ga2O3 devices potentially possess a smaller specific on-resistance (Ron,sp) as compared to the Si, SiC, and GaN devices with the same breakdown voltage (BV). This prospect makes Ga2O3 devices promising candidates for next-generation power electronics. This thesis explores the design, fabrication, and packaging of vertical Ga2O3 Schottky barrier diodes (SBDs). The power SBD allows for a small forward voltage and a fast switching speed; thus, it is ubiquitously utilized in power electronics systems. It is also a building block for many advanced power transistors. Hence, the study of Ga2O3 SBDs is expected to pave the way for developing a series of Ga2O3 power devices. In this work, a vertical β-Ga2O3 SBD with a novel edge termination, which is the small-angle beveled field plate (SABFP), is fabricated on thinned Ga2O3 substrates. This SABFP structure decreases the peak electric field (Epeak) at the triple point when the Ga2O3 SBD is reverse biased, resulting in a BV of 1.1 kV and an Epeak of 3.5 MV/cm. This device demonstrates a BFOM of 0.6 GW/cm2, which is among the highest in β-Ga2O3 power devices and is comparable to the state-of-the-art vertical GaN SBDs. The high-temperature characteristics of Ga2O3 SBDs with a 45o beveled angle sidewall edge termination are studied at temperatures up to 600 K. As compared to the state-of-the-art SiC and GaN SBDs with a similar blocking voltage, the vertical Ga2O3 SBDs are capable of operating at higher temperatures and show a smaller leakage current increase with temperature. The leakage current mechanisms were also revealed at various temperatures and reverse biases. A new fabrication method of a dielectric field plate and Ga2O3 mesa of a medium angle (10o~30o) is achieved by controlling the adhesion between the photoresist (PR) and the dielectric surface. As compared to the small-angle termination, this medium-angle edge termination can allow a superior yield and uniformity in device fabrication, at the same time maintaining the major functionalities of beveled edge termination. Good surface morphology of the field plates and Ga2O3 mesa of the medium angle 10o~30o sidewall angle is verified by atomic force microscopy. Finally, large-area Ga2O3 SBDs are fabricated and packaged using silver sintering as the die attach. The sintered silver joint has higher thermal conductivity and better reliability as compared to the solder joint. The metal finish on the anode and cathode has been optimized for silver sintering. Large-area, packaged Ga2O3 SBDs with an anode size of 3×3 mm2 are prototyped. They show a forward current of over 5 A, a current on/off ratio of ~109, and a BV of 190 V. To the best of the author’s knowledge, this is the first experimental demonstration of a large-area, packaged Ga2O3 power device. / M.S. / Power electronics is the processing of electric energy using solid-state electronics. It is ubiquitously used in consumer electronics, data centers, electric vehicles, electricity grids, and renewable energy systems. Advanced power device technologies are paramount to improving the performance of power electronic systems. Power device design centers on the concurrent realization of low on-resistance (RON), high breakdown voltage (BV), and small turn-on/turn-off power losses. The performance of power devices hinges on semiconductor material properties. Over the last several years, power devices based on wide-bandgap semiconductors like Silicon Carbide (SiC) and Gallium Nitride (GaN) have enabled tremendous performance advancements in power electronic systems. Gallium Oxide (Ga2O3) is an ultra-wide bandgap semiconductor with a bandgap of 4.5–4.9 eV, which is higher than the bandgap of Silicon (Si), SiC, and GaN. As a benefit of this wide bandgap, the theoretical performance of Ga2O3 devices is superior to the Si, SiC, and GaN counterparts. Hence, Ga2O3 devices are regarded as promising candidates for next-generation power electronics. This thesis explores the design, fabrication, and packaging of vertical Ga2O3 Schottky barrier diodes (SBDs). The power SBD allows a small forward voltage and a fast switching speed; thus, it is extensively utilized in power electronics systems. It is also a building block for many advanced power transistors. First, a vertical β-Ga2O3 SBD with a novel edge termination is fabricated. This edge termination structure reduces the peak electric field (Epeak) in the device and enhances the BV. The fabricated device shows one of the highest figure of merits in β-Ga2O3 power devices. Next, the high-temperature characteristics of the fabricated Ga2O3 SBDs are studied at temperatures up to 600 K. The leakage current mechanisms were also revealed at various temperatures and reverse biases. Finally, large-area Ga2O3 SBDs are fabricated and packaged using silver sintering as the die attach. The sintered silver joint has higher thermal conductivity and better reliability as compared to the conventional solder joint. The packaged Ga2O3 SBDs show a forward current of over 5 A and a BV of 190 V. To the best of the author’s knowledge, this is the first experimental demonstration of a large-area, packaged Ga2O3 power device.

NASA missions require innovative power electronics system and component solutions with long life capability, high radiation tolerance, low mass and volume, and high reliability in space environments. Presently vertical double-diffused MOSFETs (VDMOS) are the most widely used power switching device for space power systems. It is proposed that a new lateral double-diffused MOSFET (LDMOS) designed at UCF can offer improvements in total dose and single event radiation hardness, switching performance, development and manufacturing costs, and total mass of power electronics systems. Availability of a hardened fast-switching power MOSFET will allow space-borne power electronics to approach the current level of terrestrial technology, thereby facilitating the use of more modern digital electronic systems in space. It is believed that the use of a p+/p-epi starting material for the LDMOS will offer better hardness against single-event burnout (SEB) and single-event gate rupture (SEGR) when compared to vertical devices fabricated on an n+/n-epi material. By placing a source contact on the bottom-side of the p+ substrate, much of the hole current generated by a heavy ion strike will flow away from the dielectric gate, thereby reducing electrical stress on the gate and decreasing the likelihood of SEGR. Similarly, the device is hardened against SEB by the redirection of hole current away from the base of the device's parasitic bipolar transistor. Total dose hardness is achieved by the use of a standard complementary metal-oxide semiconductor (CMOS) process that has shown proven hardness against total dose radiation effects.

This thesis details the development of a novel photovoltaic device based on organometal halide perovskites. The initial focus of this thesis begins with the study of lighttrapping strategies in solid-state dye-sensitised solar cells (detailed in chapter 3). While I report enhancement in device performance through the application of near and far-field light-trapping techniques, I find that improvements remain step-wise due to fundamental limitations currently employed in dye-sensitised solar cell technology— notably, the available light-sensitising materials. I found a promising yet under researched family of materials in the methyl ammonium tri-halide plumbate perovskite (detailed in chapter 4). The perovskite light-sensitiser was applied to the traditional mesoscopic sensitised solar cell device architecture as a replacement to conventional dye yielding world-record breaking photo-conversion e!ciencies for solid-state sensitised solar cells as high as 8.5%. The system was further developed leading to the conception of a novel device architecture, termed the mesoporous superstructured solar cell (MSSC), this new architecture replaces the conventional mesoporous titanium dioxide semiconductor with a porous insulating oxide in aluminium oxide, resulting in very low fundamental losses evidenced through high photo-generated open-circuit voltages of over 1.1 V. This development has delivered striking photo-conversion ef- ficiencies of 10.9% (detailed in chapter 6).

This thesis reports the study of single photon sources that emit one infrared wavelength photon at a time, creating cavity quantum electrodynamical effects for applications such as quantum information processing. This work considers two major single photon sources: a) InAs single quantum dots and b) single carbon nanotubes, which both emit in the infrared range. Photonic crystal slabs and photonic crystal waveguides are served as distinctive passive devices with manipulated photonic band-gaps to control the propagating light. A simulation of leaky modes of two-dimensional photonic crystal slabs is introduced to constrain model parameters in the device design. Fullerenes are used as fluorescent material to achieve resonance of a leaky mode with excitation 1492 nm and emission at 1519 nm and to see enhancement of the PL. We include novel characterization techniques and PL measurements to show sharp emission peaks from single quantum dots and successfully couple them to micro-cavities. The strong coupling effect is observed and is amongst the best examples of cavity-dot structures achieved to date. Single-walled carbon nanotubes have shown anti-bunched light emission, thus we systematically study them as another possible candidate of single photon sources. PLE spectra show clear evidence of the existence of excited states, and time evolution measurements reveal the disorder induced diffusion, which separate the tubes into a series of quantum dots. These strongly confined states are concluded as the origin of the possibility that single-walled carbon nanotubes are single photon sources.

A process has been developed to make the dielectric layer for organic thin-film transistors (OTFTs) in a roll-to-roll vacuum web coater environment. This dielectric layer combined with an organic semiconductor layer and metal layer deposited in vacuum allows a solvent-free process to make organic/inorganic multilayer structures for thin-film electronic devices on a flexible substrate at, potentially, high speed. The polymeric gate dielectric layers were fabricated by flash evaporation of acrylic monomers onto a polymer film with pre-patterned metal gates followed by radiation curing by electron beam, ultra-violent light (UV) or plasma. With a non-polar dielectric surface, charge carrier mobility (μ) of 1 cm²-V^-1s^-1; on/off curren ratio of 10⁸, sub-threshold swing (SS) of 0.3 V/decade and saturated output curve were routinely achieved in dinaphtho-[2,3-b:2'3'-f]thieno[3,2-b]thiophene (DNTT) transistors with dielectric layer of tripropylene glycol diacrylate (TPGDA) of ~400 nm. Apart from the TPGDA, monomer formulas including 1,6-Hexanediol diacrylate (HDDA) as well as several commercial acrylic resins have been used to make the dielectric layer. The highest areal capacitance of 41nF-cm^-2 was achieved with a pin-hole free film of less than 100 nm made of an acrylate mixture resin. A non-polar dielectric surface treatment layer has been developed based on flash evaporation of lauryl acrylate and HDDA mixture. The transistors with the buffer layer showed constant performance and a mobility fivefold greater than those of untreated samples. The effect of humidity, oxygen, and light during switching cycles of both pentacene and DNTT transistors were studied. Water and oxygen/illumination had a distinct effect on both pentacene and DNTT transistors. Oxygen leads to acceptor-like charge traps under illumination, which shifted the turn-on voltage (V_to) to more positive values. In contrast, water in transistors gave rise to donor-like charge traps, which shifted the V_to and the threshold voltage (V_T) more negatively. The DNTT devices showed good stability in dry air without encapsulation, while pentacene transistors degraded with either repeating measurement or long term storage. A DNTT transistor with a PS-coated TPGDA dielectric layer showed stable drain current (I_d) of ~105A under bias stress of the gate voltage (em>V_g) of -20V and the drain voltage (em>V_d) of -20V for at least 144 hours. The V_to shift after the stress was less than 5 V and was recoverable when the device was kept in dry air for a few days. Possible reasons for the V_to shift have been discussed.

Hybrid organic-inorganic solar photovoltaic (PV) cells capable of directly converting sunlight to electricity have attracted much attention in recent years. Despite evident technological advancements in the PV industry, the widespread commercialisation of solar cells is still being mired by their low conversion efficiencies and high cost per Watt. Perovskites are an emerging class of semiconductors providing a low-cost alternative to silicon-based photovoltaic cells, which currently dominate the market. This thesis develops a series of studies on “all-solid state perovskite solar cells” fabricated via vapour deposition which is an industrially-accessible technique, to achieve planar heterojunction architectures and efficient PV devices. Chapter 2 presents a general outlook on the operating principles of solar cells, delving deeper into the specific operational mechanism of perovskite solar cells. It also explores the usual methods employed in the fabrication of perovskite thin films. Chapter 3 describes the experimental procedures followed during the fabrication of the individual components constituting the device from the synthesis of the precursors to the construction of the functioning perovskite PV devices. Chapter 4 demonstrates pioneering work involving the dual-source vapour deposition (DSVD) of planar heterojunction perovskite solar cells which generated remarkable power conversion efficiency values surpassing 15%. These significant results pave the way for the mass-production of perovskite PVs. To further expand the range of feasible vapour deposition techniques, a two-layer sequential vapour deposition (SVD) technique is explored in Chapter 5. This chapter focusses on identifying the factors affecting the fundamental properties of the vapour-deposited films. Findings provide an improved understanding of the effects of precursor compositions and annealing conditions on the films. Chapter 5 concludes with a comparison between SVD and DSVD fabricated films, highlighting the benefits of each vapour deposition technique. Furthermore, hysteretic effects are analysed in Chapter 6 for the perovskite PV devices fabricated based on different structural configurations. An interesting discovery involving the temporary functioning of compact layer-free perovskite PV devices suggests the presence of a built-in-field responsible for the hysteresis of the cells. The observations made in this chapter yield a new understanding of the functionality of individual cell layers. Combining the advantages of the optimum vapour deposition technique established in Chapter 4 and Chapter 5, with the enhanced understanding of perovskite PV cell operational mechanism acquired from Chapter 6, an ongoing study on an “all-perovskite” tandem solar cell is introduced in Chapter 7. This demonstration of the “all-perovskite” tandem devices confirms the versatility of perovskites for a broader range of PV applications.

Efeitos de radiação em dispositivos eletrônicos são uma preocupação em diversas áreas, como em missões espaciais, aceleradores de partículas de alta energia, entre outras. Entre os efeitos de radiação induzidos por íons pesados estão os chamados de Efeitos de Eventos Isolados (Single Event Effects - SEE), nos quais o impacto de um único íon pode ser capaz de gerar um efeito observável. Estes efeitos nunca haviam sido estudados no Brasil e seu estudo requer um acelerador de partículas capaz de prover feixes de íons pesados com baixo fluxo. A caracterização de dispositivos é feita medindo-se o número de eventos induzidos por radiação em função da transferência de energia por unidade de comprimento (Linear Energy Transfer - LET) do íon na camada sensível do dispositivo. Neste trabalho desenvolvemos um sistema para produção de feixes pesados para estudar SEE no Acelerador Pelletron 8UD, utilizando espalhamento Rutherford. A montagem permite obter feixes iônicos com valores de LET na superfície de silício na faixa de 1 a 40 MeV/mg/2. O valor de LET na camada sensível do dispositivo depende da espessura de sua camada de passivação. Feixes pesados até 48 podem ser utilizados para irradiações com feixe externo, isto é, fora da câmara de vácuo, e até 107 em vácuo, com uniformidade em intensidade acima de 90%. A caracterização do MOSFET 3N163 foi a primeira medida bem-sucedida de SEE no Brasil, e foi possível correlacionar o LET dos íons com a amplitude do sinal gerado no dispositivo sob teste. A curva de seção de choque de SEE foi obtida, e para o dispositivo estudado os valores obtidos de seção de choque de saturação e LET de limiar foram de 2,94(10)105 2 e 2,35(36)MeV/mg/2 respectivamente. / Radiation effects on electronic devices are a main concern for many situations, such as space applications, high-energy particle accelerators, nuclear medicine, among others. A group of radiation effects induced by heavy-ions are called Single Event Effects, because a strike of a single ion can be enough to generate a damage on electronic devices. So far, SEE were not studied in Brazil due to the need of a high-energy, lowflux particle accelerator. Device characterization is done by measuring the number of events as a function of Linear Energy Transfer of the ion beam on the sensitive layer of the device under test (DUT). In this work we developed a Rutherford scattering setup for studying SEE at Sao Paulo 8UD Pelletron Accelerator. The setup can provide ion beams with Linear Energy Transfer values on the silicon surface ranging from 1 to 40 MeV/mg/2. The values on the active layer of the device depend upon the thickness of the dead-layer of the device. Ion beams up to 48 can be used for irradiation of devices outside the vacuum chamber and up to 107 inside the vacuum chamber, with a uniformity better than 90%. The characterization of the MOSFET 3N163 was the first successful measurement of heavy-ion induced SEE in Brazil, and it was possible to correlate ion LET with signal amplitude generated by the DUT. A complete SEE cross-section curve was obtained, and for the device studied the values of saturation cross-section and threshold LET are 2.94(10).105 2 and 2.35(36) MeV/mg/2,respectively

Efeitos de radiação em dispositivos eletrônicos são uma preocupação em diversas áreas, como em missões espaciais, aceleradores de partículas de alta energia, entre outras. Entre os efeitos de radiação induzidos por íons pesados estão os chamados de Efeitos de Eventos Isolados (Single Event Effects - SEE), nos quais o impacto de um único íon pode ser capaz de gerar um efeito observável. Estes efeitos nunca haviam sido estudados no Brasil e seu estudo requer um acelerador de partículas capaz de prover feixes de íons pesados com baixo fluxo. A caracterização de dispositivos é feita medindo-se o número de eventos induzidos por radiação em função da transferência de energia por unidade de comprimento (Linear Energy Transfer - LET) do íon na camada sensível do dispositivo. Neste trabalho desenvolvemos um sistema para produção de feixes pesados para estudar SEE no Acelerador Pelletron 8UD, utilizando espalhamento Rutherford. A montagem permite obter feixes iônicos com valores de LET na superfície de silício na faixa de 1 a 40 MeV/mg/2. O valor de LET na camada sensível do dispositivo depende da espessura de sua camada de passivação. Feixes pesados até 48 podem ser utilizados para irradiações com feixe externo, isto é, fora da câmara de vácuo, e até 107 em vácuo, com uniformidade em intensidade acima de 90%. A caracterização do MOSFET 3N163 foi a primeira medida bem-sucedida de SEE no Brasil, e foi possível correlacionar o LET dos íons com a amplitude do sinal gerado no dispositivo sob teste. A curva de seção de choque de SEE foi obtida, e para o dispositivo estudado os valores obtidos de seção de choque de saturação e LET de limiar foram de 2,94(10)105 2 e 2,35(36)MeV/mg/2 respectivamente. / Radiation effects on electronic devices are a main concern for many situations, such as space applications, high-energy particle accelerators, nuclear medicine, among others. A group of radiation effects induced by heavy-ions are called Single Event Effects, because a strike of a single ion can be enough to generate a damage on electronic devices. So far, SEE were not studied in Brazil due to the need of a high-energy, lowflux particle accelerator. Device characterization is done by measuring the number of events as a function of Linear Energy Transfer of the ion beam on the sensitive layer of the device under test (DUT). In this work we developed a Rutherford scattering setup for studying SEE at Sao Paulo 8UD Pelletron Accelerator. The setup can provide ion beams with Linear Energy Transfer values on the silicon surface ranging from 1 to 40 MeV/mg/2. The values on the active layer of the device depend upon the thickness of the dead-layer of the device. Ion beams up to 48 can be used for irradiation of devices outside the vacuum chamber and up to 107 inside the vacuum chamber, with a uniformity better than 90%. The characterization of the MOSFET 3N163 was the first successful measurement of heavy-ion induced SEE in Brazil, and it was possible to correlate ion LET with signal amplitude generated by the DUT. A complete SEE cross-section curve was obtained, and for the device studied the values of saturation cross-section and threshold LET are 2.94(10).105 2 and 2.35(36) MeV/mg/2,respectively

The main objective for physics based modeling of the power converter components is to design the whole converter with respect to physical and operational constraints. Therefore, all the elements and components of the energy conversion system are modeled numerically and combined together to achieve the whole system behavioral model. Previously proposed high frequency (HF) models of power converters are based on circuit models that are only related to the parasitic inner parameters of the power devices and the connections between the components. This dissertation aims to obtain appropriate physics-based models for power conversion systems, which not only can represent the steady state behavior of the components, but also can predict their high frequency characteristics. The developed physics-based model would represent the physical device with a high level of accuracy in predicting its operating condition. The proposed physics-based model enables us to accurately develop components such as; effective EMI filters, switching algorithms and circuit topologies [7]. One of the applications of the developed modeling technique is design of new sets of topologies for high-frequency, high efficiency converters for variable speed drives. The main advantage of the modeling method, presented in this dissertation, is the practical design of an inverter for high power applications with the ability to overcome the blocking voltage limitations of available power semiconductor devices. Another advantage is selection of the best matching topology with inherent reduction of switching losses which can be utilized to improve the overall efficiency. The physics-based modeling approach, in this dissertation, makes it possible to design any power electronic conversion system to meet electromagnetic standards and design constraints. This includes physical characteristics such as; decreasing the size and weight of the package, optimized interactions with the neighboring components and higher power density. In addition, the electromagnetic behaviors and signatures can be evaluated including the study of conducted and radiated EMI interactions in addition to the design of attenuation measures and enclosures.