As technique and requirement of today’s products keeps expending, Acreo AB has been researching for automotive radar that fulfills these requirements, e.g. higher resolution, faster system and lower cost. The purpose of this master thesis work has been to evaluate a previous design and implement changes. The work has resulted in a PCB card that will be used to compare the performance between two radar modules. The demonstrator has been developed in two versions – first based on the existing GaAs-chipset (Gallium Arsenide) and a second with the inclusion of a low cost SiGe-chipset (Silicon Germanium). The outcome of this work proves that some requirements cannot be fulfilled and therefore a next-generation radar demonstrator has been proposed. The new radar demonstrator includes changes that can fulfill the requirements.

Noise and linearity are the two key concerns in RF transceiver systems. However, the impact of circuit topology and device technology on systems noise and linearity behaviors is poorly understood because of the complexity and diversity involved. There are two general questions that are addressed by the RF device and circuit designers: for a given device technology, how best to optimize the circuit topology; and for a given circuit topology, how best to optimize the device technology to improve the noise and linearity performance. In this dissertation, a systematic noise and linearity calculation method is proposed. This approach offers simple and analytical solutions to optimize the noise and linearity characteristics of integrated circuits. Supported by this approach, the physics of state-of-the-art SiGe HBT technology devices can be decoupled and studied. The corresponding impact on noise and linearity is investigated. New optimization methodologies for noise and linearity at both the device and circuit level are presented. In addition, this thesis demonstrates a technique that accurately extracts ac and noise parameters of devices/circuits in the millimeter-wave range. The extraction technique supports and verifies the device/circuit noise analysis from a measurement standpoint.

This thesis presents a comprehensive assessment of breakdown and operational voltage constraints in state-of-the-art silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) BiCMOS technology. Technology scaling of SiGe HBTs for high frequency performance results on lower breakdown voltages, making operating voltage constraints an increasingly vital reliability consideration in SiGe HBTs from both a device and circuits perspective.

Operation of SiGe BiCMOS Technology Under Extreme Environments Tianbing Chen 96 pages Directed by Dr. John D. Cressler "Extreme environment electronics" represents an important niche market and spans the operation of electronic components in surroundings lying outside the domain of conventional commercial, or even military specifications. Such extreme environments would include, for instance, operation to very low temperatures (e.g., to 77 K or even 4.2 K), operation to very high temperatures (e.g., to 200 C or even 300 C), and operation in a radiation-rich environment (e.g., space). The suitability of SiGe BiCMOS technology for extreme environment electronics applications is assessed in this work. The suitability of SiGe HBTs for use in high-temperature electronics applications is first investigated. SiGe HBTs are shown to exhibit sufficient current gain, frequency response, breakdown voltage, achieve acceptable device reliability, and improved low-frequency noise, at temperatures as high as 200-300 C. A comprehensive investigation of substrate bias effects on device performance, thermal properties, and reliability of vertical SiGe HBTs fabricated on CMOS-compatible, thin-film SOI, is presented. The impact of 63 MeV protons on these vertical SiGe HBTs fabricated on a CMOS-compatible SOI is then investigated. Proton irradiation creates G/R trap centers in SOI SiGe HBTs, creating positive charge at the buried oxide interface, effectively delaying the onset of the Kirk effect at high current density, which increases the frequency response of SOI SiGe HBTs following radiation. The thermodynamic stability of device-relevant epitaxial SiGe strained layers under proton irradiation is also investigated using x-ray diffraction techniques. Irradiation with 63 MeV protons is found to introduce no significant microdefects into the SiGe thin films, regardless of the starting stability condition of the SiGe film, and thus does not appear to be an issue for the use of SiGe HBT technology in emerging space systems. CMOS device reliability for emerging cryogenic space electronics applications is also assessed. CMOS device performance improves with cooling, however, CMOS device reliability becomes worse at decreased temperatures due to aggravated hot-carrier effects. The device lifetime is found to be a strong function of gate length, suggesting that design tradeoffs are inevitable.

A novel transit time based analytical broadband noise model is developed and implemented for high frequency bipolar transistors. This model is applied to a complementary (npn + pnp) silicon germanium (SiGe) heterojunction bipolar transistors (HBT). A complete set of analytical equations are derived using this transit time noise model, to express the four fundamental noise parameters in terms of device parameters. A comprehensive analysis on the ac, dc and broadband noise performance of a 200 GHz SiGe HBT technology, under cryogenic temperatures, is presented. The transit time based noise model is used to analyze the RF noise behavior of the SiGe HBT down to 85 K. Significant performance gain is demonstrated in cryogenic temperatures indicating the suitability of SiGe HBT for extreme environment electronics. A sub-circuit based substrate parasitic modeling methodology, in silicon based processes, is presented. A test case low noise amplifier, operating in the 5 GHz band, is designed in a SiGe HBT process and is used to demonstrate the validity of the design methodology. A dual-band, dual-mode transceiver front end for IEEE802.11a/b/g WLAN applications, is designed in a 0.8 and #956;m SiGe HBT process. The transceiver uses a new architecture which uses an on-chip frequency doubler and a single off-chip frequency synthesizer for both the 2.4 and 5 GHz bands. The performance of the transceiver meets the specification of the IEEE802.11a/b/g standards. The work described in the dissertation significantly advances the state-of-the-art in bipolar broadband noise modeling and RF, microwave circuit design using silicon based processes. The contributions and implications of this work for future research are discussed.

The objective of this work is to investigate the suitability of applying silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) bipolar complementary metal oxide semiconductor (BiCMOS) technology to extreme environments and to design high-speed circuits in this technology to demonstrate their reliable operation under these conditions. This research focuses on exploring techniques for hardening SiGe HBT digital logic for single event upset (SEU) based on principles of radiation hardening by design (RHBD) as well as on the cryogenic characterization of SiGe HBTs and designing broadband amplifiers for operation at cryogenic temperatures. Representative circuits ranging from shift registers featuring multiple architectures to broadband analog circuits have been implemented in various generations of this technology to enable this effort.

In this work a new current-sweep stress methodology for quantitatively assessing the mixed-mode reliability (simultaneous application of high current and high voltage) of advanced SiGe HBTs is presented. This stress methodology allows one to quickly obtain the complete damage spectrum of a given device from a particular technology platform, enabling better understanding of the complex voltage, current, and temperature interdependence associated with electrical stress and burn-in of advanced transistors. We consistently observed three distinct regions of mixed-mode damage in SiGe HBTs, and find that hot carrier induced damage can be introduced into SiGe HBTs under surprisingly modest mixed-mode stress conditions. For more aggressively scaled silicon-germanium technology generations, a larger percentage of hot carriers generated in the collector-base junction are able to travel to and hence damage the EB spacer, leading to enhanced forward-mode base current leakage under stress. A new self-heating induced mixed-mode annealing effect was observed for the first time under fairly high voltage and current stress conditions, and a new damage mechanism was observed under very high voltage and current conditions. Finally, as an example of the utility of our stress methodology, we quantified the composite mixed-mode damage spectrum of a commercial third-generation (200 GHz) generation SiGe HBT. It is found that if devices are stressed with either voltage or current alone during burn-in, they can easily withstand extreme over-stress conditions. Unfortunately, devices were easily damaged when stressed with a combination of stress voltage and current, and this has significant implications for the device and circuit lifetime prediction under realistic mixed-signal operating conditions.

The failure mechanisms of the tantalum-based nitride diffusion barrier using between copper metal and the SiGe/Si layers grown with UHV/CVD have been studied. The TaN and Cu films were deposited with RF sputtering technique. The structure of these films was analyzed by X-ray diffraction. The stoichiometry of TaN was characterized by XPS (X-ray photoelectron spectroscopy). The morphology of the films was examined with SEM and the microstructure of the interface between several layers was observed with TEM. With comparing the XRD patterns of the samples which were annealed in the different temperatures, the failure temperature of the TaN barrier layer can be identified and the failure mechanism of this barrier layer cab be elucidated with TEM observation. The results revealed that the deposited TaN film with low sputtering power had better performance for preventing the Cu atoms diffusing into the SiGe layer. The high composition of Ge in the SiGe alloy degraded the blocking ability of the TaN barrier layer due to the released the existed strain between the SiGe and Si. When the failure temperature was reached, The Cu3Si phase was formed first in the interface of the TaN/SiGe and inside the TaN film. If the annealed temperature went higher, the TaSi2 phase also was formed. Compared with SiGe/Si and Si substrate, the TaN diffusion barrier layer has a higher failure temperature in Si than those in SiGe layer.

No description available.

Thanks to a small wavelength (large bandwidth) combined with a low loss transmission window around 94 GHz and 120 GHz, the 75-120 GHz frequency band in millimeter wave (mm-wave) provides a promising opportunity for high data rate long range wireless communications and high-resolution imaging systems. Large-scale phased arrays have been exploited in such application for their beam forming and null steering capabilities, resulting in high directivity and improved SNR. But growing DC power consumption (Pdiss) in such large scale arrays has become an on-going concern along with noise, linearity and phase resolution trade-offs in current phased array architectures. To address these issues, we propose a power efficient phase shifter (PS) architecture based on quadrature hybrid coupler, which leverages the benefits of conventional active and passive PSs at mm-wave. The phase shifter has low loss, resulting in low power dissipation and the power domain phase interpolation by the quadrature hybrid gives low phase error and high linearity. We design W-band (90-100 GHz) phased array transmit and receive (T/R) modules in 130 nm SiGe BiCMOS technology based on the proposed PS and our measurements show high power efficiency with the lowest power consumption at W-band to our knowledge (18mW and 26mW power dissipations at receiver (Rx) and transmitter (Tx) front-ends respectively). Rx shows 23 to 25 dB peak gain, 6 to 9.3 dB NF and Tx can deliver upto 7 dBm output power with 18% power efficiency. Moreover, our PS can achieve 5-bit phase resolution with <2 degrees RMS phase error and provides 0 dBm saturated output power at 94 GHz. The phase shifter (PS) is also scalable beyond W-band without significant loss. We demonstrate this with a 120 GHz two channel phased array receiver (Rx), where a single channel shows 15.6 dB peak gain with Pdiss=53 mW which shows one of the highest gain efficiency (gain/Pdiss) among D-band phased arrays. We can further reduce the power consumption by leveraging the bidirectional signal processing at the phased array front-end. To achieve this, we designed a W-band bidirectional variable gain amplifier with gain variation ranging from 6 to -1 dB at 94 GHz which can be used along with bidirectional PS. The amplifier will replace the lossy SPDT switch in the conventional bidirectional approach, reducing the overall power consumption. / Ph. D. / The wireless technology is pushing towards the high operating frequencies to achieve high data rate and 75-120 GHz frequency band in millimeter wave (mm-wave) are of great current interest for the backhaul communications, radar and imaging systems. However, high frequency yields high propagation loss which has been overcome with large scale phased arrays in such applications for their high directivity, narrow beam forming capabilities and implementation with silicon technologies. The high dissipation due to large number of elements is a major concern which often requires heat sinks around the sensors leading to increase in cost, size and weight. For the large silicon array to be of practical use in commercial systems, it is paramount to maintain a high power efficiency and low power dissipation in the array element. In this research, a power efficient phased array architecture has been proposed which is implemented to design transmit/receive (T/R) modules in advanced silicon technologies. Experimental results show that the proposed architecture achieves the lowest power consumption and improved power efficiency per T/R element among state-of-the-art mm-wave phased arrays. The research also proposes an alternative way to improve power efficiency of phased arrays by reusing the amplifiers in both transmit and receive path where the amplifier replaces lossy switch as well, resulting in a low loss bidirectional system which can reduce the power consumption further. Finally, we believe that this research contribution has an significant impact in the effort of building low power large-scale phased arrays at mm-wave frequencies.