Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department of Systems Science and Industrial Engineering, 2007. / Includes bibliographical references.

Thesis (Ph. D.)--State University of New York at Binghamton, Department of Systems Science and Industrial Engineering, Thomas J. Watson School of Engineering and Applied Science, 2008. / Includes bibliographical references.

Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department or Systems Science and Industrial Engineering, 2009. / Includes bibliographical references.

Thesis (Ph. D.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department of Systems Science and Industrial Engineering, 2009. / Includes bibliographical references.

Passive components like resistors, capacitors and inductors are used in every electronic system. These are the very basic components which affect the system performance at higher frequencies and it is necessary to understand and model the behavior of these components in a very accurate manner. This work focuses on utilizing Printed Circuit Board (PCB) test boards, or fixtures, made of FR4 for characterizing Surface Mount Device (SMD) components. Agilent's Advanced Design System (ADS) microwave circuit simulation software was used for designing the microstrip transmission lines as well as for generating the layout for manufacturing of the PCB. SMD resistors, capacitors and inductors were soldered into the fixture and then measured using the Vector Network Analyzer (VNA). The calibration kit was developed in ADS. The measured data were calibrated using the TRL (Thru-Reflect-Line) calibration algorithm. A calibration kit consisting of through, three transmission lines of various lengths, open and short was designed and manufactured. Calibration procedures were performed using Cascade Microtech's WinCal XE software. Based on our experience, TRL calibration did not perform to its full potential due to errors in the value of the characteristic impedance of microstrip transmission line. This impedance is ideally assumed to be 50 Ohm, but our lines had characteristic impedance of around 49 Ohm. Simple models for the resistors and capacitors were developed by our collaborators at the University of Zagreb and we developed the model for the inductors. We used ADS for simulations and comparison with the measured data. Extensive optimization of these models was done so as to fit the measured and modeled data. As the frequency goes above 4 GHz models and measurements don't match due to the limitations of the PCB material, the increasing effects of the parasitics and calibration artifacts. This work shows how and when we can use inexpensive FR4 PCB for the characterization of the passive SMD components in the low GHz frequency range. It also examines the range of operating frequency of SMD components, verifies the parameters extracted from the simple model and tests the TRL calibration algorithm.

The objective of this dissertation is to develop electrical modeling and co-simulation methodologies for signal and power integrity of package and board applications. The dissertation includes 1) the application of the finite element method to the optimization for decoupling capacitor selection and placement on a power delivery network (PDN), 2) the development of a PDN modeling method effective for multidimensional and multilayer geometries, 3) the analysis and modeling of return path discontinuities (RPDs), and 4) the implementation of the absorbing boundary condition for PDN modeling. The optimization technique for selection and placement of decoupling capacitors uses a genetic algorithm (GA) and the multilayer finite element method (MFEM), a PDN modeling method using FEM. The GA is customized for the decoupling problem to enhance the convergence speed of the optimization. The mathematical modifications necessary for the incorporation of the capacitor model into MFEM is also presented. The main contribution of this dissertation is the development of a new modeling method, the multilayer triangular element method (MTEM), for power/ground planes of a PDN. MTEM creates a surface mesh on each plane-pair using dual graphs; a non-uniform triangular mesh (Delaunay triangulation) and its orthogonal counterpart (Voronoi diagram), to which electromagnetic and equivalent circuit concepts are applied. The non-uniform triangulation is especially efficient for discretizing multidimensional and irregular geometries which are common in package and board PDNs. Moreover, MTEM generates a sparse, banded, and symmetric system matrix, which enables efficient computations. For a given plane-pair, MTEM extracts an equivalent circuit that is consistent with the physics-based planar-circuit model of a plane-pair. Thus, the values of the lumped elements can be simply calculated from the physical parameters, such as material properties and mesh geometries of each unit-cell. Consequently, the modeling of MTEM is flexible and easy to modify for further extensions, such as the incorporation of external circuits, e.g. decoupling capacitors and vertical interconnects. Power and ground planes provide paths for the return current of signal traces. Typically, planes have discontinuities such as via holes, plane cutouts, and split planes that disturb flow of signal return currents. At the discontinuity, return currents have to detour or switch to different layers, causing signal and power integrity problems. Therefore, a separate analysis of signal interconnects will neglect the significant coupling with a PDN, and the result will not be reliable. In this dissertation, the co-simulation of the signal and power integrity is presented focusing on the modeling of RPDs created by split planes, apertures, and vias. Plane resonance is one of the main sources of power integrity problems in package and board PDNs. A number of techniques have been developed and published in literature to reduce or prevent the resonance of a plane-pair. One of the techniques is to surround plane-pair edges with absorbing material that effectively damps the outgoing parallel-plate wave and minimizes the reflection. To model this behavior, the boundary condition of MTEM needs to be changed from its original form, the open-circuit boundary condition. In this dissertation, the application of the 1st order absorbing boundary condition to MTEM is presented.

The current trend in electronics manufacturing is to decrease the size of electronic components while attempting to increase processing power and performance. This is leading to increased interest in thinner printed wiring boards and finer line widths and wire pitches. However, mismatches in the thermomechanical properties of materials used can lead to warpage, hindering these goals. Warpage can be problematic as it leads to misalignments during package assembly, reduced tolerances, and a variety of operational failures. Current warpage prediction techniques utilize isotropic volume averaging to estimate effective material properties in layers of copper mixed with interlayer dielectric material. However, these estimates do not provide material properties with sufficient accuracy to predict warpage, as they contain no information about the orientation of the copper traces. This thesis describes the development of a new technique to predict the warpage of a particular substrate. The technique accounts for both the trace pattern planar density and planar orientation in determining effective orthotropic material properties for each layer of a multi-layer substrate. Starting with the trace pattern image, this technique first divides the trace pattern into several smaller areas for a given layer of the substrate and then uses image processing techniques to determine the copper percentage and average trace orientation in each small area. The copper percentage and average trace direction orientation are used in conjunction with the material properties of copper and the dielectric material to calculate the effective orthotropic material properties of each smaller area of the substrate. A finite-element model is then created where each layer is represented as a concatenation of several small areas with independent directional properties, and such a model is then subjected to sequential thermal excursion as seen in the actual fabrication process. The results from the models have been compared against experimental data with a great degree of accuracy. The modeling technique and the results obtained clearly demonstrate the need for the proposed subdivisional orthotropic material property calculations, as opposed to homogeneous isotropic properties typically used for each layer in computational simulations, as these more accurate directional properties are capable of predicting warpage with higher accuracy.

Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department of Systems Science and Industrial Engineering, 2008. / Includes bibliographical references.

Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engfineering and Applied Science, Department of Systems Science and Industrial Engineering, 2009. / Includes bibliographical references.

Laser Induced Forward Transfer (LIFT) techniques show promise as a disruptive technology which will enable the placement of components smaller than what conventional pick-and-place techniques are capable of today. Limitations of current die-attach techniques are presented and discussed and present the opportunity for a new placement method. This study introduces the Thermo-Mechanical Selective Laser Assisted Die Transfer (tmSLADT) process and is an application of the unique blistering behavior of a dynamic releasing layer when irradiated by low energy focused UV laser pulses. The potential of tmSLADT as the next generation LIFT technique is demonstrated by the "touchless" transfer of 65 μm thick silicon tiles between two substrates spaced 195 μm apart. Additionally, the advantages of an enclosed blister-actuator mechanism over previously studied ablative and thermal releasing techniques are discussed. Finally, experimental results studying transfer precision indicate this non optimized die transfer process compares with, and may exceed, the placement precision of current assembly techniques. / Defense Microelectronics Activity (DMEA) under agreement number H94003-09-2-0905