The trend toward higher-level circuit integration is the result of demand for lower cost and smaller feature size. The goal of this trend is to have a single-chip solution, in which analog and digital circuits are placed on the same die with advanced CMOS technology. The complete integration of a system may include a digital processor, memory, ADC, DAC, signal conditioning amplifiers, frequency translation, filtering, reference voltage/current generator, etc. Although advanced fabrication technology benefits digital circuits, it poses great challenges for analog circuits. For instance, the scaling of CMOS devices degrades important analog performance such as output resistance, lowering amplifier gain. Simply lowering the power supply voltage in analog circuits does not necessarily result in lower power dissipation. The many design constraints common to the design of analog circuits makes it difficult to curb their power consumption. This is especially true for already complicated analog systems like ADCs; reducing their appetite for power requires careful analysis of system requirements and special strategies. This thesis describes a 10bits 100-MS/s low-voltage pipelined analog-to-digital converter (ADC), which consists of 8-stage-pipelined low resolution ADCs and a 2-bit flash ADC. Several critical technologies are adopted to guarantee the resolution and high sampling and converting rate such as 1.5bits per stage conversion, digital correction logic, folded-cascode gain-boosted amplifiers and so on. The ADC is designed in a 90nm CMOS technology with a 1.2V supply voltage.

This paper presents a distributed feedback and feedforward of discrete-time delta sigma modulator applications in the radio. We know the delta-sigma modulator using oversampling and noise shaping technique, thus we can relax the specifications of the components. This paper described the architectural differences and compare, the in-band signal is less sensitive to noise interference, and improve the resolution of the circuit. In the resonator, a simple structure with a small number of capacitor in resonator circuit. This paper uses the TSMC 0.18£gm process parameters to the simulation, implementation, and measurement. Our fourth-order discrete-time delta-sigma modulator specifications as follows: the input signal frequency is 10.7MHz, the sampling frequency is 42.8MHz, the signal bandwidth is 200kHz, oversampling rate is 107, and one bit quantizer.

Power consumption and device size have been placed at the primary concerns for battery-operated portable applications. Switching converters gain popularity in powering portable devices due to their high efficiency, compact sizes and high current delivery capability. However portable devices usually operate at light loads most of the time and are only required to deliver high current in very short periods, while conventional buck converter suffers from low efficiency at light load due to the switching losses that do not scale with load current. In this research, a novel technique for buck converter is proposed to reduce the switching loss by reducing the effective voltage supply at light load. This buck converter, implemented in TSMC 0.18 micrometers CMOS technology, operates with a input voltage of 3.3V and generates an output voltage of 0.9V, delivers a load current from 1mA to 400mA, and achieves 54 percent ~ 91 percent power efficiency. It is designed to work with a constant switching frequency of 3MHz. Without sacrificing output frequency spectrum or output ripple, an efficiency improvement of up to 20 percent is obtained at light load.

Modern electronics continues to push past boundaries of integration and functional density toward elusive, completely autonomous, self-powered microsystems. As systems continue to shrink, however, less energy is available on board, leading to short device lifetimes (run-time or battery life). Extended battery life is particularly advantageous in the systems with limited accessibility, such as biomedical implants and structure-embedded micro-sensors. The power management process usually requires compact and efficient power converters to be embedded in these microsystems. This dissertation introduces switched-capacitor (SC) power converter designs that make all these techniques realizable on silicon.Four different integrated SC power converters with multiple control schemes are designed here to provide low-power high-efficient power sources. First, a monolithic step-down power converter with subthreshold z-domain digital pulse-width modulation (DPWM) controller is proposed for ultra-low power microsystems. The subthreshold design significantly reduces the power dissipation in the controller. Second, an efficient monolithic master-slave complementary power converter with a feedback controller that purely operates in subthreshold operation region is discussed to tailor for the aforementioned ultra-low power applications. Third, we introduce an efficient monolithic step-down SC power stage with multiple-gain control and on-chip capacitor sizing for self-powered microsystems. The multiple-gain control helps the converter to constantly maintain high efficiency over a large input/output range. The size-adjustable pumping capacitors allow the output voltage to be regulated at different desired levels, with a constant 50% duty ratio. The monolithic implementations in these three integrated CMOS power converters effectively suppress noise and glitches caused by parasitic components due to bonding, packaging and PCB wiring. Fourth, an efficient step-up and step-down SC power converter with multiple-gain closed-loop controller is presented. The measurements and simulation results in these four power converters demonstrate the techniques proposed in this research. The approaches presented in this dissertation are evidently viable for realizing compact and high efficient SC power converters, contributing to next generation power-efficient microsystems designs.

This thesis presents an energy monitoring system to measure energy consumption of software applications to support security and power management for embedded devices. The proposed system is composed of an Actel Fusion device and a custom designed energy measurement circuit. The Fusion device measures the voltage and the current of the target device at a defined sampling rate. The energy measurement circuit is designed as a current integrator over fixed intervals using the switched-capacitor integrator technique to store energy information of the target device within Fusion’s sampling intervals. This circuit is designed to accommodate the low sampling rate of the Fusion device. Experimental results showed that the Fusion device allows the measurement of the energy of the target device at a minimum rate of 15 µs. The energy measurement circuit is implemented using the 65 nm CMOS technology. Simulation results showed that this circuit provides 91%~97% average energy measurement accuracy.

Rechargeable batteries are found in almost every battery powered application. Be it portable, stationary or motive applications, these batteries go hand in hand with battery charging systems. With energy harvesting being targeted in this day and age, high energy density and longer lasting batteries with efficient charging systems are being developed by companies and original equipment manufacturers. Whatever the application may be, rechargeable batteries, which deliver power to a load or system, have to be replenished or recharged once their energy is depleted. Battery charging systems must perform this replenishment by using very fast and efficient methods to extend battery life and to increase periods between charges. In this regard, they have to be versatile, efficient and user programmable to increase their applications in numerous battery powered systems. This is to reduce the cost of using different battery chargers for different types of battery powered applications and also to provide the convenience of rare battery replacement and extend the periods between charges. This thesis proposes a user programmable charging system that can charge a Lithium ion battery from three different input sources, i.e. a wall outlet, a universal serial bus (USB) and an energy harvesting system. The proposed charging system consists of three main building blocks, i.e. a pulse charger, a step down DC to DC converter and a switching network system, to extend the number of applications it can be used for. The switching network system is to allow charging of a battery via an energy harvesting system, while the step down converter is used to provide an initial supply voltage to kick start the energy harvesting system. The pulse charger enables the battery to be charged from a wall outlet or a USB network. It can also be reconfigured to charge a Nickel Metal Hydride battery. The final design is implemented on an IBM 0.18µm process. Experimental results verify the concept of the proposed charging system. The pulse charger is able to be reconfigured as a trickle charger and a constant current charger to charge a Li-ion battery and a Nickel Metal Hydride battery, respectively. The step down converter has a maximum efficiency of 90% at an input voltage of 3V and the charging of the battery via an energy harvesting system is also verified.

Thesis (Ph. D.)--Ohio University, March, 1999. / Title from PDF t.p.

Thesis (M. App. Sc.)--Carleton University, 2003. / Includes bibliographical references (p. 140-143). Also available in electronic format on the Internet.

Thesis (M.S.)--Missouri University of Science and Technology, 2010. / Vita. The entire thesis text is included in file. Title from title screen of thesis/dissertation PDF file (viewed July 26, 2010) Includes bibliographical references (p. 96-102).

Thesis (M.S.)--Montana State University--Bozeman, 2004. / Typescript. Chairperson, Graduate Committee: Todd J. Kaiser. Includes bibliographical references (leaves 169-171).